STM32_Prog_DB_0x437.xml 19 KB

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  1. <?xml version="1.0" encoding="UTF-8"?>
  2. <Root xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="SCHVerif.xsd">
  3. <Device>
  4. <DeviceID>0x437</DeviceID>
  5. <Vendor>STMicroelectronics</Vendor>
  6. <Type>MCU</Type>
  7. <CPU>Cortex-M3</CPU>
  8. <Name>STM32L15xxE/STM32L162xE</Name>
  9. <Series>STM32L1</Series>
  10. <Description>ARM 32-bit Cortex-M3 based device</Description>
  11. <Configurations>
  12. <!-- JTAG_SWD Interface -->
  13. <Interface name="JTAG_SWD"/>
  14. <!-- Bootloader Interface -->
  15. <Interface name="Bootloader"/>
  16. </Configurations>
  17. <!-- Peripherals -->
  18. <Peripherals>
  19. <!-- Embedded SRAM -->
  20. <Peripheral>
  21. <Name>Embedded SRAM</Name>
  22. <Type>Storage</Type>
  23. <Description/>
  24. <ErasedValue>0x00</ErasedValue>
  25. <Access>RWE</Access>
  26. <!-- 80 KB -->
  27. <Configuration>
  28. <Parameters address="0x20000000" name="SRAM" size="0x14000"/>
  29. <Description/>
  30. <Organization>Single</Organization>
  31. <Bank name="Bank 1">
  32. <Field>
  33. <Parameters address="0x20000000" name="SRAM" occurence="0x1" size="0x14000"/>
  34. </Field>
  35. </Bank>
  36. </Configuration>
  37. </Peripheral>
  38. <!-- Embedded Flash -->
  39. <Peripheral>
  40. <Name>Embedded Flash</Name>
  41. <Type>Storage</Type>
  42. <Description>The Flash memory interface manages CPU AHB I-Code and D-Code accesses to the Flash memory. It implements the erase and program Flash memory operations and the read and write protection mechanisms</Description>
  43. <ErasedValue>0x00</ErasedValue>
  44. <Access>RWE</Access>
  45. <FlashSize address="0x1FF800CC" default="0x80000"/>
  46. <DBGMCU_CR address="0xE0042004" mask="0x007"/>
  47. <DBGMCU_APB1_FZ address="0xE0042008" mask="0x1800"/>
  48. <!-- 512KB dual Bank -->
  49. <Configuration>
  50. <Parameters address="0x08000000" name=" 512 Kbytes Embedded Flash" size="0x80000"/>
  51. <Description/>
  52. <Organization>Dual</Organization>
  53. <Allignement>0x4</Allignement>
  54. <Bank name="Bank 1">
  55. <Field>
  56. <Parameters address="0x08000000" name="sector0" occurence="0x400" size="0x100"/>
  57. </Field>
  58. </Bank>
  59. <Bank name="Bank 2">
  60. <Field>
  61. <Parameters address="0x08040000" name="sector1024" occurence="0x400" size="0x100"/>
  62. </Field>
  63. </Bank>
  64. <Bank name="EEPROM1">
  65. <Field>
  66. <Parameters address="0x08080000" name="sector65281" occurence="0x1" size="0x2000"/>
  67. </Field>
  68. </Bank>
  69. <Bank name="EEPROM2">
  70. <Field>
  71. <Parameters address="0x08082000" name="sector65282" occurence="0x1" size="0x2000"/>
  72. </Field>
  73. </Bank>
  74. </Configuration>
  75. </Peripheral>
  76. <!-- Data EEPROM -->
  77. <Peripheral>
  78. <Name>Data EEPROM</Name>
  79. <Type>Storage</Type>
  80. <Description>The Data EEPROM memory block. It contains user data.</Description>
  81. <ErasedValue>0x00</ErasedValue>
  82. <Access>RWE</Access>
  83. <!-- 16KB dual Bank -->
  84. <Configuration>
  85. <Parameters address="0x08080000" name=" 16 Kbytes Data EEPROM" size="0x4000"/>
  86. <Description/>
  87. <Organization>Dual</Organization>
  88. <Allignement>0x4</Allignement>
  89. <Bank name="Bank 1">
  90. <Field>
  91. <Parameters address="0x08080000" name="EEPROM1" occurence="0x1" size="0x2000"/>
  92. </Field>
  93. </Bank>
  94. <Bank name="Bank 2">
  95. <Field>
  96. <Parameters address="0x08082000" name="EEPROM2" occurence="0x1" size="0x2000"/>
  97. </Field>
  98. </Bank>
  99. </Configuration>
  100. </Peripheral>
  101. <!-- Mirror Option Bytes -->
  102. <Peripheral>
  103. <Name>MirrorOptionBytes</Name>
  104. <Type>Storage</Type>
  105. <Description>Mirror Option Bytes contains the extra area.</Description>
  106. <ErasedValue>0xFF</ErasedValue>
  107. <Access>RW</Access>
  108. <!-- 136 Bytes single bank -->
  109. <Configuration>
  110. <Parameters address="0x1FF80000" name=" 136 Bytes Data MirrorOptionBytes" size="0x88"/>
  111. <Description/>
  112. <Organization>Single</Organization>
  113. <Allignement>0x4</Allignement>
  114. <Bank name="MirrorOptionBytes">
  115. <Field>
  116. <Parameters address="0x1FF80000" name="MirrorOptionBytes" occurence="0x1" size="0x88"/>
  117. </Field>
  118. </Bank>
  119. </Configuration>
  120. </Peripheral>
  121. <!-- Option Bytes -->
  122. <Peripheral>
  123. <Name>Option Bytes</Name>
  124. <Type>Configuration</Type>
  125. <Description/>
  126. <Access>RW</Access>
  127. <Bank interface="JTAG_SWD">
  128. <Parameters address="0x40023C1C" name="Bank 1" size="0x88"/>
  129. <Category>
  130. <Name>Read Out Protection</Name>
  131. <Field>
  132. <Parameters address="0x40023C1C" name="FLASH_OBR" size="0x4"/>
  133. <AssignedBits>
  134. <Bit>
  135. <Name>RDP</Name>
  136. <Description>Read protection option byte. The read protection is used to protect the software code stored in Flash memory.</Description>
  137. <BitOffset>0x0</BitOffset>
  138. <BitWidth>0x8</BitWidth>
  139. <Access>RW</Access>
  140. <Values>
  141. <Val value="0xAA">Level 0, no protection</Val>
  142. <Val value="0xBB">or any value other than 0xAA and 0xCC: Level 1, read protection</Val>
  143. <Val value="0xCC">Level 2, chip protection</Val>
  144. </Values>
  145. </Bit>
  146. </AssignedBits>
  147. </Field>
  148. </Category>
  149. <Category>
  150. <Name>BOR Level</Name>
  151. <Field>
  152. <Parameters address="0x40023C1C" name="FLASH_OBR" size="0x4"/>
  153. <AssignedBits>
  154. <Bit>
  155. <Name>BOR_LEV</Name>
  156. <Description>These bits contain the supply level threshold that activates/releases the reset. They can be written to program a new BOR level value into Flash memory</Description>
  157. <BitOffset>0x10</BitOffset>
  158. <BitWidth>0x4</BitWidth>
  159. <Access>RW</Access>
  160. <Values>
  161. <Val value="0x0">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
  162. <Val value="0x1">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
  163. <Val value="0x2">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
  164. <Val value="0x3">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
  165. <Val value="0x4">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
  166. <Val value="0x5">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
  167. <Val value="0x6">BOR Level OFF, reset level threshold for 1.45 V-1.55 V</Val>
  168. <Val value="0x7">BOR Level OFF, reset level threshold for 1.45 V-1.55 V</Val>
  169. <Val value="0x8">BOR Level 1, reset level threshold for 1.69 V-1.8 V</Val>
  170. <Val value="0x9">BOR Level 2, reset level threshold for 1.94 V-2.1 V</Val>
  171. <Val value="0xA">BOR Level 3, reset level threshold for 2.3 V-2.49 V</Val>
  172. <Val value="0xB">BOR Level 4, reset level threshold for 2.54 V-2.74 V</Val>
  173. <Val value="0xC">BOR Level 5, reset level threshold for 2.77 V-3.0 V</Val>
  174. </Values>
  175. </Bit>
  176. </AssignedBits>
  177. </Field>
  178. </Category>
  179. <Category>
  180. <Name>User Configuration</Name>
  181. <Field>
  182. <Parameters address="0x40023C1C" name="FLASH_OBR" size="0x4"/>
  183. <AssignedBits>
  184. <Bit>
  185. <Name>IWDG_SW</Name>
  186. <Description/>
  187. <BitOffset>0x14</BitOffset>
  188. <BitWidth>0x1</BitWidth>
  189. <Access>RW</Access>
  190. <Values>
  191. <Val value="0x0">Hardware independant watchdog</Val>
  192. <Val value="0x1">Software independant watchdog</Val>
  193. </Values>
  194. </Bit>
  195. <Bit>
  196. <Name>nRST_STOP</Name>
  197. <Description/>
  198. <BitOffset>0x15</BitOffset>
  199. <BitWidth>0x1</BitWidth>
  200. <Access>RW</Access>
  201. <Values>
  202. <Val value="0x0">Reset generated when entering Stop mode</Val>
  203. <Val value="0x1">No reset generated</Val>
  204. </Values>
  205. </Bit>
  206. <Bit>
  207. <Name>nRST_STDBY</Name>
  208. <Description/>
  209. <BitOffset>0x16</BitOffset>
  210. <BitWidth>0x1</BitWidth>
  211. <Access>RW</Access>
  212. <Values>
  213. <Val value="0x0">Reset generated when entering Standby mode</Val>
  214. <Val value="0x1">No reset generated</Val>
  215. </Values>
  216. </Bit>
  217. <Bit>
  218. <Name>nBFB2</Name>
  219. <Description/>
  220. <BitOffset>0x17</BitOffset>
  221. <BitWidth>0x1</BitWidth>
  222. <Access>RW</Access>
  223. <Values>
  224. <Val value="0x0">If boot from Flash then boot from bank 2</Val>
  225. <Val value="0x1">If boot from Flash then boot from bank 1</Val>
  226. </Values>
  227. </Bit>
  228. </AssignedBits>
  229. </Field>
  230. </Category>
  231. <Category>
  232. <Name>Write Protection</Name>
  233. <Field>
  234. <Parameters address="0x40023C20" name="FLASH_WRPR1" size="0x4"/>
  235. <AssignedBits>
  236. <Bit>
  237. <Name>WRP0</Name>
  238. <Description/>
  239. <BitOffset>0x0</BitOffset>
  240. <BitWidth>0x20</BitWidth>
  241. <Access>RW</Access>
  242. <Values ByBit="true">
  243. <Val value="0x0">Write protection not active</Val>
  244. <Val value="0x1">Write protection active</Val>
  245. </Values>
  246. </Bit>
  247. </AssignedBits>
  248. </Field>
  249. <Field>
  250. <Parameters address="0x40023C80" name="FLASH_WRPR2" size="0x4"/>
  251. <AssignedBits>
  252. <Bit>
  253. <Name>WRP32</Name>
  254. <Description/>
  255. <BitOffset>0x0</BitOffset>
  256. <BitWidth>0x20</BitWidth>
  257. <Access>RW</Access>
  258. <Values ByBit="true">
  259. <Val value="0x0">Write protection not active</Val>
  260. <Val value="0x1">Write protection active</Val>
  261. </Values>
  262. </Bit>
  263. </AssignedBits>
  264. </Field>
  265. <Field>
  266. <Parameters address="0x40023C84" name="FLASH_WRPR3" size="0x4"/>
  267. <AssignedBits>
  268. <Bit>
  269. <Name>WRP64</Name>
  270. <Description/>
  271. <BitOffset>0x0</BitOffset>
  272. <BitWidth>0x20</BitWidth>
  273. <Access>RW</Access>
  274. <Values ByBit="true">
  275. <Val value="0x0">Write protection not active</Val>
  276. <Val value="0x1">Write protection active</Val>
  277. </Values>
  278. </Bit>
  279. </AssignedBits>
  280. </Field>
  281. <Field>
  282. <Parameters address="0x40023C88" name="FLASH_WRPR4" size="0x4"/>
  283. <AssignedBits>
  284. <Bit>
  285. <Name>WRP96</Name>
  286. <Description/>
  287. <BitOffset>0x0</BitOffset>
  288. <BitWidth>0x20</BitWidth>
  289. <Access>RW</Access>
  290. <Values ByBit="true">
  291. <Val value="0x0">Write protection not active</Val>
  292. <Val value="0x1">Write protection active</Val>
  293. </Values>
  294. </Bit>
  295. </AssignedBits>
  296. </Field>
  297. </Category>
  298. </Bank>
  299. <Bank interface="Bootloader">
  300. <Parameters address="0x1FF80000" name="Bank 1" size="0x20"/>
  301. <Category>
  302. <Name>Read Out Protection</Name>
  303. <Field>
  304. <Parameters address="0x1FF80000" name="RDP" size="0x4"/>
  305. <AssignedBits>
  306. <Bit>
  307. <Name>RDP</Name>
  308. <Description>Read protection option byte. The read protection is used to protect the software code stored in Flash memory.</Description>
  309. <BitOffset>0x0</BitOffset>
  310. <BitWidth>0x8</BitWidth>
  311. <Access>RW</Access>
  312. <Values>
  313. <Val value="0xAA">Level 0, no protection</Val>
  314. <Val value="0xBB">or any value other than 0xAA and 0xCC: Level 1, read protection</Val>
  315. <Val value="0xCC">Level 2, chip protection</Val>
  316. </Values>
  317. </Bit>
  318. </AssignedBits>
  319. </Field>
  320. </Category>
  321. <Category>
  322. <Name>BOR Level</Name>
  323. <Field>
  324. <Parameters address="0x1FF80004" name="USER" size="0x4"/>
  325. <AssignedBits>
  326. <Bit>
  327. <Name>BOR_LEV</Name>
  328. <Description>These bits contain the supply level threshold that activates/releases the reset. They can be written to program a new BOR level value into Flash memory</Description>
  329. <BitOffset>0x0</BitOffset>
  330. <BitWidth>0x4</BitWidth>
  331. <Access>RW</Access>
  332. <Values>
  333. <Val value="0x0">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
  334. <Val value="0x1">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
  335. <Val value="0x2">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
  336. <Val value="0x3">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
  337. <Val value="0x4">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
  338. <Val value="0x5">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
  339. <Val value="0x6">BOR Level OFF, reset level threshold for 1.45 V-1.55 V</Val>
  340. <Val value="0x7">BOR Level OFF, reset level threshold for 1.45 V-1.55 V</Val>
  341. <Val value="0x8">BOR Level 1, reset level threshold for 1.69 V-1.8 V</Val>
  342. <Val value="0x9">BOR Level 2, reset level threshold for 1.94 V-2.1 V</Val>
  343. <Val value="0xA">BOR Level 3, reset level threshold for 2.3 V-2.49 V</Val>
  344. <Val value="0xB">BOR Level 4, reset level threshold for 2.54 V-2.74 V</Val>
  345. <Val value="0xC">BOR Level 5, reset level threshold for 2.77 V-3.0 V</Val>
  346. </Values>
  347. </Bit>
  348. </AssignedBits>
  349. </Field>
  350. </Category>
  351. <Category>
  352. <Name>User Configuration</Name>
  353. <Field>
  354. <Parameters address="0x1FF80004" name="USER" size="0x4"/>
  355. <AssignedBits>
  356. <Bit>
  357. <Name>IWDG_SW</Name>
  358. <Description/>
  359. <BitOffset>0x4</BitOffset>
  360. <BitWidth>0x1</BitWidth>
  361. <Access>RW</Access>
  362. <Values>
  363. <Val value="0x0">Hardware independant watchdog</Val>
  364. <Val value="0x1">Software independant watchdog</Val>
  365. </Values>
  366. </Bit>
  367. <Bit>
  368. <Name>nRST_STOP</Name>
  369. <Description/>
  370. <BitOffset>0x5</BitOffset>
  371. <BitWidth>0x1</BitWidth>
  372. <Access>RW</Access>
  373. <Values>
  374. <Val value="0x0">Reset generated when entering Stop mode</Val>
  375. <Val value="0x1">No reset generated</Val>
  376. </Values>
  377. </Bit>
  378. <Bit>
  379. <Name>nRST_STDBY</Name>
  380. <Description/>
  381. <BitOffset>0x6</BitOffset>
  382. <BitWidth>0x1</BitWidth>
  383. <Access>RW</Access>
  384. <Values>
  385. <Val value="0x0">Reset generated when entering Standby mode</Val>
  386. <Val value="0x1">No reset generated</Val>
  387. </Values>
  388. </Bit>
  389. <Bit>
  390. <Name>nBFB2</Name>
  391. <Description/>
  392. <BitOffset>0x7</BitOffset>
  393. <BitWidth>0x1</BitWidth>
  394. <Access>RW</Access>
  395. <Values>
  396. <Val value="0x0">If boot from Flash then boot from bank 2</Val>
  397. <Val value="0x1">If boot from Flash then boot from bank 1</Val>
  398. </Values>
  399. </Bit>
  400. </AssignedBits>
  401. </Field>
  402. </Category>
  403. <Category>
  404. <Name>Write Protection</Name>
  405. <Field>
  406. <Parameters address="0x1FF80008" name="WRP1" size="0x8"/>
  407. <AssignedBits>
  408. <Bit>
  409. <Name>WRP0</Name>
  410. <Description/>
  411. <BitOffset>0x0</BitOffset>
  412. <BitWidth>0x10</BitWidth>
  413. <Access>RW</Access>
  414. <Values ByBit="true">
  415. <Val value="0x0">Write protection not active</Val>
  416. <Val value="0x1">Write protection active</Val>
  417. </Values>
  418. </Bit>
  419. </AssignedBits>
  420. </Field>
  421. <Field>
  422. <Parameters address="0x1FF8000C" name="WRP1" size="0x8"/>
  423. <AssignedBits>
  424. <Bit>
  425. <Name>WRP16</Name>
  426. <Description/>
  427. <BitOffset>0x0</BitOffset>
  428. <BitWidth>0x10</BitWidth>
  429. <Access>RW</Access>
  430. <Values ByBit="true">
  431. <Val value="0x0">Write protection not active</Val>
  432. <Val value="0x1">Write protection active</Val>
  433. </Values>
  434. </Bit>
  435. </AssignedBits>
  436. </Field>
  437. <Field>
  438. <Parameters address="0x1FF80010" name="WRP2" size="0x8"/>
  439. <AssignedBits>
  440. <Bit>
  441. <Name>WRP32</Name>
  442. <Description/>
  443. <BitOffset>0x0</BitOffset>
  444. <BitWidth>0x10</BitWidth>
  445. <Access>RW</Access>
  446. <Values ByBit="true">
  447. <Val value="0x0">Write protection not active</Val>
  448. <Val value="0x1">Write protection active</Val>
  449. </Values>
  450. </Bit>
  451. </AssignedBits>
  452. </Field>
  453. <Field>
  454. <Parameters address="0x1FF80014" name="WRP2" size="0x8"/>
  455. <AssignedBits>
  456. <Bit>
  457. <Name>WRP48</Name>
  458. <Description/>
  459. <BitOffset>0x0</BitOffset>
  460. <BitWidth>0x10</BitWidth>
  461. <Access>RW</Access>
  462. <Values ByBit="true">
  463. <Val value="0x0">Write protection not active</Val>
  464. <Val value="0x1">Write protection active</Val>
  465. </Values>
  466. </Bit>
  467. </AssignedBits>
  468. </Field>
  469. <Field>
  470. <Parameters address="0x1FF80018" name="WRP3" size="0x8"/>
  471. <AssignedBits>
  472. <Bit>
  473. <Name>WRP64</Name>
  474. <Description/>
  475. <BitOffset>0x0</BitOffset>
  476. <BitWidth>0x10</BitWidth>
  477. <Access>RW</Access>
  478. <Values ByBit="true">
  479. <Val value="0x0">Write protection not active</Val>
  480. <Val value="0x1">Write protection active</Val>
  481. </Values>
  482. </Bit>
  483. </AssignedBits>
  484. </Field>
  485. <Field>
  486. <Parameters address="0x1FF8001C" name="WRP3" size="0x8"/>
  487. <AssignedBits>
  488. <Bit>
  489. <Name>WRP80</Name>
  490. <Description/>
  491. <BitOffset>0x0</BitOffset>
  492. <BitWidth>0x10</BitWidth>
  493. <Access>RW</Access>
  494. <Values ByBit="true">
  495. <Val value="0x0">Write protection not active</Val>
  496. <Val value="0x1">Write protection active</Val>
  497. </Values>
  498. </Bit>
  499. </AssignedBits>
  500. </Field>
  501. </Category>
  502. </Bank>
  503. <Bank interface="Bootloader">
  504. <Parameters address="0x1FF80080" name="Bank 2" size="0x8"/>
  505. <Category>
  506. <Name>Write Protection</Name>
  507. <Field>
  508. <Parameters address="0x1FF80080" name="WRP4" size="0x8"/>
  509. <AssignedBits>
  510. <Bit>
  511. <Name>WRP96</Name>
  512. <Description/>
  513. <BitOffset>0x0</BitOffset>
  514. <BitWidth>0x10</BitWidth>
  515. <Access>RW</Access>
  516. <Values ByBit="true">
  517. <Val value="0x0">Write protection not active</Val>
  518. <Val value="0x1">Write protection active</Val>
  519. </Values>
  520. </Bit>
  521. </AssignedBits>
  522. </Field>
  523. <Field>
  524. <Parameters address="0x1FF80084" name="WRP4" size="0x8"/>
  525. <AssignedBits>
  526. <Bit>
  527. <Name>WRP112</Name>
  528. <Description/>
  529. <BitOffset>0x0</BitOffset>
  530. <BitWidth>0x10</BitWidth>
  531. <Access>RW</Access>
  532. <Values ByBit="true">
  533. <Val value="0x0">Write protection not active</Val>
  534. <Val value="0x1">Write protection active</Val>
  535. </Values>
  536. </Bit>
  537. </AssignedBits>
  538. </Field>
  539. </Category>
  540. </Bank>
  541. </Peripheral>
  542. </Peripherals>
  543. </Device>
  544. </Root>