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- # SPDX-License-Identifier: GPL-2.0-or-later
- #
- # EnSilica eSi-32xx SoC (eSi-RISC Family)
- # http://www.ensilica.com/risc-ip/
- #
- if { [info exists CHIPNAME] } {
- set _CHIPNAME $CHIPNAME
- } else {
- set _CHIPNAME esi32xx
- }
- if { [info exists CPUTAPID] } {
- set _CPUTAPID $CPUTAPID
- } else {
- set _CPUTAPID 0x11234001
- }
- jtag newtap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID
- set _TARGETNAME $_CHIPNAME.cpu
- target create $_TARGETNAME esirisc -chain-position $_CHIPNAME.cpu
- # Targets with the UNIFIED_ADDRESS_SPACE option disabled should set
- # CACHEARCH to 'harvard'. By default, 'von_neumann' is assumed.
- if { [info exists CACHEARCH] } {
- $_TARGETNAME esirisc cache_arch $CACHEARCH
- }
- adapter speed 2000
- reset_config none
- # The default linker scripts provided by the eSi-RISC toolchain do not
- # specify attributes on memory regions, which results in incorrect
- # application of software breakpoints by GDB.
- gdb_breakpoint_override hard
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