hitex_str9-comstick.cfg 2.2 KB

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  1. # SPDX-License-Identifier: GPL-2.0-or-later
  2. # Hitex STR9-comStick
  3. # http://www.hitex.com/index.php?id=383
  4. # This works for the STR9-comStick revisions STR912CS-A1 and STR912CS-A2.
  5. source [find interface/ftdi/hitex_str9-comstick.cfg]
  6. # set jtag speed
  7. adapter speed 3000
  8. adapter srst delay 100
  9. jtag_ntrst_delay 100
  10. #use combined on interfaces or targets that can't set TRST/SRST separately
  11. reset_config trst_and_srst
  12. #
  13. # FIXME use the standard str912 target config; that script might need
  14. # updating to "-ignore-version" for the boundary scan TAP
  15. #
  16. # source [find target/str912.cfg]
  17. #
  18. if { [info exists CHIPNAME] } {
  19. set _CHIPNAME $CHIPNAME
  20. } else {
  21. set _CHIPNAME str912
  22. }
  23. if { [info exists ENDIAN] } {
  24. set _ENDIAN $ENDIAN
  25. } else {
  26. set _ENDIAN little
  27. }
  28. if { [info exists FLASHTAPID] } {
  29. set _FLASHTAPID $FLASHTAPID
  30. } else {
  31. set _FLASHTAPID 0x04570041
  32. }
  33. jtag newtap $_CHIPNAME flash -irlen 8 -ircapture 0x1 -irmask 0x1 -expected-id $_FLASHTAPID
  34. if { [info exists CPUTAPID] } {
  35. set _CPUTAPID $CPUTAPID
  36. } else {
  37. set _CPUTAPID 0x25966041
  38. }
  39. jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
  40. if { [info exists BSTAPID] } {
  41. set _BSTAPID $BSTAPID
  42. } else {
  43. # Found on STR9-comStick, revision STR912CS-A1
  44. set _BSTAPID1 0x1457f041
  45. # Found on STR9-comStick, revision STR912CS-A2
  46. set _BSTAPID2 0x2457f041
  47. }
  48. jtag newtap $_CHIPNAME bs -irlen 5 -ircapture 0x1 -irmask 0x1 -expected-id $_BSTAPID1 -expected-id $_BSTAPID2
  49. set _TARGETNAME $_CHIPNAME.cpu
  50. target create $_TARGETNAME arm966e -endian $_ENDIAN -chain-position $_TARGETNAME
  51. $_TARGETNAME configure -event reset-init {
  52. # We can increase speed now that we know the target is halted.
  53. #jtag_rclk 3000
  54. # -- Enable 96K RAM
  55. # PFQBC enabled / DTCM & AHB wait-states disabled
  56. mww 0x5C002034 0x0191
  57. str9x flash_config 0 4 2 0 0x80000
  58. flash protect 0 0 7 off
  59. }
  60. $_TARGETNAME configure -work-area-phys 0x50000000 -work-area-size 16384 -work-area-backup 0
  61. #flash bank <driver> <base> <size> <chip_width> <bus_width>
  62. set _FLASHNAME $_CHIPNAME.flash0
  63. flash bank $_FLASHNAME str9x 0x00000000 0x00080000 0 0 0
  64. set _FLASHNAME $_CHIPNAME.flash1
  65. flash bank $_FLASHNAME str9x 0x00080000 0x00008000 0 0 0