imx31pdk.cfg 2.0 KB

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  1. # SPDX-License-Identifier: GPL-2.0-or-later
  2. # The IMX31PDK eval board has a single IMX31 chip
  3. source [find target/imx31.cfg]
  4. source [find target/imx.cfg]
  5. $_TARGETNAME configure -event reset-init { imx31pdk_init }
  6. proc self_test {} {
  7. echo "Running 100 iterations of test."
  8. dump_image /ram/test 0x80000000 0x40000
  9. for {set i 0} {$i < 100} {set i [expr {$i+1}]} {
  10. echo "Iteration $i"
  11. reset init
  12. mww 0x80000000 0x12345678 0x10000
  13. load_image /ram/test 0x80000000 bin
  14. verify_image /ram/test 0x80000000 bin
  15. }
  16. }
  17. # Slow fallback frequency
  18. # measure_clk indicates ca. 3-4MHz.
  19. jtag_rclk 1000
  20. proc imx31pdk_init { } {
  21. imx3x_reset
  22. # This setup puts RAM at 0x80000000
  23. mww 0x53FC0000 0x040
  24. mww 0x53F80000 0x074B0B7D
  25. # 399MHz - 26MHz input, PD=1,MFI=7, MFN=27, MFD=40
  26. #mww 0x53F80004 0xFF871D50
  27. #mww 0x53F80010 0x00271C1B
  28. # Start 16 bit NorFlash Initialization on CS0
  29. mww 0xb8002000 0x0000CC03
  30. mww 0xb8002004 0xa0330D01
  31. mww 0xb8002008 0x00220800
  32. # Configure CPLD on CS4
  33. mww 0xb8002040 0x0000DCF6
  34. mww 0xb8002044 0x444A4541
  35. mww 0xb8002048 0x44443302
  36. # SDCLK
  37. mww 0x43FAC26C 0
  38. # CAS
  39. mww 0x43FAC270 0
  40. # RAS
  41. mww 0x43FAC274 0
  42. # CS2 (CSD0)
  43. mww 0x43FAC27C 0x1000
  44. # DQM3
  45. mww 0x43FAC284 0
  46. # DQM2, DQM1, DQM0, SD31-SD0, A25-A0, MA10 (0x288..0x2DC)
  47. mww 0x43FAC288 0
  48. mww 0x43FAC28C 0
  49. mww 0x43FAC290 0
  50. mww 0x43FAC294 0
  51. mww 0x43FAC298 0
  52. mww 0x43FAC29C 0
  53. mww 0x43FAC2A0 0
  54. mww 0x43FAC2A4 0
  55. mww 0x43FAC2A8 0
  56. mww 0x43FAC2AC 0
  57. mww 0x43FAC2B0 0
  58. mww 0x43FAC2B4 0
  59. mww 0x43FAC2B8 0
  60. mww 0x43FAC2BC 0
  61. mww 0x43FAC2C0 0
  62. mww 0x43FAC2C4 0
  63. mww 0x43FAC2C8 0
  64. mww 0x43FAC2CC 0
  65. mww 0x43FAC2D0 0
  66. mww 0x43FAC2D4 0
  67. mww 0x43FAC2D8 0
  68. mww 0x43FAC2DC 0
  69. # Initialization script for 32 bit DDR on MX31 ADS
  70. mww 0xB8001010 0x00000004
  71. mww 0xB8001004 0x006ac73a
  72. mww 0xB8001000 0x92100000
  73. mww 0x80000f00 0x12344321
  74. mww 0xB8001000 0xa2100000
  75. mww 0x80000000 0x12344321
  76. mww 0x80000000 0x12344321
  77. mww 0xB8001000 0xb2100000
  78. mwb 0x80000033 0xda
  79. mwb 0x81000000 0xff
  80. mww 0xB8001000 0x82226080
  81. mww 0x80000000 0xDEADBEEF
  82. mww 0xB8001010 0x0000000c
  83. }