mini6410.cfg 4.2 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114
  1. # SPDX-License-Identifier: GPL-2.0-or-later
  2. # Target configuration for the Samsung s3c6410 system on chip
  3. # Tested on a tiny6410
  4. # Processor : ARM1176
  5. # Info : JTAG tap: s3c6410.etb tap/device found: 0x2b900f0f (mfg: 0x787, part: 0xb900, ver: 0x2)
  6. # Info : JTAG tap: s3c6410.cpu tap/device found: 0x07b76f0f (mfg: 0x787, part: 0x7b76, ver: 0x0)
  7. source [find target/samsung_s3c6410.cfg]
  8. proc init_6410 {} {
  9. halt
  10. reg cpsr 0x1D3
  11. arm mcr 15 0 15 2 4 0x70000013
  12. #-----------------------------------------------
  13. # Clock and Timer Setting
  14. #-----------------------------------------------
  15. mww 0x7e004000 0 ;# WATCHDOG - Disable
  16. mww 0x7E00F120 0x0003 ;# MEM_SYS_CFG - CS0:8 bit, Mem1:32bit, CS2=NAND
  17. #mww 0x7E00F120 0x1000 ;# MEM_SYS_CFG - CS0:16bit, Mem1:32bit, CS2=SROMC
  18. #mww 0x7E00F120 0x1002 ;# MEM_SYS_CFG - CS0:16bit, Mem1:32bit, CS2=OND
  19. mww 0x7E00F900 0x805e ;# OTHERS - Change SYNCMUX[6] to “1”
  20. sleep 1000
  21. mww 0x7E00F900 0x80de ;# OTHERS - Assert SYNCREQ&VICSYNCEN to “1”(rb1004modify)
  22. sleep 1000 ;# - Others[11:8] to 0xF
  23. mww 0x7E00F000 0xffff ;# APLL_LOCK - APLL LockTime
  24. mww 0x7E00F004 0xffff ;# MPLL_LOCK - MPLL LockTime
  25. mww 0x7E00F020 0x1047310 ;# CLK_DIV0 - ARMCLK:HCLK:PCLK = 1:4:16
  26. mww 0x7E00F00c 0x81900302 ;# APLL_CON - A:400, P:3, S:2 => 400MHz
  27. mww 0x7E00F010 0x81900303 ;# MPLL_CON - M:400, P:3, S:3 => 200MHz
  28. mww 0x7E00F01c 0x3 ;# CLK_SRC - APLL,MPLL Clock Select
  29. #-----------------------------------------------
  30. # DRAM initialization
  31. #-----------------------------------------------
  32. mww 0x7e001004 0x4 ;# P1MEMCCMD - Enter the config state
  33. mww 0x7e001010 0x30C ;# P1REFRESH - Refresh Period register (7800ns), 100MHz
  34. # mww 0x7e001010 0x40e ;# P1REFRESH - Refresh Period register (7800ns), 133MHz
  35. mww 0x7e001014 0x6 ;# P1CASLAT - CAS Latency = 3
  36. mww 0x7e001018 0x1 ;# P1T_DQSS
  37. mww 0x7e00101c 0x2 ;# P1T_MRD
  38. mww 0x7e001020 0x7 ;# P1T_RAS - 45 ns
  39. mww 0x7e001024 0xA ;# P1T_RC - 67.5 ns
  40. mww 0x7e001028 0xC ;# P1T_RCD - 22.5 ns
  41. mww 0x7e00102C 0x10B ;# P1T_RFC - 80 ns
  42. mww 0x7e001030 0xC ;# P1T_RP - 22.5 ns
  43. mww 0x7e001034 0x3 ;# P1T_RRD - 15 ns
  44. mww 0x7e001038 0x3 ;# P1T_WR - 15 ns
  45. mww 0x7e00103C 0x2 ;# P1T_WTR
  46. mww 0x7e001040 0x2 ;# P1T_XP
  47. mww 0x7e001044 0x11 ;# P1T_XSR - 120 ns
  48. mww 0x7e001048 0x11 ;# P1T_ESR
  49. #-----------------------------------------------
  50. # Memory Configuration Registers
  51. #-----------------------------------------------
  52. mww 0x7e00100C 0x00010012 ;# P1MEMCFG - 1 CKE, 1Chip, 4burst, Alw, AP[10],ROW/Column bit
  53. mww 0x7e00104C 0x0B41 ;# P1MEMCFG2 - Read delay 1 Cycle, mDDR, 32bit, Sync.
  54. mww 0x7e001200 0x150F0 ;# CHIP_N_CFG - 0x150F0 for 256M, 0x150F8 for 128M
  55. #-----------------------------------------------
  56. # Memory Direct Commands
  57. #-----------------------------------------------
  58. mww 0x7e001008 0xc0000 ;# Chip0 Direct Command :NOP5
  59. mww 0x7e001008 0x0 ;# Chip0 Direct Command :PreCharge al
  60. mww 0x7e001008 0x40000 ;# Chip0 Direct Command :AutoRefresh
  61. mww 0x7e001008 0x40000 ;# Chip0 Direct Command :AutoRefresh
  62. mww 0x7e001008 0xA0000 ;# EMRS, DS:Full, PASR:Full
  63. mww 0x7e001008 0x80032 ;# MRS, CAS3, BL4
  64. mww 0x7e001004 0x0 ;# Enable DMC1
  65. }
  66. proc install_6410_uboot {} {
  67. # write U-boot magic number
  68. mww 0x50000000 0x24564236
  69. mww 0x50000004 0x20764316
  70. load_image u-boot_nand-ram256.bin 0x50008000 bin
  71. load_image u-boot_nand-ram256.bin 0x57E00000 bin
  72. #Kick in
  73. reg pc 0x57E00000
  74. resume
  75. }
  76. proc init_6410_flash {} {
  77. halt
  78. nand probe 0
  79. nand list
  80. }
  81. adapter speed 1000
  82. adapter srst delay 100
  83. jtag_ntrst_delay 100
  84. reset_config trst_and_srst
  85. gdb_breakpoint_override hard
  86. targets
  87. nand device $_CHIPNAME.flash s3c6400 $_CHIPNAME.cpu
  88. init
  89. echo " "
  90. echo " "
  91. echo "-------------------------------------------------------------------"
  92. echo "---- The following mini6410/tiny6410 functions are available: ----"
  93. echo "---- init_6410 - initialize clock, timer, DRAM ----"
  94. echo "---- init_6410_flash - initializes NAND flash support ----"
  95. echo "---- install_6410_uboot - copies u-boot image into RAM and ----"
  96. echo "---- runs it ----"
  97. echo "-------------------------------------------------------------------"
  98. echo " "
  99. echo " "