numato_mimas_a7.cfg 1.3 KB

1234567891011121314151617181920212223242526272829303132333435363738
  1. # SPDX-License-Identifier: GPL-2.0-or-later
  2. #
  3. # Numato Mimas A7 - Artix 7 FPGA Board
  4. #
  5. # https://numato.com/product/mimas-a7-artix-7-fpga-development-board-with-ddr-sdram-and-gigabit-ethernet
  6. #
  7. # Note: Connect external DC power supply if programming a heavy design onto FPGA.
  8. # Programming while powering via USB may lead to programming failure.
  9. # Therefore, prefer external power supply.
  10. adapter driver ftdi
  11. ftdi device_desc "Mimas Artix 7 FPGA Module"
  12. ftdi vid_pid 0x2a19 0x1009
  13. # channel 0 is for custom purpose by users (like uart, fifo etc)
  14. # channel 1 is reserved for JTAG (by-default) or SPI (possible via changing solder jumpers)
  15. ftdi channel 1
  16. ftdi tdo_sample_edge falling
  17. # FTDI Pin Layout
  18. #
  19. # +--------+-------+-------+-------+-------+-------+-------+-------+
  20. # | DBUS7 | DBUS6 | DBUS5 | DBUS4 | DBUS3 | DBUS2 | DBUS1 | DBUS0 |
  21. # +--------+-------+-------+-------+-------+-------+-------+-------+
  22. # | PROG_B | OE_N | NC | NC | TMS | TDO | TDI | TCK |
  23. # +--------+-------+-------+-------+-------+-------+-------+-------+
  24. #
  25. # OE_N is JTAG buffer output enable signal (active-low)
  26. # PROG_B is not used, so left as input to FTDI.
  27. #
  28. ftdi layout_init 0x0008 0x004b
  29. reset_config none
  30. adapter speed 30000
  31. source [find cpld/xilinx-xc7.cfg]
  32. source [find cpld/jtagspi.cfg]