| 1234567891011121314151617181920212223242526272829 |
- # SPDX-License-Identifier: GPL-2.0-or-later
- # Trion® T20 BGA256 Development Kit
- # https://www.efinixinc.com/docs/trion20-devkit-ug-v1.5.pdf
- #
- # works after power cycle or pushing sw1.
- # it is because we cannot control CDONE which is connected to ftdi channel 0
- # note from an006: For JTAG programming, T4, T8, T13, and T20 FPGAs use the
- # CRESET_N and SS_N pins in addition to the standard JTAG pins.
- adapter driver ftdi
- ftdi vid_pid 0x0403 0x6010
- ftdi channel 1
- ftdi layout_init 0x0008 0x008b
- reset_config none
- transport select jtag
- adapter speed 6000
- source [find fpga/efinix_trion.cfg]
- #openocd -f board/trion_t20_bga256.cfg -c "init" -c "pld load trion.pld outflow/trion_blinker.bit"
- #ipdbg -start -tap trion.tap -hub 0x8 -port 5555 -tool 0
- set JTAGSPI_CHAIN_ID trion.pld
- source [find cpld/jtagspi.cfg]
- #jtagspi_init trion.pld "trion_jtagspi/outflow/trion_jtagspi.bit" 0xAB
- #jtagspi_program trion_blinker/outflow/trion_blinker.bin 0
|
