sdk-debugger-openocd-infineon/scripts/target/adsp-sc58x.cfg

# SPDX-License-Identifier: GPL-2.0-or-later

#
# Analog Devices ADSP-SC58x (ARM Cortex-A5 plus one or two SHARC+ DSPs)
#

# Evaluation boards by Analog Devices (and designs derived from them) use a
# non-standard 10-pin 0.05" ARM Cortex Debug Connector.  In this bastardized
# implementation, pin 9 (GND or GNDDetect) has been usurped with JTAG /TRST.
#
# As a result, a standards-compliant debug pod will force /TRST active,
# putting the processor's debug interface into reset and preventing usage.
#
# A connector adapter must be employed on these boards to isolate or remap
# /TRST so that it is only asserted when intended.

source [find target/swj-dp.tcl]

if { [info exists CHIPNAME] } {
	set _CHIPNAME $CHIPNAME
} else {
	set _CHIPNAME ADSP-SC58x
}

if { [info exists ENDIAN] } {
	set _ENDIAN $ENDIAN
} else {
	set _ENDIAN little
}

if { [info exists CPUTAPID] } {
	set _CPUTAPID $CPUTAPID
} else {
	set _CPUTAPID 0x3BA02477
}

swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID
dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu

target create ap0.mem mem_ap -dap $_CHIPNAME.dap -ap-num 0

set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME cortex_a -endian $_ENDIAN -dap $_CHIPNAME.dap

$_TARGETNAME configure -event examine-end {
   global _TARGETNAME
   sc58x_enabledebug
}

proc sc58x_enabledebug {} {
   # Enable debugging functionality by setting bits in the TAPC_DBGCTL register
   # it is not possible to halt the target unless these bits have been set
   ap0.mem mww 0x31131000 0xFFFF
}