at91sama5d2.cfg 1.3 KB

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  1. # SPDX-License-Identifier: GPL-2.0-or-later
  2. #
  3. # SAMA5D2 devices support both JTAG and SWD transports.
  4. #
  5. # The JTAG connection is disabled at reset, and during the ROM Code execution.
  6. # It is re-enabled when the ROM code jumps in the boot file copied from an
  7. # external Flash memory into the internalSRAM, or when the ROM code launches
  8. # the SAM-BA monitor, when no boot file has been found in any external Flash
  9. # memory.
  10. # For more JTAG related information see, :
  11. # https://ww1.microchip.com/downloads/en/DeviceDoc/SAMA5D2-Series-Data-sheet-ds60001476G.pdf
  12. #
  13. # If JTAGSEL pin:
  14. # - if enabled, boundary Scan mode is activated. JTAG ID Code value is 0x05B3F03F.
  15. # - if disabled, ICE mode is activated. Debug Port JTAG IDCODE value is 0x5BA00477
  16. #
  17. source [find target/swj-dp.tcl]
  18. #jtag scan chain
  19. if { [info exists CPUTAPID] } {
  20. set _CPUTAPID $CPUTAPID
  21. } else {
  22. if { [using_jtag] } {
  23. set _CPUTAPID 0x5ba00477
  24. } else {
  25. # SWD IDCODE (single drop, arm)
  26. set _CPUTAPID 0x5ba02477
  27. }
  28. }
  29. if { [info exists CHIPNAME] } {
  30. set _CHIPNAME $CHIPNAME
  31. } else {
  32. set _CHIPNAME at91sama5d2
  33. }
  34. swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
  35. # Cortex-A5 target
  36. set _TARGETNAME $_CHIPNAME.cpu_a5
  37. dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
  38. target create $_TARGETNAME.0 cortex_a -dap $_CHIPNAME.dap