bcm4390x.cfg 4.8 KB

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  1. #
  2. # $ Copyright Cypress Semiconductor $
  3. #
  4. # script for BCM4390x
  5. source [find mem_helper.tcl]
  6. source [find target/swj-dp.tcl]
  7. # Default is to connect under Reset
  8. reset_config trst_and_srst srst_nogate connect_assert_srst
  9. # For 'Attach' configuration use the following
  10. # reset_config trst_only connect_deassert_srst
  11. set CHIP_RAM_START 0x004A0000
  12. set CHIPNAME BCM43909
  13. set ADAPTER_SPEED_CONNECT 100
  14. set ADAPTER_SPEED_OPERATE 8000
  15. adapter speed $ADAPTER_SPEED_CONNECT
  16. adapter srst delay 10
  17. if [using_jtag] {
  18. jtag_ntrst_delay 10
  19. }
  20. swj_newdap $CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id 0x0ba00477 -ignore-version
  21. set _TARGETNAME $CHIPNAME.cpu
  22. dap create $CHIPNAME.dap -chain-position $CHIPNAME.cpu
  23. target create $_TARGETNAME cortex_r4 -dap $CHIPNAME.dap -dbgbase 0x80001000
  24. $_TARGETNAME configure -rtos auto -rtos-wipe-on-reset-halt 1
  25. # Force backplane run on fast HT clock (160Mhz) even in sleep mode and boost JTAG clock
  26. proc boost_jtag_speed {} {
  27. set CHIPC_CCS_REG 0x180001E0
  28. mmw $CHIPC_CCS_REG 0x02 0
  29. sleep 10
  30. adapter speed $::ADAPTER_SPEED_OPERATE
  31. }
  32. # Disable watchdog when board halted (e.g. breakpoint)
  33. proc halt_event_proc { } {
  34. set PMU_WATCHDOG_ADDRESS 0x18020634
  35. mww $PMU_WATCHDOG_ADDRESS 0x00000000
  36. }
  37. set _reset_mode ""
  38. proc init_reset { mode } {
  39. set ::_reset_mode $mode
  40. if {[using_jtag]} {
  41. jtag arp_init-reset
  42. }
  43. }
  44. $_TARGETNAME configure -event gdb-attach {
  45. halt
  46. cortex_r4 maskisr on
  47. gdb_breakpoint_override hard
  48. boost_jtag_speed
  49. }
  50. $_TARGETNAME configure -event debug-halted { halt_event_proc }
  51. $_TARGETNAME configure -event halted { halt_event_proc }
  52. $_TARGETNAME configure -event reset-start {
  53. adapter speed $::ADAPTER_SPEED_CONNECT
  54. }
  55. $_TARGETNAME configure -event reset-end {
  56. if { $::_reset_mode ne "run" } {
  57. boost_jtag_speed
  58. # SRST does not currently reset the system properly - the following is required to work around this.
  59. # Clear LR to avoid having the debugger think that there is a stack frame
  60. reg lr 0x0
  61. # Vector #0 - reset instruction, all others zero
  62. set FLOPS_ADDRESS 0x00000000
  63. mww [expr {$FLOPS_ADDRESS + 0x0} ] 0xB03EF000
  64. mww [expr {$FLOPS_ADDRESS + 0x4} ] 0x00000000 7
  65. # cleanup socsram settings
  66. set SOCSRAM_X_INDEX 0x1800C010
  67. set SOCSRAM_X_PDA 0x1800C044
  68. for { set idx 0 } { $idx <= 7 } { incr idx } {
  69. mww $SOCSRAM_X_INDEX $idx
  70. mww $SOCSRAM_X_PDA 0x80000000
  71. }
  72. }
  73. }
  74. $_TARGETNAME configure -memorymap RW 0x00000000 32 FLOPS "Interrupt Vectors"
  75. $_TARGETNAME configure -memorymap RO 0x00400000 0x00090000 ROM "ROM"
  76. $_TARGETNAME configure -memorymap RW 0x004A0000 0x00202000 RAM "RAM"
  77. $_TARGETNAME configure -memorymap RW 0x008A0000 0x00202000 RAM2 "RAM_uncached"
  78. $_TARGETNAME configure -memorymap RW 0x14000000 0x04000000 SFLASH "SFLASH"
  79. $_TARGETNAME configure -memorymap RW 0x18000000 0x00027000 BACKPLANE "Backplane Registers"
  80. $_TARGETNAME configure -memorymap RW 0x18100000 0x00032000 BACKPLANE2 "Backplane Wrapper Registers"
  81. $_TARGETNAME configure -memorymap RW 0x40000000 0x08000000 DDR "DDR"
  82. $_TARGETNAME configure -memorymap RW 0x001b0000 0x00090000 RAM "WLAN RAM"
  83. source [find $::SFLASH_WRITE_SCRIPT]
  84. proc init_attach_session {} {
  85. reset_config trst_only srst_gates_jtag connect_deassert_srst
  86. init
  87. }
  88. proc init_debug_session {} {
  89. reset_config trst_and_srst srst_nogate connect_assert_srst
  90. init
  91. reset init
  92. }
  93. proc ocd_gdb_restart {target_id} {
  94. init_debug_session
  95. }
  96. proc erase_all {} {
  97. if [catch {sflash_erase "$::SFLASH_LOADER_FILE" 43909}] {
  98. echo "** Erase operation failed **"
  99. } else {
  100. echo "** Erase operation completed successfully **"
  101. }
  102. }
  103. proc program {filename args} {
  104. set do_reset 0
  105. set do_exit 0
  106. set address 0
  107. foreach arg $args {
  108. if {[string equal $arg "preverify"]} {
  109. echo "** 'preverify' argument not supported **"
  110. } elseif {[string equal $arg "verify"]} {
  111. echo "** 'verify' argument not supported **"
  112. } elseif {[string equal $arg "reset"]} {
  113. set do_reset 1
  114. } elseif {[string equal $arg "exit"]} {
  115. set do_exit 1
  116. } else {
  117. set address $arg
  118. }
  119. }
  120. if { [file extension $filename] != ".bin" } {
  121. program_error "** Only binary files (*.bin) are supported, programming failed **" $do_exit
  122. return
  123. }
  124. # make sure init is called
  125. if {[catch {init}] != 0} {
  126. program_error "** OpenOCD init failed **" 1
  127. }
  128. # reset target and call any init scripts
  129. if {[catch {reset init}] != 0} {
  130. program_error "** Unable to reset target **" $do_exit
  131. }
  132. if [catch {sflash_write_file "$filename" "$address" "$::SFLASH_LOADER_FILE" 0 43909} ] {
  133. program_error "** Programming Failed **" $do_exit
  134. } else {
  135. echo "** Program operation completed successfully **"
  136. }
  137. if { $do_reset } {
  138. # reset target if requested
  139. if {$do_exit == 1} {
  140. # also disable target polling, we are shutting down anyway
  141. poll off
  142. }
  143. echo "** Resetting Target **"
  144. reset run
  145. }
  146. if { $do_exit } {
  147. shutdown
  148. }
  149. }