em357.cfg 2.1 KB

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  1. # SPDX-License-Identifier: GPL-2.0-or-later
  2. #
  3. # Target configuration for the Silicon Labs EM357 chips
  4. #
  5. #
  6. # em357 family supports JTAG and SWD transports
  7. #
  8. source [find target/swj-dp.tcl]
  9. if { [info exists CHIPNAME] } {
  10. set _CHIPNAME $CHIPNAME
  11. } else {
  12. set _CHIPNAME em357
  13. }
  14. # Work-area is a space in RAM used for flash programming
  15. # By default use 4kB
  16. if { [info exists WORKAREASIZE] } {
  17. set _WORKAREASIZE $WORKAREASIZE
  18. } else {
  19. set _WORKAREASIZE 0x1000
  20. }
  21. if { [info exists CPUTAPID] } {
  22. set _CPUTAPID $CPUTAPID
  23. } else {
  24. if { [using_jtag] } {
  25. set _CPUTAPID 0x3ba00477
  26. } else {
  27. set _CPUTAPID 0x1ba00477
  28. }
  29. }
  30. if { [info exists BSTAPID] } {
  31. set _BSTAPID $BSTAPID
  32. } else {
  33. set _BSTAPID 0x069a962b
  34. }
  35. if { [info exists CHIPNAME] } {
  36. set _CHIPNAME $CHIPNAME
  37. } else {
  38. set _CHIPNAME em358
  39. }
  40. if { [info exists FLASHSIZE] } {
  41. set _FLASHSIZE $FLASHSIZE
  42. } else {
  43. set _FLASHSIZE 0x30000
  44. }
  45. swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID
  46. dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
  47. if { [using_jtag] } {
  48. jtag newtap $_CHIPNAME bs -irlen 4 -expected-id $_BSTAPID -ircapture 0xe -irmask 0xf
  49. }
  50. set _TARGETNAME $_CHIPNAME.cpu
  51. target create $_TARGETNAME cortex_m -endian little -dap $_CHIPNAME.dap
  52. $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
  53. set _FLASHNAME $_CHIPNAME.flash
  54. flash bank $_FLASHNAME em357 0x08000000 $_FLASHSIZE 0 0 $_TARGETNAME
  55. if { ![using_hla]} {
  56. # according to errata, we need to use vectreset rather than sysresetreq to avoid lockup
  57. # There is a bug in the chip, which means that when using external debuggers the chip
  58. # may lock up in certain CPU clock modes. Affected modes are operating the CPU at
  59. # 24MHz derived from the 24MHz crystal, or 12MHz derived from the high frequency RC
  60. # oscillator. If an external debugger tool asserts SYSRESETREQ, the chip will lock up and
  61. # require a pin reset or power cycle.
  62. #
  63. # for details, refer to:
  64. # http://www.silabs.com/Support%20Documents/TechnicalDocs/EM35x-Errata.pdf
  65. cortex_m reset_config vectreset
  66. }