fm3.cfg 1.2 KB

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  1. # SPDX-License-Identifier: GPL-2.0-or-later
  2. # MB9BF506
  3. # Fujitsu Cortex-M3 with 512kB Flash and 64kB RAM
  4. source [find target/swj-dp.tcl]
  5. if { [info exists CHIPNAME] } {
  6. set _CHIPNAME $CHIPNAME
  7. } else {
  8. set _CHIPNAME mb9bfxx6
  9. }
  10. if { [info exists ENDIAN] } {
  11. set _ENDIAN $ENDIAN
  12. } else {
  13. set _ENDIAN little
  14. }
  15. if { [info exists CPUTAPID] } {
  16. set _CPUTAPID $CPUTAPID
  17. } else {
  18. set _CPUTAPID 0x4ba00477
  19. }
  20. # delays on reset lines
  21. adapter srst delay 100
  22. if {[using_jtag]} {
  23. jtag_ntrst_delay 100
  24. }
  25. # Fujitsu Cortex-M3 reset configuration
  26. reset_config trst_only
  27. swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
  28. dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
  29. set _TARGETNAME $_CHIPNAME.cpu
  30. target create $_TARGETNAME cortex_m -endian $_ENDIAN -dap $_CHIPNAME.dap
  31. # MB9BF506 has 64kB of SRAM on its main system bus
  32. $_TARGETNAME configure -work-area-phys 0x1FFF8000 -work-area-size 0x10000 -work-area-backup 0
  33. # MB9BF506 has 512kB internal FLASH
  34. set _FLASHNAME $_CHIPNAME.flash
  35. flash bank $_FLASHNAME fm3 0 0 0 0 $_TARGETNAME
  36. # 4MHz / 6 = 666kHz, so use 500
  37. adapter speed 500
  38. if {![using_hla]} {
  39. # if srst is not fitted use SYSRESETREQ to
  40. # perform a soft reset
  41. cortex_m reset_config sysresetreq
  42. }