apm32f0x.cfg 1.1 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849
  1. # SPDX-License-Identifier: GPL-2.0-or-later
  2. #
  3. # Geehy APM32F0x target
  4. #
  5. # https://global.geehy.com/MCU
  6. #
  7. #
  8. # APM32F0x devices support SWD transport only.
  9. #
  10. source [find target/swj-dp.tcl]
  11. if { [info exists CHIPNAME] } {
  12. set _CHIPNAME $CHIPNAME
  13. } else {
  14. set _CHIPNAME apm32f0x
  15. }
  16. # Work-area is a space in RAM used for flash programming, by default use 1 KiB.
  17. if { [info exists WORKAREASIZE] } {
  18. set _WORKAREASIZE $WORKAREASIZE
  19. } else {
  20. set _WORKAREASIZE 0x400
  21. }
  22. if { [info exists CPUTAPID] } {
  23. set _CPUTAPID $CPUTAPID
  24. } else {
  25. set _CPUTAPID 0x0bc11477
  26. }
  27. swj_newdap $_CHIPNAME cpu -expected-id $_CPUTAPID
  28. dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
  29. set _TARGETNAME $_CHIPNAME.cpu
  30. target create $_TARGETNAME cortex_m -endian little -dap $_CHIPNAME.dap
  31. $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
  32. set _FLASHNAME $_CHIPNAME.flash
  33. flash bank $_FLASHNAME stm32f1x 0x08000000 0 0 0 $_TARGETNAME
  34. adapter speed 1000
  35. if {![using_hla]} {
  36. # if srst is not fitted use SYSRESETREQ to perform a soft reset.
  37. cortex_m reset_config sysresetreq
  38. }