imx27.cfg 1.4 KB

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  1. # SPDX-License-Identifier: GPL-2.0-or-later
  2. # page 3-34 of "MCIMC27 Multimedia Applications Processor Reference Manual, Rev 0.3"
  3. # SRST pulls TRST
  4. #
  5. # Without setting these options correctly you'll see all sorts
  6. # of weird errors, e.g. MOE=0xe, invalid cpsr values, reset
  7. # failing, etc.
  8. reset_config trst_and_srst srst_pulls_trst
  9. if { [info exists CHIPNAME] } {
  10. set _CHIPNAME $CHIPNAME
  11. } else {
  12. set _CHIPNAME imx27
  13. }
  14. if { [info exists ENDIAN] } {
  15. set _ENDIAN $ENDIAN
  16. } else {
  17. set _ENDIAN little
  18. }
  19. # Note above there are 2 taps
  20. # trace buffer
  21. if { [info exists ETBTAPID] } {
  22. set _ETBTAPID $ETBTAPID
  23. } else {
  24. set _ETBTAPID 0x1b900f0f
  25. }
  26. jtag newtap $_CHIPNAME etb -irlen 4 -irmask 0xf -expected-id $_ETBTAPID
  27. # The CPU tap
  28. if { [info exists CPUTAPID] } {
  29. set _CPUTAPID $CPUTAPID
  30. } else {
  31. set _CPUTAPID 0x07926121
  32. }
  33. jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
  34. # Create the GDB Target.
  35. set _TARGETNAME $_CHIPNAME.cpu
  36. target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME
  37. # REVISIT what operating environment sets up this virtual address mapping?
  38. $_TARGETNAME configure -work-area-virt 0xffff4c00 -work-area-phys 0xffff4c00 \
  39. -work-area-size 0x8000 -work-area-backup 1
  40. # Internal to the chip, there is 45K of SRAM
  41. #
  42. arm7_9 dcc_downloads enable
  43. # trace setup
  44. etm config $_TARGETNAME 16 normal full etb
  45. etb config $_TARGETNAME $_CHIPNAME.etb