imx53.cfg 1.2 KB

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  1. # SPDX-License-Identifier: GPL-2.0-or-later
  2. # Freescale i.MX53
  3. if { [info exists CHIPNAME] } {
  4. set _CHIPNAME $CHIPNAME
  5. } else {
  6. set _CHIPNAME imx53
  7. }
  8. # CoreSight Debug Access Port
  9. if { [info exists DAP_TAPID] } {
  10. set _DAP_TAPID $DAP_TAPID
  11. } else {
  12. set _DAP_TAPID 0x1ba00477
  13. }
  14. jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf \
  15. -expected-id $_DAP_TAPID
  16. # SDMA / no IDCODE
  17. jtag newtap $_CHIPNAME sdma -irlen 4 -ircapture 0x0 -irmask 0xf
  18. # SJC
  19. if { [info exists SJC_TAPID] } {
  20. set _SJC_TAPID SJC_TAPID
  21. } else {
  22. set _SJC_TAPID 0x0190d01d
  23. }
  24. jtag newtap $_CHIPNAME sjc -irlen 5 -ircapture 0x1 -irmask 0x1f \
  25. -expected-id $_SJC_TAPID -ignore-version
  26. # GDB target: Cortex-A8, using DAP
  27. set _TARGETNAME $_CHIPNAME.cpu
  28. dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
  29. target create $_TARGETNAME cortex_a -dap $_CHIPNAME.dap
  30. # some TCK tycles are required to activate the DEBUG power domain
  31. jtag configure $_CHIPNAME.sjc -event post-reset "runtest 100"
  32. proc imx53_dbginit {target} {
  33. # General Cortex-A8 debug initialisation
  34. cortex_a dbginit
  35. }
  36. $_TARGETNAME configure -event reset-assert-post "imx53_dbginit $_TARGETNAME"