k1921vk01t.cfg 1.3 KB

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  1. # SPDX-License-Identifier: GPL-2.0-or-later
  2. # K1921VK01T
  3. # http://niiet.ru/chips/nis?id=354
  4. source [find target/swj-dp.tcl]
  5. source [find mem_helper.tcl]
  6. if { [info exists CHIPNAME] } {
  7. set _CHIPNAME $CHIPNAME
  8. } else {
  9. set _CHIPNAME k1921vk01t
  10. }
  11. set _ENDIAN little
  12. # Work-area is a space in RAM used for flash programming
  13. if { [info exists WORKAREASIZE] } {
  14. set _WORKAREASIZE $WORKAREASIZE
  15. } else {
  16. set _WORKAREASIZE 0x10000
  17. }
  18. #jtag scan chain
  19. if { [info exists CPUTAPID] } {
  20. set _CPUTAPID $CPUTAPID
  21. } else {
  22. if { [using_jtag] } {
  23. set _CPUTAPID 0x4ba00477
  24. } {
  25. # SWD IDCODE
  26. set _CPUTAPID 0x2ba01477
  27. }
  28. }
  29. swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
  30. dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
  31. set _TARGETNAME $_CHIPNAME.cpu
  32. target create $_TARGETNAME cortex_m -endian $_ENDIAN -dap $_CHIPNAME.dap
  33. $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
  34. flash bank $_CHIPNAME.flash niietcm4 0 0 0 0 $_TARGETNAME
  35. adapter speed 2000
  36. adapter srst delay 100
  37. if {[using_jtag]} {
  38. jtag_ntrst_delay 100
  39. }
  40. reset_config srst_nogate
  41. if {![using_hla]} {
  42. # if srst is not fitted use SYSRESETREQ to
  43. # perform a soft reset
  44. cortex_m reset_config sysresetreq
  45. }