psoc6_common.cfg 7.1 KB

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  1. #
  2. # Copyright (C) <2019-2021>
  3. # <Cypress Semiconductor Corporation (an Infineon company)>
  4. #
  5. # Common configuration for PSoC 64 family of microcontrollers.
  6. # PSoC 64 is a dual-core device with CM0+ and CM4 cores. Both cores share
  7. # the same Flash/RAM/MMIO address space.
  8. #
  9. source [find target/swj-dp.tcl]
  10. source [find target/mxs40/mxs40_common.cfg]
  11. global _CHIPNAME
  12. if { [info exists CHIPNAME] } {
  13. set _CHIPNAME $CHIPNAME
  14. } else {
  15. set _CHIPNAME psoc6
  16. }
  17. # Make MXS40_TARGET_DIE chip-specific
  18. if { ![info exists MXS40_TARGET_DIE] || ![dict exists $MXS40_DIE_CONFIG_DICT $MXS40_TARGET_DIE]} {
  19. puts stderr "MXS40_TARGET_DIE not defined or invalid!"
  20. puts stderr "Known dies: [dict keys $MXS40_DIE_CONFIG_DICT]"
  21. shutdown
  22. }
  23. set ${_CHIPNAME}::MXS40_TARGET_DIE $MXS40_TARGET_DIE
  24. unset MXS40_TARGET_DIE
  25. #
  26. # Is CM0 Debugging enabled ?
  27. #
  28. global _ENABLE_CM0
  29. if { [info exists ENABLE_CM0] } {
  30. set _ENABLE_CM0 $ENABLE_CM0
  31. } else {
  32. set _ENABLE_CM0 1
  33. }
  34. #
  35. # Is CM4 Debugging enabled ?
  36. #
  37. global _ENABLE_CM4
  38. if { [info exists ENABLE_CM4] } {
  39. set _ENABLE_CM4 $ENABLE_CM4
  40. } else {
  41. set _ENABLE_CM4 1
  42. }
  43. # set acquire mode: power cycle = 2, reset otherwise
  44. if { $_ENABLE_ACQUIRE == 2 } {
  45. kitprog3 acquire_config on 2 1 2
  46. } elseif { $_ENABLE_ACQUIRE } {
  47. kitprog3 acquire_config on 2 0 2
  48. }
  49. if { [info exists WORKAREAADDR] } {
  50. set _WA_ADDR $WORKAREAADDR
  51. unset WORKAREAADDR
  52. } else {
  53. set _WA_ADDR 0x08000000
  54. }
  55. if { [info exists WORKAREASIZE] } {
  56. set _WA_SIZE $WORKAREASIZE
  57. unset WORKAREASIZE
  58. } else {
  59. set _WA_SIZE 0x8000
  60. }
  61. global TARGET
  62. set TARGET $_CHIPNAME.cpu
  63. swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf
  64. dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
  65. proc check_flashboot_version {} {
  66. global _ENABLE_CM0
  67. set rev_id ""
  68. catch {
  69. set si_id [mrw 0x16000000]
  70. set fb_ver [mrw 0x16002004]
  71. set rev_id [format "%02X" [expr {($si_id & 0xFF00) >> 8}]]
  72. }
  73. # SI revision 0x22 (*B) and
  74. # versioning scheme #2 (ALXD-31) with major mersion #0 (PSoC6A-BLE-2 *A/*B/*C) and
  75. # FB build number older than #29
  76. if { $rev_id == "22" && \
  77. [expr {$fb_ver & 0xFF00FFFF}] == 0x02008001 } {
  78. set fb_build [expr {($fb_ver & 0x00FF0000) >> 16}]
  79. if { $fb_build <= 20 || ( $_ENABLE_CM0 == 0 && $fb_build < 29 ) } {
  80. puts stderr "********************************************************************************"
  81. puts stderr "* Your PSoC 6 kit is out of date. Please contact Cypress to get a replacement. *"
  82. puts stderr "********************************************************************************"
  83. } elseif { $fb_build < 29 } {
  84. puts stderr "*****************************************************"
  85. puts stderr "* You are using a pre-production PSoC 6 BLE device. *"
  86. puts stderr "*****************************************************"
  87. }
  88. }
  89. }
  90. if { $_ENABLE_CM0 } {
  91. set _ACQUIRE_TARGET cm0
  92. } else {
  93. set _ACQUIRE_TARGET cm4
  94. }
  95. global _HAS_WORKFLASH
  96. if { ![info exists _HAS_WORKFLASH] } {
  97. set _HAS_WORKFLASH 1
  98. }
  99. if { $_ENABLE_CM0 } {
  100. target create ${TARGET}.cm0 cortex_m -dap $_CHIPNAME.dap -ap-num 1 -coreid 0
  101. ${TARGET}.cm0 configure -work-area-phys $_WA_ADDR -work-area-size $_WA_SIZE -work-area-backup 0
  102. flash bank ${_CHIPNAME}_main_cm0 ${FLASH_DRIVER_NAME} 0x10000000 0 0 0 ${TARGET}.cm0
  103. if { $_HAS_WORKFLASH } {
  104. flash bank ${_CHIPNAME}_work_cm0 ${FLASH_DRIVER_NAME} 0x14000000 0 0 0 ${TARGET}.cm0
  105. }
  106. flash bank ${_CHIPNAME}_super_cm0 ${FLASH_DRIVER_NAME} 0x16000000 0 0 0 ${TARGET}.cm0
  107. flash bank ${_CHIPNAME}_efuse_cm0 ${FLASH_DRIVER_NAME}_efuse 0x90700000 1024 1 1 ${TARGET}.cm0 external
  108. add_verify_range ${TARGET}.cm0 0x08000000 0x00200000
  109. add_verify_range ${TARGET}.cm0 0x10000000 0x00200000
  110. add_verify_range ${TARGET}.cm0 0x14000000 0x00200000
  111. add_verify_range ${TARGET}.cm0 0x16000000 0x00200000
  112. add_verify_range ${TARGET}.cm0 0x90700000 0x00000400
  113. ${TARGET}.cm0 cortex_m reset_config sysresetreq
  114. ${TARGET}.cm0 configure -event reset-deassert-post "mxs40_reset_deassert_post psoc6 ${TARGET}.cm0"
  115. ${TARGET}.cm0 configure -event examine-end "cy_get_set_device_param $FLASH_DRIVER_NAME ${_CHIPNAME}_main_cm0 ${_CHIPNAME}_work_cm0"
  116. }
  117. if { $_ENABLE_CM4 } {
  118. target create ${TARGET}.cm4 cortex_m -dap $_CHIPNAME.dap -ap-num 2 -coreid 1
  119. ${TARGET}.cm4 configure -work-area-phys $_WA_ADDR -work-area-size $_WA_SIZE -work-area-backup 0
  120. if { $_ENABLE_CM0 } {
  121. flash bank ${_CHIPNAME}_main_cm4 virtual 0x10000000 0 0 0 ${TARGET}.cm4 ${_CHIPNAME}_main_cm0
  122. if { $_HAS_WORKFLASH } {
  123. flash bank ${_CHIPNAME}_work_cm4 virtual 0x14000000 0 0 0 ${TARGET}.cm4 ${_CHIPNAME}_work_cm0
  124. }
  125. flash bank ${_CHIPNAME}_super_cm4 virtual 0x16000000 0 0 0 ${TARGET}.cm4 ${_CHIPNAME}_super_cm0
  126. flash bank ${_CHIPNAME}_efuse_cm4 virtual 0x90700000 1024 1 1 ${TARGET}.cm4 ${_CHIPNAME}_efuse_cm0 external
  127. # Avoid double-reset on dual-core parts
  128. ${TARGET}.cm4 configure -event reset-assert {}
  129. targets ${TARGET}.cm0
  130. } else {
  131. flash bank ${_CHIPNAME}_main_cm4 ${FLASH_DRIVER_NAME} 0x10000000 0 0 0 ${TARGET}.cm4
  132. if { $_HAS_WORKFLASH } {
  133. flash bank ${_CHIPNAME}_work_cm4 ${FLASH_DRIVER_NAME} 0x14000000 0 0 0 ${TARGET}.cm4
  134. }
  135. flash bank ${_CHIPNAME}_super_cm4 ${FLASH_DRIVER_NAME} 0x16000000 0 0 0 ${TARGET}.cm4
  136. flash bank ${_CHIPNAME}_efuse_cm4 ${FLASH_DRIVER_NAME}_efuse 0x90700000 1024 1 1 ${TARGET}.cm4 external
  137. ${TARGET}.cm4 configure -event examine-end "cy_get_set_device_param $FLASH_DRIVER_NAME ${_CHIPNAME}_main_cm4 ${_CHIPNAME}_work_cm4"
  138. }
  139. add_verify_range ${TARGET}.cm4 0x08000000 0x00200000
  140. add_verify_range ${TARGET}.cm4 0x10000000 0x00200000
  141. add_verify_range ${TARGET}.cm4 0x14000000 0x00200000
  142. add_verify_range ${TARGET}.cm4 0x16000000 0x00200000
  143. add_verify_range ${TARGET}.cm4 0x90700000 0x00000400
  144. ${TARGET}.cm4 cortex_m reset_config sysresetreq
  145. ${TARGET}.cm4 configure -event reset-deassert-post "mxs40_reset_deassert_post psoc6 ${TARGET}.cm4"
  146. }
  147. unset _HAS_WORKFLASH
  148. if { ![info exists PSOC6_JTAG_IRLEN] } {
  149. set PSOC6_JTAG_IRLEN 18
  150. }
  151. if {[using_jtag]} {
  152. swj_newdap $_CHIPNAME bs -irlen $PSOC6_JTAG_IRLEN -expected-id 0
  153. }
  154. # example of qspi_config.cfg
  155. #set SMIF_BANKS {
  156. # 1 {addr 0x18000000 size 0x10000 psize 0x100 esize 0x1000}
  157. # 2 {addr 0x18010000 size 0x10000 psize 0x100 esize 0x1000}
  158. # 3 {addr 0x18020000 size 0x10000 psize 0x100 esize 0x1000}
  159. # 4 {addr 0x18030000 size 0x10000 psize 0x100 esize 0x1000}
  160. #}
  161. catch {source [find qspi_config.cfg]}
  162. if { [info exists SMIF_BANKS] } {
  163. set num_banks [array size SMIF_BANKS]
  164. set bank_param ""
  165. if { $num_banks > 1 } {
  166. set bank_param "prefer_sector_erase"
  167. }
  168. foreach {key value} [array get SMIF_BANKS] {
  169. if { $_ENABLE_CM0 } {
  170. flash bank ${_CHIPNAME}_smif${key}_cm0 cmsis_flash $value(addr) $value(size) 4 4 ${TARGET}.cm0 ../flm/cypress/cat1a/${QSPI_FLASHLOADER} 0x800 {*}$bank_param
  171. add_verify_range ${TARGET}.cm0 $value(addr) $value(size)
  172. if { $_ENABLE_CM4 } {
  173. flash bank ${_CHIPNAME}_smif${key}_cm4 virtual $value(addr) $value(size) 0 0 ${TARGET}.cm4 ${_CHIPNAME}_smif${key}_cm0
  174. add_verify_range ${TARGET}.cm4 $value(addr) $value(size)
  175. }
  176. } else {
  177. flash bank ${_CHIPNAME}_smif${key}_cm4 cmsis_flash $value(addr) $value(size) 4 4 ${TARGET}.cm4 ../flm/cypress/cat1a/${QSPI_FLASHLOADER} 0x800 {*}$bank_param
  178. add_verify_range ${TARGET}.cm4 $value(addr) $value(size)
  179. }
  180. }
  181. }
  182. gdb_smart_program enable