nrf52.cfg 4.0 KB

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  1. # SPDX-License-Identifier: GPL-2.0-or-later
  2. #
  3. # Nordic nRF52 series: ARM Cortex-M4 @ 64 MHz
  4. #
  5. source [find target/swj-dp.tcl]
  6. source [find mem_helper.tcl]
  7. if { [info exists CHIPNAME] } {
  8. set _CHIPNAME $CHIPNAME
  9. } else {
  10. set _CHIPNAME nrf52
  11. }
  12. # Work-area is a space in RAM used for flash programming
  13. # By default use 16kB
  14. if { [info exists WORKAREASIZE] } {
  15. set _WORKAREASIZE $WORKAREASIZE
  16. } else {
  17. set _WORKAREASIZE 0x4000
  18. }
  19. if { [info exists CPUTAPID] } {
  20. set _CPUTAPID $CPUTAPID
  21. } else {
  22. set _CPUTAPID 0x2ba01477
  23. }
  24. swj_newdap $_CHIPNAME cpu -expected-id $_CPUTAPID
  25. dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
  26. set _TARGETNAME $_CHIPNAME.cpu
  27. target create $_TARGETNAME cortex_m -dap $_CHIPNAME.dap
  28. adapter speed 1000
  29. $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
  30. if { [using_hla] } {
  31. echo ""
  32. echo "nRF52 device has a CTRL-AP dedicated to recover the device from AP lock."
  33. echo "A high level adapter (like a ST-Link) you are currently using cannot access"
  34. echo "the CTRL-AP so 'nrf52_recover' command will not work."
  35. echo "Do not enable UICR APPROTECT."
  36. echo ""
  37. } else {
  38. cortex_m reset_config sysresetreq
  39. $_TARGETNAME configure -event examine-fail nrf52_check_ap_lock
  40. }
  41. flash bank $_CHIPNAME.flash nrf5 0x00000000 0 1 1 $_TARGETNAME
  42. flash bank $_CHIPNAME.uicr nrf5 0x10001000 0 1 1 $_TARGETNAME
  43. # Test if MEM-AP is locked by UICR APPROTECT
  44. proc nrf52_check_ap_lock {} {
  45. set dap [[target current] cget -dap]
  46. set err [catch {set APPROTECTSTATUS [$dap apreg 1 0xc]}]
  47. if {$err == 0 && $APPROTECTSTATUS != 1} {
  48. echo "****** WARNING ******"
  49. echo "nRF52 device has AP lock engaged (see UICR APPROTECT register)."
  50. echo "Debug access is denied."
  51. echo "Use 'nrf52_recover' to erase and unlock the device."
  52. echo ""
  53. poll off
  54. }
  55. }
  56. # Mass erase and unlock the device using proprietary nRF CTRL-AP (AP #1)
  57. # http://www.ebyte.com produces modules with nRF52 locked by default,
  58. # use nrf52_recover to enable flashing and debug.
  59. proc nrf52_recover {} {
  60. set target [target current]
  61. set dap [$target cget -dap]
  62. set IDR [$dap apreg 1 0xfc]
  63. if {$IDR != 0x02880000} {
  64. echo "Error: Cannot access nRF52 CTRL-AP!"
  65. return
  66. }
  67. poll off
  68. # Reset and trigger ERASEALL task
  69. $dap apreg 1 4 0
  70. $dap apreg 1 4 1
  71. for {set i 0} {1} {incr i} {
  72. set ERASEALLSTATUS [$dap apreg 1 8]
  73. if {$ERASEALLSTATUS == 0} {
  74. echo "$target device has been successfully erased and unlocked."
  75. break
  76. }
  77. if {$i == 0} {
  78. echo "Waiting for chip erase..."
  79. }
  80. if {$i >= 150} {
  81. echo "Error: $target recovery failed."
  82. break
  83. }
  84. sleep 100
  85. }
  86. # Assert reset
  87. $dap apreg 1 0 1
  88. # Deassert reset
  89. $dap apreg 1 0 0
  90. # Reset ERASEALL task
  91. $dap apreg 1 4 0
  92. sleep 100
  93. $target arp_examine
  94. poll on
  95. }
  96. add_help_text nrf52_recover "Mass erase and unlock nRF52 device"
  97. tpiu create $_CHIPNAME.tpiu -dap $_CHIPNAME.dap -ap-num 0 -baseaddr 0xE0040000
  98. lappend _telnet_autocomplete_skip _proc_pre_enable_$_CHIPNAME.tpiu
  99. proc _proc_pre_enable_$_CHIPNAME.tpiu {_targetname _chipname} {
  100. targets $_targetname
  101. # Read FICR.INFO.PART
  102. set PART [mrw 0x10000100]
  103. switch $PART {
  104. 0x52840 -
  105. 0x52833 -
  106. 0x52832 {
  107. if { [$_chipname.tpiu cget -protocol] eq "sync" } {
  108. if { [$_chipname.tpiu cget -port-width] != 4 } {
  109. echo "Error. Device only supports 4-bit sync traces."
  110. return
  111. }
  112. # Set TRACECONFIG.TRACEMUX to enable synchronous trace
  113. mmw 0x4000055C 0x00020000 0x00010000
  114. $_targetname configure -event reset-end {
  115. mmw 0x4000055C 0x00020000 0x00010000
  116. }
  117. } else {
  118. # Set TRACECONFIG.TRACEMUX to enable SWO
  119. mmw 0x4000055C 0x00010000 0x00020000
  120. $_targetname configure -event reset-end {
  121. mmw 0x4000055C 0x00010000 0x00020000
  122. }
  123. }
  124. }
  125. 0x52820 -
  126. 0x52811 -
  127. 0x52810 -
  128. 0x52805 {
  129. echo "Error: Device does not support TPIU"
  130. return
  131. }
  132. default {
  133. echo "Error: Unknown device"
  134. return
  135. }
  136. }
  137. }
  138. $_CHIPNAME.tpiu configure -event pre-enable "_proc_pre_enable_$_CHIPNAME.tpiu $_TARGETNAME $_CHIPNAME"