omap2420.cfg 2.0 KB

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  1. # SPDX-License-Identifier: GPL-2.0-or-later
  2. # Texas Instruments OMAP 2420
  3. # http://www.ti.com/omap
  4. # as seen in Nokia N8x0 tablets
  5. if { [info exists CHIPNAME] } {
  6. set _CHIPNAME $CHIPNAME
  7. } else {
  8. set _CHIPNAME omap2420
  9. }
  10. # NOTE: likes slowish clock on reset (1.5 MBit/s or less) or use RCLK
  11. reset_config srst_nogate
  12. # Subsidiary TAP: ARM7TDMIr4 plus imaging ... must add via ICEpick (addr 6).
  13. jtag newtap $_CHIPNAME iva -irlen 4 -disable
  14. # Subsidiary TAP: C55x DSP ... must add via ICEpick (addr 2).
  15. jtag newtap $_CHIPNAME dsp -irlen 38 -disable
  16. # Subsidiary TAP: ARM ETB11, with scan chain for 4K of ETM trace buffer
  17. if { [info exists ETB_TAPID] } {
  18. set _ETB_TAPID $ETB_TAPID
  19. } else {
  20. set _ETB_TAPID 0x2b900f0f
  21. }
  22. jtag newtap $_CHIPNAME etb -irlen 4 -expected-id $_ETB_TAPID
  23. # Subsidiary TAP: ARM1136jf-s with scan chains for ARM Debug, EmbeddedICE-RT, ETM.
  24. if { [info exists CPU_TAPID] } {
  25. set _CPU_TAPID $CPU_TAPID
  26. } else {
  27. set _CPU_TAPID 0x07b3602f
  28. }
  29. jtag newtap $_CHIPNAME arm -irlen 5 -expected-id $_CPU_TAPID
  30. # Primary TAP: ICEpick-B (JTAG route controller) and boundary scan
  31. if { [info exists JRC_TAPID] } {
  32. set _JRC_TAPID $JRC_TAPID
  33. } else {
  34. set _JRC_TAPID 0x01ce4801
  35. }
  36. jtag newtap $_CHIPNAME jrc -irlen 2 -expected-id $_JRC_TAPID
  37. # GDB target: the ARM.
  38. set _TARGETNAME $_CHIPNAME.arm
  39. target create $_TARGETNAME arm11 -chain-position $_TARGETNAME
  40. # scratch: framebuffer, may be initially unavailable in some chips
  41. $_TARGETNAME configure -work-area-phys 0x40210000
  42. $_TARGETNAME configure -work-area-size 0x00081000
  43. $_TARGETNAME configure -work-area-backup 0
  44. # trace setup ... NOTE, "normal full" mode fudges the real ETMv3.1 mode
  45. etm config $_TARGETNAME 16 normal full etb
  46. etb config $_TARGETNAME $_CHIPNAME.etb
  47. # RM_RSTCTRL_WKUP.RST.GS - Trigger a global software reset, and
  48. # give it a chance to finish before we talk to the chip again.
  49. set RM_RSTCTRL_WKUP 0x48008450
  50. $_TARGETNAME configure -event reset-assert \
  51. "halt; $_TARGETNAME mww $RM_RSTCTRL_WKUP 2; sleep 200"