pxa3xx.cfg 2.4 KB

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  1. # SPDX-License-Identifier: GPL-2.0-or-later
  2. # Marvell PXA3xx
  3. if { [info exists CHIPNAME] } {
  4. set _CHIPNAME $CHIPNAME
  5. } else {
  6. set _CHIPNAME pxa3xx
  7. }
  8. if { [info exists ENDIAN] } {
  9. set _ENDIAN $ENDIAN
  10. } else {
  11. set _ENDIAN little
  12. }
  13. # IDs for all currently known PXA3xx chips
  14. if { [info exists CPUTAPID_PXA30X_A0] } {
  15. set _CPUTAPID_PXA30X_A0 $CPUTAPID_PXA30X_A0
  16. } else {
  17. set _CPUTAPID_PXA30X_A0 0x0E648013
  18. }
  19. if { [info exists CPUTAPID_PXA30X_A1] } {
  20. set _CPUTAPID_PXA30X_A1 $CPUTAPID_PXA30X_A1
  21. } else {
  22. set _CPUTAPID_PXA30X_A1 0x1E648013
  23. }
  24. if { [info exists CPUTAPID_PXA31X_A0] } {
  25. set _CPUTAPID_PXA31X_A0 $CPUTAPID_PXA31X_A0
  26. } else {
  27. set _CPUTAPID_PXA31X_A0 0x0E649013
  28. }
  29. if { [info exists CPUTAPID_PXA31X_A1] } {
  30. set _CPUTAPID_PXA31X_A1 $CPUTAPID_PXA31X_A1
  31. } else {
  32. set _CPUTAPID_PXA31X_A1 0x1E649013
  33. }
  34. if { [info exists CPUTAPID_PXA31X_A2] } {
  35. set _CPUTAPID_PXA31X_A2 $CPUTAPID_PXA31X_A2
  36. } else {
  37. set _CPUTAPID_PXA31X_A2 0x2E649013
  38. }
  39. if { [info exists CPUTAPID_PXA31X_B0] } {
  40. set _CPUTAPID_PXA31X_B0 $CPUTAPID_PXA31X_B0
  41. } else {
  42. set _CPUTAPID_PXA31X_B0 0x3E649013
  43. }
  44. if { [info exists CPUTAPID_PXA32X_B1] } {
  45. set _CPUTAPID_PXA32X_B1 $CPUTAPID_PXA32X_B1
  46. } else {
  47. set _CPUTAPID_PXA32X_B1 0x5E642013
  48. }
  49. if { [info exists CPUTAPID_PXA32X_B2] } {
  50. set _CPUTAPID_PXA32X_B2 $CPUTAPID_PXA32X_B2
  51. } else {
  52. set _CPUTAPID_PXA32X_B2 0x6E642013
  53. }
  54. if { [info exists CPUTAPID_PXA32X_C0] } {
  55. set _CPUTAPID_PXA32X_C0 $CPUTAPID_PXA32X_C0
  56. } else {
  57. set _CPUTAPID_PXA32X_C0 0x7E642013
  58. }
  59. # set adapter srst delay to the delay introduced by your reset circuit
  60. # the rest of the needed delays are built into the openocd program
  61. adapter srst delay 260
  62. # set the jtag_ntrst_delay to the delay introduced by a reset circuit
  63. # the rest of the needed delays are built into the openocd program
  64. jtag_ntrst_delay 250
  65. set _TARGETNAME $_CHIPNAME.cpu
  66. jtag newtap $_CHIPNAME cpu -irlen 11 -ircapture 0x1 -irmask 0x7f \
  67. -expected-id $_CPUTAPID_PXA30X_A0 \
  68. -expected-id $_CPUTAPID_PXA30X_A1 \
  69. -expected-id $_CPUTAPID_PXA31X_A0 \
  70. -expected-id $_CPUTAPID_PXA31X_A1 \
  71. -expected-id $_CPUTAPID_PXA31X_A2 \
  72. -expected-id $_CPUTAPID_PXA31X_B0 \
  73. -expected-id $_CPUTAPID_PXA32X_B1 \
  74. -expected-id $_CPUTAPID_PXA32X_B2 \
  75. -expected-id $_CPUTAPID_PXA32X_C0
  76. target create $_TARGETNAME xscale -endian $_ENDIAN \
  77. -chain-position $_TARGETNAME
  78. # work area in internal RAM.
  79. $_TARGETNAME configure -work-area-phys 0x5c030000 -work-area-size 0x10000