ti_cc32xx.cfg 1.4 KB

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  1. # SPDX-License-Identifier: GPL-2.0-or-later
  2. #
  3. # Texas Instruments CC32xx - ARM Cortex-M4
  4. #
  5. # http://www.ti.com/product/CC3200
  6. # http://www.ti.com/product/CC3220
  7. #
  8. source [find target/swj-dp.tcl]
  9. source [find target/icepick.cfg]
  10. if { [info exists CHIPNAME] } {
  11. set _CHIPNAME $CHIPNAME
  12. } else {
  13. set _CHIPNAME cc32xx
  14. }
  15. #
  16. # Main DAP
  17. #
  18. if { [info exists DAP_TAPID] } {
  19. set _DAP_TAPID $DAP_TAPID
  20. } else {
  21. if {[using_jtag]} {
  22. set _DAP_TAPID 0x4BA00477
  23. } else {
  24. set _DAP_TAPID 0x2BA01477
  25. }
  26. }
  27. if {[using_jtag]} {
  28. jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_DAP_TAPID -disable
  29. jtag configure $_CHIPNAME.cpu -event tap-enable "icepick_c_tapenable $_CHIPNAME.jrc 0"
  30. } else {
  31. swj_newdap $_CHIPNAME cpu -expected-id $_DAP_TAPID
  32. }
  33. #
  34. # ICEpick-C (JTAG route controller)
  35. #
  36. if { [info exists JRC_TAPID] } {
  37. set _JRC_TAPID $JRC_TAPID
  38. } else {
  39. set _JRC_TAPID 0x0B97C02F
  40. }
  41. if {[using_jtag]} {
  42. jtag newtap $_CHIPNAME jrc -irlen 6 -ircapture 0x1 -irmask 0x3f -expected-id $_JRC_TAPID -ignore-version
  43. jtag configure $_CHIPNAME.jrc -event setup "jtag tapenable $_CHIPNAME.cpu"
  44. }
  45. set _TARGETNAME $_CHIPNAME.cpu
  46. dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
  47. target create $_TARGETNAME cortex_m -dap $_CHIPNAME.dap
  48. if { [info exists WORKAREASIZE] } {
  49. set _WORKAREASIZE $WORKAREASIZE
  50. } else {
  51. set _WORKAREASIZE 0x2000
  52. }
  53. $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0