sdk-debugger-openocd-infineon/scripts/target/traveo2_6m_b1.cfg

#
# Copyright (C) <2019-2024>
#   <Cypress Semiconductor Corporation (an Infineon company)>
#
# Configuration script for Cypress TRAVEO™II C-2D family of microcontrollers.
# TRAVEO™II C-2D is a triple-core device with CM0+ and 2xCM7 cores. All cores share
# the same Flash/RAM/MMIO address space.
#
source [find target/infineon/common/common_ifx.cfg]

# The following four lines can be used to override Flash Geometry of the target device
# In this case configuration scripts will not perform any auto-detection and will use
# predefined values.
# If all these variables are set to zero, configuration scripts will attempt to detect
# the type of target device by reading SiliconID from SFlash and matching it with MPN
# database, see cympn.cfg file.
set MAIN_LARGE_SECTOR_NUM 190
set MAIN_SMALL_SECTOR_NUM 32
set WORK_LARGE_SECTOR_NUM 48
set WORK_SMALL_SECTOR_NUM 256

echo "** Supported Flash Loaders: ***********************"
echo "** SMIF0_LOADER: TV2C2D6MB1_S0_S28HS512T.elf - 8S8S8S TRX mode"
echo "**               TV2C2D6MB1_S0_DDR_S28HS512T.elf - 8D8D8D TRX mode"
echo "** SMIF1_LOADER: TV2C2D6MB1_S1_DQ_S25HS512T.elf"
echo "**               TV2C2D6MB1_S1_S26HS01GT.elf (in SPI-1S1S1S mode)"
echo "** enable_hyperram: TV2C2D6MB1_S1_S27KL064.elf (mapped to 0x84000000)"
echo "***************************************************"

# Reset configuration - use hardware XRES pin
# If this line is commented-out OpenOCD will use SYSRESETREQ to reset the CM0+ core and
# all peripherals. This will also reset CM4/CM7 cores.
# reset_config srst_only srst_pulls_trst

# Defines the name of the Target and allows to override it from the command line
ifx::set_or_global CHIPNAME     traveo2_6m
set TARGET_VARIANT              TVIIC2D6M

# Include common functionality script
source [find target/infineon/cat1c/base_cytxxx.cfg]


proc enable_hyperram { hram_loader } {
	set xip_base 0x84000000
	catch {
		load_image ../flm/cypress/traveo2/${hram_loader} 0x28000800
		reg pc 0x28000800
		reg sp 0x28010000
		reg r9 0x28002800
		resume 0x28000800
		wait_halt
		mrw $xip_base
		echo "** HyperRAM mapped to address [format 0x%08X $xip_base]"
	}
}