sdk-debugger-openocd-infineon/scripts/target/traveo2_ce_4m.cfg

#
# Copyright (C) <2019-2021>
#   <Cypress Semiconductor Corporation (an Infineon company)>
#
# Configuration script for Cypress TRAVEO™II CE-4M family of microcontrollers.
# TRAVEO™II CE-4M is a dual-core device with CM0+ and CM4 cores. All cores share
# the same Flash/RAM/MMIO address space.
#
source [find target/infineon/common/common_ifx.cfg]

# The following four lines can be used to override Flash Geometry of the target device
# In this case configuration scripts will not perform any auto-detection and will use
# predefined values.
# If all these variables are set to zero, configuration scripts will attempt to detect
# the type of target device by reading SiliconID from SFlash and matching it with MPN
# database, see cympn.cfg file.
set MAIN_LARGE_SECTOR_NUM 126
set MAIN_SMALL_SECTOR_NUM 16
set WORK_LARGE_SECTOR_NUM 48
set WORK_SMALL_SECTOR_NUM 256

echo "** Supported Flash Loaders: ***********************"
echo "** SMIF0_LOADER: TV2CE4MA0_S26HL512T.elf"
echo "** enable_hyperram: TV2CE4MA0_S27KL064.elf (mapped to 0x1C000000)"
echo "***************************************************"

# Reset configuration - use hardware XRES pin
# If this line is commented-out OpenOCD will use SYSRESETREQ to reset the CM0+ core and
# all peripherals. This will also reset CM4/CM7 cores.
# reset_config srst_only srst_pulls_trst

# Defines the name of the Target and allows to override it from the command line
ifx::set_or_global CHIPNAME traveo2_ce_4m

set TARGET_VARIANT TVIICE4M

# Include common functionality script
source [find target/infineon/cat1a/base_cyt2xx.cfg]

if { [info exists SMIF0_LOADER] } {
	flash bank ${CHIPNAME}_smif0_cm0 cmsis_flash 0x18000000 0 4 4 ${TARGET}.cm0 ../flm/cypress/traveo2/${SMIF0_LOADER} 0x1000
	flash bank ${CHIPNAME}_smif0_cm4 virtual     0x18000000 0 4 4 ${TARGET}.cm4 ${CHIPNAME}_smif0_cm0
	unset SMIF0_LOADER
}


proc enable_hyperram { hram_loader } {
	set xip_base 0x1C000000
	catch {
		load_image ../flm/cypress/traveo2/${hram_loader} 0x08000800
		reg pc 0x08000800
		reg sp 0x08010000
		reg r9 0x08002800
		resume 0x08000800
		wait_halt
		mrw $xip_base
		echo "** HyperRAM mapped to address [format 0x%08X $xip_base]"
	}
}