imx6ul.cfg 1.2 KB

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  1. #
  2. # Freescale i.MX6UltraLite series: 6UL 6ULL 6ULZ
  3. #
  4. if { [info exists CHIPNAME] } {
  5. set _CHIPNAME $CHIPNAME
  6. } else {
  7. set _CHIPNAME imx6ul
  8. }
  9. # CoreSight Debug Access Port
  10. if { [info exists DAP_TAPID] } {
  11. set _DAP_TAPID $DAP_TAPID
  12. } else {
  13. set _DAP_TAPID 0x4ba00477
  14. }
  15. jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x01 -irmask 0x0f \
  16. -expected-id $_DAP_TAPID
  17. # SDMA / no IDCODE
  18. jtag newtap $_CHIPNAME sdma -irlen 4 -ircapture 0x00 -irmask 0x0f
  19. # System JTAG Controller
  20. set _SJC_TAPID_6UL 0x0891d01d
  21. set _SJC_TAPID_6ULL 0x0891e01d
  22. set _SJC_TAPID_6ULZ 0x1891e01d
  23. # Allow external override of the first SJC TAPID
  24. if { [info exists SJC_TAPID] } {
  25. set _SJC_TAPID $SJC_TAPID
  26. } else {
  27. set _SJC_TAPID $_SJC_TAPID_6UL
  28. }
  29. jtag newtap $_CHIPNAME sjc -irlen 5 -ircapture 0x01 -irmask 0x1f \
  30. -ignore-version \
  31. -expected-id $_SJC_TAPID \
  32. -expected-id $_SJC_TAPID_6ULL \
  33. -expected-id $_SJC_TAPID_6ULZ \
  34. # Create DAP
  35. dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
  36. # Main AHB bus
  37. target create $_CHIPNAME.ahb mem_ap -dap $_CHIPNAME.dap -ap-num 0
  38. # Cortex-A7 single core
  39. set _TARGETNAME $_CHIPNAME.cpu
  40. target create $_TARGETNAME cortex_a -dap $_CHIPNAME.dap -dbgbase 0x82130000