imxrt.cfg 4.5 KB

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  1. if { [info exists CHIPNAME] } {
  2. set _CHIPNAME $CHIPNAME
  3. } else {
  4. set _CHIPNAME imxrt
  5. }
  6. source [find mem_helper.tcl]
  7. # ---------------------------------------------- Auxiliary functions for accessing i.MXRT registers ----------------------------------------------
  8. # SBMR2: Bit 25..24:
  9. # BOOT_MODE[1:0]: 00b - Boot From Fuses
  10. # 01b - Serial Downloader
  11. # 10b - Internal Boot
  12. # 11b - Reserved
  13. proc get_boot_mode {} {
  14. set SRC_SBMR2 [ mrw 0x400F801C ]
  15. set bootmode [expr ($SRC_SBMR2 & 0x03000000) >> 24 ]
  16. return $bootmode
  17. }
  18. # Boot Device: 0000b - Serial NOR boot via FlexSPI
  19. # 001xb - SD boot via uSDHC
  20. # 10xxb - eMMC/MMC boot via uSDHC
  21. # 01xxb - SLC NAND boot via SEMC
  22. # 0001b - Parallel NOR boot via SEMC
  23. # 11xxb - Serial NAND boot via FlexSPI
  24. proc get_boot_device {} {
  25. set SRC_SBMR1 [ mrw 0x400F8004 ]
  26. set bootdevice [expr ($SRC_SBMR1 & 0x000000F0) >> 4 ]
  27. return $bootdevice
  28. }
  29. proc get_reset_vector {} {
  30. global FLASH_MEMORY_BASE
  31. set MAX_FLASH_MEMORY_SIZE 0x10000000
  32. set vector_table_addr [ mrw [expr $FLASH_MEMORY_BASE + 0x1004 ] ]
  33. if { ($vector_table_addr < $FLASH_MEMORY_BASE) || ($vector_table_addr > ($FLASH_MEMORY_BASE + $MAX_FLASH_MEMORY_SIZE)) } {
  34. echo "Invalid vector table address: $vector_table_addr"
  35. return 0
  36. }
  37. set reset_vector [ mrw [expr $vector_table_addr + 4] ]
  38. return $reset_vector
  39. }
  40. # ------------------------------------------------------------------------------------------------------------------------------------------------
  41. set RESET_INTO_BOOT_ROM 0
  42. #The regular "reset halt" command on i.MXRT will stop the chip at the internal entry point in the boot ROM.
  43. #At this point the internal bootloader has not initialized the peripherals set.
  44. #So normally, we want to instead let the bootloader run and stop when it invokes the entry point of the main program.
  45. #The 'reset_into_boot_rom' command controls this behavior.
  46. #Usage: reset_into_boot_rom 0/1
  47. proc reset_into_boot_rom { flag } {
  48. global RESET_INTO_BOOT_ROM
  49. set RESET_INTO_BOOT_ROM $flag
  50. if { $flag } {
  51. echo "'reset halt' will now try to stop in the boot ROM"
  52. } else {
  53. echo "'reset halt' will now try to stop at the entry point in FLASH"
  54. }
  55. return ""
  56. }
  57. set FLASH_MEMORY_BASE 0x60000000
  58. proc init_reset { mode } {
  59. global RESET_INTO_BOOT_ROM
  60. global PENDING_ENTRY_POINT_ADDRESS
  61. set PENDING_ENTRY_POINT_ADDRESS 0
  62. if { ($mode eq "run") || $RESET_INTO_BOOT_ROM } {
  63. return
  64. }
  65. halt
  66. wait_halt 1000
  67. set bootmode [ get_boot_mode ]
  68. set bootdev [ get_boot_device ]
  69. if { $bootmode != 2 } {
  70. echo "Cannot reset into entry when boot mode is $bootmode"
  71. return
  72. }
  73. if { $bootdev != 0 } {
  74. echo "Cannot reset into entry when boot device is $bootdev"
  75. return
  76. }
  77. set entry_point [ get_reset_vector ]
  78. if { $entry_point == 0 } {
  79. echo "Cannot locate the reset vector in FLASH memory. Make sure FLASH is not empty and FlexSPI is initialized."
  80. return
  81. }
  82. set PENDING_ENTRY_POINT_ADDRESS $entry_point
  83. }
  84. #
  85. # Only SWD and SPD supported
  86. #
  87. source [find target/swj-dp.tcl]
  88. if { [info exists CPUTAPID] } {
  89. set _CPU_SWD_TAPID $CPUTAPID
  90. } else {
  91. set _CPU_SWD_TAPID 0x0BD11477
  92. }
  93. swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPU_SWD_TAPID
  94. dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
  95. set _TARGETNAME $_CHIPNAME.cpu
  96. target create $_TARGETNAME cortex_m -endian little -dap $_CHIPNAME.dap
  97. if { [info exists WORKAREASIZE] } {
  98. set _WORKAREASIZE $WORKAREASIZE
  99. } else {
  100. set _WORKAREASIZE 0x4000
  101. }
  102. $_TARGETNAME configure -work-area-phys 0x20200000 \
  103. -work-area-size $_WORKAREASIZE \
  104. -work-area-backup 0
  105. $_TARGETNAME configure -event reset-deassert-post {
  106. global PENDING_ENTRY_POINT_ADDRESS
  107. set halt_timeout 1000
  108. if { $PENDING_ENTRY_POINT_ADDRESS } {
  109. wait_halt $halt_timeout
  110. set entry_point_hex [ format "0x%X" $PENDING_ENTRY_POINT_ADDRESS ]
  111. echo "Found entry point at $entry_point_hex. Setting a temporary breakpoint and resetting..."
  112. bp $entry_point_hex 2 hw
  113. resume
  114. wait_halt $halt_timeout
  115. rbp $entry_point_hex
  116. }
  117. }
  118. #Using SRST on i.MXRT devices will not get the chip to halt. Doing a system reset on the ARM Cortex level instead works as expected
  119. cortex_m reset_config sysresetreq
  120. reset_config none
  121. #To support FLASH programming on i.MXRT, download the FLASH plugin from https://github.com/sysprogs/flash_drivers and adjust/uncomment the line below:
  122. #flash bank imxrt plugin $FLASH_MEMORY_BASE 0 0 0 0 flash/IMXRT1050_HyperFLASH_ROMAPI.elf