u8500.cfg 6.1 KB

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  1. # Copyright (C) ST-Ericsson SA 2011
  2. # Author : michel.jaouen@stericsson.com
  3. # U8500 target
  4. proc mmu_off {} {
  5. set cp [arm mrc 15 0 1 0 0]
  6. set cp [expr {$cp & ~1}]
  7. arm mcr 15 0 1 0 0 $cp
  8. }
  9. proc mmu_on {} {
  10. set cp [arm mrc 15 0 1 0 0]
  11. set cp [expr {$cp | 1}]
  12. arm mcr 15 0 1 0 0 $cp
  13. }
  14. proc ocd_gdb_restart {target_id} {
  15. global _TARGETNAME_1
  16. global _SMP
  17. targets $_TARGETNAME_1
  18. if { $_SMP == 1 } {
  19. cortex_a smp off
  20. }
  21. rst_run
  22. halt
  23. if { $_SMP == 1 } {
  24. cortex_a smp on
  25. }
  26. }
  27. proc smp_reg {} {
  28. global _TARGETNAME_1
  29. global _TARGETNAME_2
  30. targets $_TARGETNAME_1
  31. echo "$_TARGETNAME_1"
  32. set pc1 [reg pc]
  33. set stck1 [reg sp_svc]
  34. targets $_TARGETNAME_2
  35. echo "$_TARGETNAME_1"
  36. set pc2 [reg pc]
  37. set stck2 [reg sp_svc]
  38. }
  39. proc u8500_tapenable {chip val} {
  40. echo "JTAG tap enable $chip"
  41. }
  42. proc pwrsts { } {
  43. global _CHIPNAME
  44. irscan $_CHIPNAME.jrc 0x3a
  45. drscan $_CHIPNAME.jrc 4 0
  46. set pwrsts [drscan $_CHIPNAME.jrc 16 0]
  47. echo "pwrsts ="$pwrsts
  48. set a9 [expr "0x$pwrsts & 0xc"]
  49. set ape [expr "0x$pwrsts & 0x3"]
  50. if {[string equal "0" $ape]} {
  51. echo "ape off"
  52. } else {
  53. echo "ape on"
  54. }
  55. echo "$a9"
  56. switch $a9 {
  57. 4 {
  58. echo "A9 in retention"
  59. }
  60. 8 {
  61. echo "A9 100% DVFS"
  62. }
  63. c {
  64. echo "A9 50% DVFS"
  65. }
  66. }
  67. }
  68. proc poll_pwrsts { } {
  69. global _CHIPNAME
  70. set result 1
  71. set i 0
  72. irscan $_CHIPNAME.jrc 0x3a
  73. drscan $_CHIPNAME.jrc 4 0
  74. set pwrsts [drscan $_CHIPNAME.jrc 16 0]
  75. set pwrsts [expr "0x$pwrsts & 0xc"]
  76. while {[string equal "4" $pwrsts] && $i<20} {
  77. irscan $_CHIPNAME.jrc 0x3a
  78. drscan $_CHIPNAME.jrc 4 0;
  79. set pwrsts [drscan $_CHIPNAME.jrc 16 0]
  80. set pwrsts [expr "0x$pwrsts & 0xc"]
  81. if {![string equal "4" $pwrsts]} {
  82. set result 1
  83. } else {
  84. set result 0
  85. sleep 200
  86. echo "loop $i"
  87. }
  88. incr i
  89. }
  90. return $result
  91. }
  92. proc halt_ { } {
  93. if {[poll_pwrsts]==1} {
  94. halt
  95. } else {
  96. echo "halt failed : target in retention"
  97. }
  98. }
  99. proc u8500_dapenable {chip} {
  100. }
  101. proc u8500_tapdisable {chip val} {
  102. echo "JTAG tap disable $chip"
  103. }
  104. proc enable_apetap {} {
  105. global _CHIPNAME
  106. global _TARGETNAME_2
  107. global _TARGETNAME_1
  108. poll off
  109. irscan $_CHIPNAME.jrc 0x3e
  110. drscan $_CHIPNAME.jrc 8 0xcf
  111. jtag tapenable $_CHIPNAME.dap
  112. irscan $_CHIPNAME.jrc 0x6
  113. drscan $_CHIPNAME.jrc 32 0
  114. irscan $_CHIPNAME.jrc 0x6
  115. drscan $_CHIPNAME.jrc 32 0
  116. set status [$_TARGETNAME_1 curstate]
  117. if {[string equal "unknown" $status]} {
  118. $_TARGETNAME_1 arp_examine
  119. cache_config l2x 0xa0412000 8
  120. }
  121. set status [$_TARGETNAME_2 curstate]
  122. if {[string equal "unknown" $status]} {
  123. $_TARGETNAME_2 arp_examine
  124. }
  125. }
  126. tcl_port 5555
  127. telnet_port 4444
  128. gdb_port 3333
  129. if { [info exists CHIPNAME] } {
  130. global _CHIPNAME
  131. set _CHIPNAME $CHIPNAME
  132. } else {
  133. global _CHIPNAME
  134. set _CHIPNAME u8500
  135. }
  136. if { [info exists ENDIAN] } {
  137. set _ENDIAN $ENDIAN
  138. } else {
  139. # this defaults to a bigendian
  140. set _ENDIAN little
  141. }
  142. # Subsidiary TAP: APE with scan chains for ARM Debug, EmbeddedICE-RT,
  143. if { [info exists CPUTAPID] } {
  144. set _CPUTAPID $CPUTAPID
  145. } else {
  146. set _CPUTAPID 0x4ba00477
  147. }
  148. jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0xe -irmask 0xf -expected-id $_CPUTAPID -disable
  149. jtag configure $_CHIPNAME.cpu -event tap-enable \
  150. "u8500_dapenable $_CHIPNAME.cpu"
  151. jtag configure $_CHIPNAME.cpu -event tap-disable \
  152. "u8500_tapdisable $_CHIPNAME.cpu 0xc0"
  153. #CLTAPC TAP JRC equivalent
  154. if { [info exists CLTAPC_ID] } {
  155. set _CLTAPC_ID $CLTAPC_ID
  156. } else {
  157. set _CLTAPC_ID 0x22286041
  158. }
  159. jtag newtap $_CHIPNAME jrc -irlen 6 -ircapture 0x6 -irmask 0xf -expected-id $_CLTAPC_ID -ignore-version
  160. if { ![info exists TARGETNAME_1] } {
  161. global _TARGETNAME_1
  162. set _TARGETNAME_1 $_CHIPNAME.cpu1
  163. } else {
  164. global _TARGETNAME_1
  165. set _TARGETNAME_1 $TARGETNAME_1
  166. }
  167. if { [info exists DAP_DBG1] } {
  168. set _DAP_DBG1 $DAP_DBG1
  169. } else {
  170. set _DAP_DBG1 0x801A8000
  171. }
  172. if { [info exists DAP_DBG2] } {
  173. set _DAP_DBG2 $DAP_DBG2
  174. } else {
  175. set _DAP_DBG2 0x801AA000
  176. }
  177. dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
  178. target create $_TARGETNAME_1 cortex_a -dap $_CHIPNAME.dap -dbgbase $_DAP_DBG1 -coreid 0 -rtos linux
  179. if { ![info exists TARGETNAME_2] } {
  180. global _TARGETNAME_2
  181. set _TARGETNAME_2 $_CHIPNAME.cpu2
  182. } else {
  183. global _TARGETNAME_2
  184. set _TARGETNAME_2 $TARGETNAME_2
  185. }
  186. target create $_TARGETNAME_2 cortex_a -dap $_CHIPNAME.dap -dbgbase $_DAP_DBG2 -coreid 1 -rtos linux
  187. if {![info exists SMP]} {
  188. global _SMP
  189. set _SMP 1
  190. } else {
  191. global _SMP
  192. set _SMP $SMP
  193. }
  194. global SMP
  195. if { $_SMP == 1} {
  196. target smp $_CHIPNAME.cpu2 $_CHIPNAME.cpu1
  197. }
  198. proc secsts1 { } {
  199. global _CHIPNAME
  200. irscan $_CHIPNAME.jrc 0x3a
  201. drscan $_CHIPNAME.jrc 4 4
  202. set secsts1 [drscan $_CHIPNAME.jrc 16 0]
  203. echo "secsts1 ="$secsts1
  204. set secsts1 [expr "0x$secsts1 & 0x4"]
  205. if {![string equal "4" $secsts1]} {
  206. echo "APE target secured"
  207. } else {
  208. echo "APE target not secured"
  209. }
  210. }
  211. proc att { } {
  212. global _CHIPNAME
  213. jtag arp_init
  214. irscan $_CHIPNAME.jrc 0x3a
  215. drscan $_CHIPNAME.jrc 4 4
  216. set secsts1 [drscan $_CHIPNAME.jrc 16 0]
  217. echo "secsts1 ="$secsts1
  218. set secsts1 [expr "0x$secsts1 & 0x4"]
  219. if {[string equal "4" $secsts1]} {
  220. if {[poll_pwrsts]==1} {
  221. enable_apetap
  222. } else {
  223. echo "target in retention"
  224. }
  225. } else {
  226. echo "target secured"
  227. }
  228. }
  229. proc rst_run { } {
  230. global _CHIPNAME
  231. global _TARGETNAME_2
  232. global _TARGETNAME_1
  233. set status [$_TARGETNAME_1 curstate]
  234. if {[string equal "halted" $status]} {
  235. resume
  236. targets $_TARGETNAME_1
  237. }
  238. set status [$_TARGETNAME_2 curstate]
  239. if {[string equal "halted" $status]} {
  240. resume
  241. targets $_TARGETNAME_2
  242. }
  243. poll off
  244. jtag arp_init
  245. reset
  246. sleep 20
  247. irscan $_CHIPNAME.jrc 0x3a
  248. drscan $_CHIPNAME.jrc 4 4
  249. set secsts1 [drscan $_CHIPNAME.jrc 16 0]
  250. echo "secsts1 ="$secsts1
  251. set secsts1 [expr "0x$secsts1 & 0x4"]
  252. while {![string equal "4" $secsts1]} {
  253. irscan u8500.jrc 0x3a
  254. drscan u8500.jrc 4 4
  255. set secsts1 [drscan $_CHIPNAME.jrc 16 0]
  256. echo "secsts1 ="$secsts1
  257. set secsts1 [expr "0x$secsts1 & 0x4"]
  258. }
  259. echo "ape debugable"
  260. enable_apetap
  261. poll on
  262. targets $_TARGETNAME_1
  263. dap apsel 1
  264. }
  265. if {![info exists MAXSPEED]} {
  266. global _MAXSPEED
  267. set _MAXSPEED 15000
  268. } else {
  269. global _MAXSPEED
  270. set _MAXSPEED $MAXSPEED
  271. }
  272. global _MAXSPEED
  273. adapter speed $_MAXSPEED
  274. gdb_breakpoint_override hard
  275. set mem inaccessible-by-default-off
  276. jtag_ntrst_delay 100
  277. reset_config trst_and_srst combined