drv_uart.c 3.3 KB

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  1. /*
  2. * Copyright (c) 2006-2022, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2022-08-04 tangzz98 first version
  9. *
  10. */
  11. #include "drv_uart.h"
  12. #ifdef RT_USING_SERIAL_V1
  13. #ifdef CONFIG_UART_ISR_IN_IRAM
  14. #define UART_ISR_ATTR IRAM_ATTR
  15. #else
  16. #define UART_ISR_ATTR
  17. #endif
  18. uart_hal_context_t hal[] = {
  19. {
  20. .dev = &UART0,
  21. },
  22. {
  23. .dev = &UART1,
  24. },
  25. };
  26. static struct rt_serial_device _serial;
  27. static void mcu_uart_rx_intr_handler(void *param)
  28. {
  29. uint32_t uart_intr_status;
  30. struct rt_serial_device *serial;
  31. uart_port_t port;
  32. rt_interrupt_enter();
  33. serial = (struct rt_serial_device *)param;
  34. port = (uart_port_t)serial->parent.user_data;
  35. uart_intr_status = uart_hal_get_intsts_mask(&hal[port]);
  36. if (uart_intr_status != 0)
  37. {
  38. if (uart_intr_status & UART_INTR_RXFIFO_FULL)
  39. {
  40. rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
  41. }
  42. uart_hal_clr_intsts_mask(&hal[port], uart_intr_status);
  43. }
  44. rt_interrupt_leave();
  45. }
  46. static rt_err_t mcu_uart_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
  47. {
  48. return RT_EOK;
  49. }
  50. static rt_err_t mcu_uart_control(struct rt_serial_device *serial, int cmd, void *arg)
  51. {
  52. return RT_EOK;
  53. }
  54. static int mcu_uart_putc(struct rt_serial_device *serial, char c)
  55. {
  56. uart_port_t port = (uart_port_t)serial->parent.user_data;
  57. uint32_t write_size = 0;
  58. do
  59. {
  60. uart_hal_write_txfifo(&hal[port], (const uint8_t *)&c, 1, &write_size);
  61. } while (write_size == 0);
  62. return 1;
  63. }
  64. static int mcu_uart_getc(struct rt_serial_device *serial)
  65. {
  66. uart_port_t port = (uart_port_t)serial->parent.user_data;
  67. uint8_t c;
  68. int len = uart_hal_get_rxfifo_len(&hal[port]);
  69. if (len == 0)
  70. {
  71. return -1;
  72. }
  73. else
  74. {
  75. len = 1;
  76. uart_hal_read_rxfifo(&hal[port], &c, &len);
  77. return (int)c;
  78. }
  79. }
  80. static const struct rt_uart_ops _uart_ops =
  81. {
  82. mcu_uart_configure,
  83. mcu_uart_control,
  84. mcu_uart_putc,
  85. mcu_uart_getc,
  86. RT_NULL,
  87. };
  88. int rt_hw_uart_init(void)
  89. {
  90. uart_intr_config_t uart_intr = {
  91. .intr_enable_mask = UART_INTR_RXFIFO_FULL,
  92. .rxfifo_full_thresh = 1,
  93. };
  94. struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
  95. uart_config_t uart_config = {
  96. .baud_rate = BAUD_RATE_115200,
  97. .data_bits = UART_DATA_8_BITS,
  98. .parity = UART_PARITY_DISABLE,
  99. .stop_bits = UART_STOP_BITS_1,
  100. .flow_ctrl = UART_HW_FLOWCTRL_DISABLE,
  101. .source_clk = UART_SCLK_APB,
  102. };
  103. int intr_alloc_flags = 0;
  104. #if CONFIG_UART_ISR_IN_IRAM
  105. intr_alloc_flags = ESP_INTR_FLAG_IRAM;
  106. #endif
  107. ESP_ERROR_CHECK(uart_param_config(RT_BSP_UART_PORT, &uart_config));
  108. ESP_ERROR_CHECK(uart_set_pin(RT_BSP_UART_PORT, RT_BSP_UART_TX_PIN, RT_BSP_UART_RX_PIN, UART_PIN_NO_CHANGE, UART_PIN_NO_CHANGE));
  109. ESP_ERROR_CHECK(esp_intr_alloc(uart_periph_signal[RT_BSP_UART_PORT].irq, intr_alloc_flags, mcu_uart_rx_intr_handler, (void *)&_serial, NULL));
  110. ESP_ERROR_CHECK(uart_intr_config(RT_BSP_UART_PORT, &uart_intr));
  111. _serial.ops = &_uart_ops;
  112. _serial.config = config;
  113. return rt_hw_serial_register(&_serial, "uart", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX, (void *)RT_BSP_UART_PORT);
  114. }
  115. INIT_BOARD_EXPORT(rt_hw_uart_init);
  116. #endif /* RT_USING_SERIAL_V1 */