drv_sci.c 26 KB

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  1. /*
  2. * Copyright (c) 2006-2024, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2023-09-24 Vandoul first version
  9. * 2023-09-27 Vandoul add sci uart
  10. */
  11. #include "drv_sci.h"
  12. #ifdef BSP_USING_SCI
  13. //#define DRV_DEBUG
  14. #define DBG_TAG "drv.sci"
  15. #ifdef DRV_DEBUG
  16. #define DBG_LVL DBG_LOG
  17. #else
  18. #define DBG_LVL DBG_INFO
  19. #endif /* DRV_DEBUG */
  20. #include <rtdbg.h>
  21. #ifdef R_SCI_B_SPI_H
  22. #define R_SCI_SPI_Write R_SCI_B_SPI_Write
  23. #define R_SCI_SPI_Read R_SCI_B_SPI_Read
  24. #define R_SCI_SPI_WriteRead R_SCI_B_SPI_WriteRead
  25. #define R_SCI_SPI_Open R_SCI_B_SPI_Open
  26. #define R_SCI_SPI_Close R_SCI_B_SPI_Close
  27. #define R_SCI_SPI_CallbackSet R_SCI_B_SPI_CallbackSet
  28. #endif
  29. enum
  30. {
  31. #ifdef BSP_USING_SCI0
  32. RA_SCI_INDEX0,
  33. #endif
  34. #ifdef BSP_USING_SCI1
  35. RA_SCI_INDEX1,
  36. #endif
  37. #ifdef BSP_USING_SCI2
  38. RA_SCI_INDEX2,
  39. #endif
  40. #ifdef BSP_USING_SCI3
  41. RA_SCI_INDEX3,
  42. #endif
  43. #ifdef BSP_USING_SCI4
  44. RA_SCI_INDEX4,
  45. #endif
  46. #ifdef BSP_USING_SCI5
  47. RA_SCI_INDEX5,
  48. #endif
  49. #ifdef BSP_USING_SCI6
  50. RA_SCI_INDEX6,
  51. #endif
  52. #ifdef BSP_USING_SCI7
  53. RA_SCI_INDEX7,
  54. #endif
  55. #ifdef BSP_USING_SCI8
  56. RA_SCI_INDEX8,
  57. #endif
  58. #ifdef BSP_USING_SCI9
  59. RA_SCI_INDEX9,
  60. #endif
  61. RA_SCI_INDEX_MAX,
  62. };
  63. struct ra_sci_param
  64. {
  65. const char bus_name[RT_NAME_MAX];
  66. const void *sci_ctrl;
  67. const void *sci_cfg;
  68. const void *ops;
  69. };
  70. #ifdef RT_USING_I2C
  71. rt_weak const struct rt_i2c_bus_device_ops sci_ops_i2c;
  72. #endif
  73. #ifdef RT_USING_SPI
  74. rt_weak const struct rt_spi_ops sci_ops_spi;
  75. #endif
  76. #ifdef RT_USING_SERIAL
  77. rt_weak const struct rt_uart_ops sci_ops_uart;
  78. #endif
  79. struct ra_sci_object
  80. {
  81. union
  82. {
  83. #ifdef RT_USING_SPI
  84. struct
  85. {
  86. struct rt_spi_bus sbus;
  87. struct rt_spi_configuration *spi_cfg;
  88. };
  89. #endif
  90. #ifdef RT_USING_I2C
  91. struct
  92. {
  93. struct rt_i2c_bus_device ibus;
  94. };
  95. #endif
  96. #ifdef RT_USING_SERIAL
  97. struct
  98. {
  99. struct rt_serial_device ubus;
  100. };
  101. #endif
  102. };
  103. const struct ra_sci_param *param;
  104. struct rt_event event;
  105. };
  106. #define _TO_STR(_a) #_a
  107. #define CONCAT3STR(_a,_b,_c) _TO_STR(_a##_b##_c)
  108. #define RA_SCI_EVENT_ABORTED 1
  109. #define RA_SCI_EVENT_RX_COMPLETE 2
  110. #define RA_SCI_EVENT_TX_COMPLETE 4
  111. #define RA_SCI_EVENT_ERROR 8
  112. #define RA_SCI_EVENT_ALL 15
  113. /**
  114. * Bus name format: sci[x][y], where x=0~9 and y=s/i/u
  115. * Example:
  116. * - sci_spi: sci0s
  117. * - sci_i2c: sci0i
  118. * - sci_uart: sci0u
  119. */
  120. #define RA_SCI_HANDLE_ITEM(idx,type,id) {.bus_name=CONCAT3STR(sci,idx,id),.sci_ctrl=&g_sci##idx##_ctrl,.sci_cfg=&g_sci##idx##_cfg,.ops=&sci_ops_##type}
  121. const static struct ra_sci_param sci_param[] =
  122. {
  123. #ifdef BSP_USING_SCI0
  124. #ifdef BSP_USING_SCI0_SPI
  125. RA_SCI_HANDLE_ITEM(0, spi, s),
  126. #elif defined(BSP_USING_SCI0_I2C)
  127. RA_SCI_HANDLE_ITEM(0, i2c, i),
  128. #elif defined(BSP_USING_SCI0_UART)
  129. RA_SCI_HANDLE_ITEM(0, uart, u),
  130. #endif
  131. #endif
  132. #ifdef BSP_USING_SCI1
  133. #ifdef BSP_USING_SCI1_SPI
  134. RA_SCI_HANDLE_ITEM(1, spi, s),
  135. #elif defined(BSP_USING_SCI1_I2C)
  136. RA_SCI_HANDLE_ITEM(1, i2c, i),
  137. #elif defined(BSP_USING_SCI1_UART)
  138. RA_SCI_HANDLE_ITEM(1, uart, u),
  139. #endif
  140. #endif
  141. #ifdef BSP_USING_SCI2
  142. #ifdef BSP_USING_SCI2_SPI
  143. RA_SCI_HANDLE_ITEM(2, spi, s),
  144. #elif defined(BSP_USING_SCI2_I2C)
  145. RA_SCI_HANDLE_ITEM(2, i2c, i),
  146. #elif defined(BSP_USING_SCI2_UART)
  147. RA_SCI_HANDLE_ITEM(2, uart, u),
  148. #endif
  149. #endif
  150. #ifdef BSP_USING_SCI3
  151. #ifdef BSP_USING_SCI3_SPI
  152. RA_SCI_HANDLE_ITEM(3, spi, s),
  153. #elif defined(BSP_USING_SCI3_I2C)
  154. RA_SCI_HANDLE_ITEM(3, i2c, i),
  155. #elif defined(BSP_USING_SCI3_UART)
  156. RA_SCI_HANDLE_ITEM(3, uart, u),
  157. #endif
  158. #endif
  159. #ifdef BSP_USING_SCI4
  160. #ifdef BSP_USING_SCI4_SPI
  161. RA_SCI_HANDLE_ITEM(4, spi, s),
  162. #elif defined(BSP_USING_SCI4_I2C)
  163. RA_SCI_HANDLE_ITEM(4, i2c, i),
  164. #elif defined(BSP_USING_SCI4_UART)
  165. RA_SCI_HANDLE_ITEM(4, uart, u),
  166. #endif
  167. #endif
  168. #ifdef BSP_USING_SCI5
  169. #ifdef BSP_USING_SCI5_SPI
  170. RA_SCI_HANDLE_ITEM(5, spi, s),
  171. #elif defined(BSP_USING_SCI5_I2C)
  172. RA_SCI_HANDLE_ITEM(5, i2c, i),
  173. #elif defined(BSP_USING_SCI5_UART)
  174. RA_SCI_HANDLE_ITEM(5, uart, u),
  175. #endif
  176. #endif
  177. #ifdef BSP_USING_SCI6
  178. #ifdef BSP_USING_SCI6_SPI
  179. RA_SCI_HANDLE_ITEM(6, spi, s),
  180. #elif defined(BSP_USING_SCI6_I2C)
  181. RA_SCI_HANDLE_ITEM(6, i2c, i),
  182. #elif defined(BSP_USING_SCI6_UART)
  183. RA_SCI_HANDLE_ITEM(6, uart, u),
  184. #endif
  185. #endif
  186. #ifdef BSP_USING_SCI7
  187. #ifdef BSP_USING_SCI7_SPI
  188. RA_SCI_HANDLE_ITEM(7, spi, s),
  189. #elif defined(BSP_USING_SCI7_I2C)
  190. RA_SCI_HANDLE_ITEM(7, i2c, i),
  191. #elif defined(BSP_USING_SCI7_UART)
  192. RA_SCI_HANDLE_ITEM(7, uart, u),
  193. #endif
  194. #endif
  195. #ifdef BSP_USING_SCI8
  196. #ifdef BSP_USING_SCI8_SPI
  197. RA_SCI_HANDLE_ITEM(8, spi, s),
  198. #elif defined(BSP_USING_SCI8_I2C)
  199. RA_SCI_HANDLE_ITEM(8, i2c, i),
  200. #elif defined(BSP_USING_SCI8_UART)
  201. RA_SCI_HANDLE_ITEM(8, uart, u),
  202. #endif
  203. #endif
  204. #ifdef BSP_USING_SCI9
  205. #ifdef BSP_USING_SCI9_SPI
  206. RA_SCI_HANDLE_ITEM(9, spi, s),
  207. #elif defined(BSP_USING_SCI9_I2C)
  208. RA_SCI_HANDLE_ITEM(9, i2c, i),
  209. #elif defined(BSP_USING_SCI9_UART)
  210. RA_SCI_HANDLE_ITEM(9, uart, u),
  211. #endif
  212. #endif
  213. };
  214. static struct ra_sci_object sci_obj[RA_SCI_INDEX_MAX];
  215. rt_used static rt_err_t ra_wait_complete(struct ra_sci_object *obj)
  216. {
  217. rt_uint32_t event = 0;
  218. if (RT_EOK != rt_event_recv(&obj->event, RA_SCI_EVENT_ALL, RT_EVENT_FLAG_OR | RT_EVENT_FLAG_CLEAR, (rt_int32_t)rt_tick_from_millisecond(400), &event))
  219. {
  220. return -RT_ETIMEOUT;
  221. }
  222. if ((event & (RA_SCI_EVENT_ABORTED | RA_SCI_EVENT_ERROR)) == 0)
  223. {
  224. return RT_EOK;
  225. }
  226. return -RT_ERROR;
  227. }
  228. /**
  229. * @brief SCI UART
  230. * @defgroup SCI_UART
  231. * @{
  232. */
  233. #ifdef BSP_USING_SCIn_UART
  234. const static int uart_buff_size[][2] =
  235. {
  236. #ifdef BSP_USING_SCI0_UART
  237. {BSP_SCI0_UART_RX_BUFSIZE, BSP_SCI0_UART_TX_BUFSIZE},
  238. #endif
  239. #ifdef BSP_USING_SCI1_UART
  240. {BSP_SCI1_UART_RX_BUFSIZE, BSP_SCI1_UART_TX_BUFSIZE},
  241. #endif
  242. #ifdef BSP_USING_SCI2_UART
  243. {BSP_SCI2_UART_RX_BUFSIZE, BSP_SCI2_UART_TX_BUFSIZE},
  244. #endif
  245. #ifdef BSP_USING_SCI3_UART
  246. {BSP_SCI3_UART_RX_BUFSIZE, BSP_SCI3_UART_TX_BUFSIZE},
  247. #endif
  248. #ifdef BSP_USING_SCI4_UART
  249. {BSP_SCI4_UART_RX_BUFSIZE, BSP_SCI4_UART_TX_BUFSIZE},
  250. #endif
  251. #ifdef BSP_USING_SCI5_UART
  252. {BSP_SCI5_UART_RX_BUFSIZE, BSP_SCI5_UART_TX_BUFSIZE},
  253. #endif
  254. #ifdef BSP_USING_SCI6_UART
  255. {BSP_SCI6_UART_RX_BUFSIZE, BSP_SCI6_UART_TX_BUFSIZE},
  256. #endif
  257. #ifdef BSP_USING_SCI7_UART
  258. {BSP_SCI7_UART_RX_BUFSIZE, BSP_SCI7_UART_TX_BUFSIZE},
  259. #endif
  260. #ifdef BSP_USING_SCI8_UART
  261. {BSP_SCI8_UART_RX_BUFSIZE, BSP_SCI8_UART_TX_BUFSIZE},
  262. #endif
  263. #ifdef BSP_USING_SCI9_UART
  264. {BSP_SCI9_UART_RX_BUFSIZE, BSP_SCI9_UART_TX_BUFSIZE},
  265. #endif
  266. {0, 0},
  267. };
  268. void sci_uart_irq_callback(uart_callback_args_t *p_args)
  269. {
  270. rt_interrupt_enter();
  271. if (NULL != p_args)
  272. {
  273. struct ra_sci_object *obj = (struct ra_sci_object *)p_args->p_context;
  274. RT_ASSERT(obj != RT_NULL);
  275. if (UART_EVENT_RX_CHAR == p_args->event)
  276. {
  277. struct rt_serial_device *serial = &obj->ubus;
  278. struct rt_serial_rx_fifo *rx_fifo;
  279. rx_fifo = (struct rt_serial_rx_fifo *) serial->serial_rx;
  280. RT_ASSERT(rx_fifo != RT_NULL);
  281. rt_ringbuffer_putchar(&(rx_fifo->rb), (rt_uint8_t)p_args->data);
  282. rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
  283. }
  284. }
  285. rt_interrupt_leave();
  286. }
  287. static rt_err_t ra_uart_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
  288. {
  289. struct ra_sci_object *obj;
  290. const struct ra_sci_param *param;
  291. RT_ASSERT(serial != RT_NULL);
  292. RT_ASSERT(cfg != RT_NULL);
  293. fsp_err_t err = FSP_SUCCESS;
  294. obj = rt_container_of(serial, struct ra_sci_object, ubus);
  295. param = obj->param;
  296. RT_ASSERT(param != RT_NULL);
  297. err = R_SCI_UART_Open((uart_ctrl_t *const)param->sci_ctrl, (uart_cfg_t *const)param->sci_cfg);
  298. if (FSP_SUCCESS != err)
  299. {
  300. return -RT_ERROR;
  301. }
  302. err = R_SCI_UART_CallbackSet((uart_ctrl_t *const)param->sci_ctrl, sci_uart_irq_callback, obj, NULL);
  303. if (FSP_SUCCESS != err)
  304. {
  305. //LOG_W("R_SCI_UART_CallbackSet API failed,%d", err);
  306. }
  307. return RT_EOK;
  308. }
  309. static rt_err_t ra_uart_control(struct rt_serial_device *serial, int cmd, void *arg)
  310. {
  311. return RT_EOK;
  312. }
  313. static int ra_uart_putc(struct rt_serial_device *serial, char c)
  314. {
  315. struct ra_sci_object *obj;
  316. const struct ra_sci_param *param;
  317. RT_ASSERT(serial != RT_NULL);
  318. obj = rt_container_of(serial, struct ra_sci_object, ubus);
  319. param = obj->param;
  320. RT_ASSERT(param != RT_NULL);
  321. sci_uart_instance_ctrl_t *p_ctrl = (sci_uart_instance_ctrl_t *)param->sci_ctrl;
  322. p_ctrl->p_reg->TDR = c;
  323. while ((p_ctrl->p_reg->SSR_b.TEND) == 0);
  324. return RT_EOK;
  325. }
  326. static int ra_uart_getc(struct rt_serial_device *serial)
  327. {
  328. return RT_EOK;
  329. }
  330. static rt_ssize_t ra_uart_transmit(struct rt_serial_device *serial,
  331. rt_uint8_t *buf,
  332. rt_size_t size,
  333. rt_uint32_t tx_flag)
  334. {
  335. RT_ASSERT(serial != RT_NULL);
  336. RT_ASSERT(buf != RT_NULL);
  337. return 0;
  338. }
  339. const struct rt_uart_ops sci_ops_uart =
  340. {
  341. .configure = ra_uart_configure,
  342. .control = ra_uart_control,
  343. .putc = ra_uart_putc,
  344. .getc = ra_uart_getc,
  345. .transmit = ra_uart_transmit,
  346. };
  347. #else
  348. void sci_uart_irq_callback(uart_callback_args_t *p_args)
  349. {
  350. }
  351. #endif
  352. /**
  353. * @}
  354. */
  355. /**
  356. * @brief SCI I2C
  357. * @defgroup SCI_I2C
  358. * @{
  359. */
  360. #ifdef BSP_USING_SCIn_I2C
  361. void sci_i2c_irq_callback(i2c_master_callback_args_t *p_args)
  362. {
  363. rt_interrupt_enter();
  364. if (NULL != p_args)
  365. {
  366. /* capture callback event for validating the i2c transfer event*/
  367. struct ra_sci_object *obj = (struct ra_sci_object *)p_args->p_context;
  368. uint32_t event = 0;
  369. RT_ASSERT(obj != RT_NULL);
  370. switch (p_args->event)
  371. {
  372. case I2C_MASTER_EVENT_ABORTED:
  373. event |= RA_SCI_EVENT_ABORTED;
  374. break;
  375. case I2C_MASTER_EVENT_RX_COMPLETE:
  376. event |= RA_SCI_EVENT_RX_COMPLETE;
  377. break;
  378. case I2C_MASTER_EVENT_TX_COMPLETE:
  379. event |= RA_SCI_EVENT_TX_COMPLETE;
  380. break;
  381. }
  382. rt_event_send(&obj->event, event);
  383. LOG_D("event:%x", p_args->event);
  384. }
  385. rt_interrupt_leave();
  386. LOG_D("p_args:%p", p_args);
  387. }
  388. static rt_ssize_t ra_i2c_mst_xfer(struct rt_i2c_bus_device *bus,
  389. struct rt_i2c_msg msgs[],
  390. rt_uint32_t num)
  391. {
  392. rt_size_t i;
  393. RT_ASSERT(bus != RT_NULL);
  394. struct ra_sci_object *obj = rt_container_of(bus, struct ra_sci_object, ibus);
  395. const struct ra_sci_param *param = obj->param;
  396. i2c_master_ctrl_t *master_ctrl = (i2c_master_ctrl_t *)param->sci_ctrl;
  397. int err = FSP_SUCCESS;
  398. bool restart = false;
  399. for (i = 0; i < num; i++)
  400. {
  401. struct rt_i2c_msg *msg = &msgs[i];
  402. if (msg->flags & RT_I2C_NO_STOP)
  403. {
  404. restart = true;
  405. }
  406. else
  407. {
  408. restart = false;
  409. }
  410. if (msg->flags & RT_I2C_ADDR_10BIT)
  411. {
  412. //LOG_E("10Bit not support");
  413. //break;
  414. #ifdef SOC_SERIES_R7FA8M85
  415. R_SCI_B_I2C_SlaveAddressSet(master_ctrl, msg->addr, I2C_MASTER_ADDR_MODE_10BIT);
  416. #else
  417. R_SCI_I2C_SlaveAddressSet(master_ctrl, msg->addr, I2C_MASTER_ADDR_MODE_10BIT);
  418. #endif
  419. }
  420. else
  421. {
  422. //master_ctrl->slave = msg->addr;
  423. #ifdef SOC_SERIES_R7FA8M85
  424. R_SCI_B_I2C_SlaveAddressSet(master_ctrl, msg->addr, I2C_MASTER_ADDR_MODE_7BIT);
  425. #else
  426. R_SCI_I2C_SlaveAddressSet(master_ctrl, msg->addr, I2C_MASTER_ADDR_MODE_7BIT);
  427. #endif
  428. }
  429. if (msg->flags & RT_I2C_RD)
  430. {
  431. #ifdef SOC_SERIES_R7FA8M85
  432. err = R_SCI_B_I2C_Read(master_ctrl, msg->buf, msg->len, restart);
  433. #else
  434. err = R_SCI_I2C_Read(master_ctrl, msg->buf, msg->len, restart);
  435. #endif
  436. }
  437. else
  438. {
  439. #ifdef SOC_SERIES_R7FA8M85
  440. err = R_SCI_B_I2C_Write(master_ctrl, msg->buf, msg->len, restart);
  441. #else
  442. err = R_SCI_I2C_Write(master_ctrl, msg->buf, msg->len, restart);
  443. #endif
  444. }
  445. if (FSP_SUCCESS == err)
  446. {
  447. /* handle error */
  448. err = ra_wait_complete(obj);
  449. if (RT_EOK != err)
  450. {
  451. //LOG_E("POWER_CTL reg I2C write failed,%d,%d", err, i);
  452. break;
  453. }
  454. }
  455. /* handle error */
  456. else
  457. {
  458. /* Write API returns itself is not successful */
  459. LOG_E("R_IIC_MASTER_Write/Read API failed,%d", i);
  460. break;
  461. }
  462. }
  463. return (rt_ssize_t)i;
  464. }
  465. const struct rt_i2c_bus_device_ops sci_ops_i2c =
  466. {
  467. .master_xfer = ra_i2c_mst_xfer,
  468. .slave_xfer = RT_NULL,
  469. .i2c_bus_control = RT_NULL
  470. };
  471. #endif
  472. /**
  473. * @}
  474. */
  475. /**
  476. * @brief SCI SPI
  477. * @defgroup SCI_SPI
  478. * @{
  479. */
  480. #ifdef BSP_USING_SCIn_SPI
  481. void sci_spi_irq_callback(spi_callback_args_t *p_args)
  482. {
  483. rt_interrupt_enter();
  484. if (NULL != p_args)
  485. {
  486. /* capture callback event for validating the i2c transfer event*/
  487. struct ra_sci_object *obj = (struct ra_sci_object *)p_args->p_context;
  488. uint32_t event = 0;
  489. switch (p_args->event)
  490. {
  491. case SPI_EVENT_ERR_MODE_FAULT :
  492. case SPI_EVENT_ERR_READ_OVERFLOW:
  493. case SPI_EVENT_ERR_PARITY :
  494. case SPI_EVENT_ERR_OVERRUN :
  495. case SPI_EVENT_ERR_FRAMING :
  496. case SPI_EVENT_ERR_MODE_UNDERRUN:
  497. event |= RA_SCI_EVENT_ERROR;
  498. break;
  499. case SPI_EVENT_TRANSFER_ABORTED :
  500. event |= RA_SCI_EVENT_ABORTED;
  501. break;
  502. case SPI_EVENT_TRANSFER_COMPLETE:
  503. event |= RA_SCI_EVENT_TX_COMPLETE;
  504. break;
  505. }
  506. rt_event_send(&obj->event, event);
  507. LOG_D("event:%x", p_args->event);
  508. }
  509. rt_interrupt_leave();
  510. LOG_D("p_args:%p", p_args);
  511. }
  512. static spi_bit_width_t ra_width_shift(rt_uint8_t data_width)
  513. {
  514. spi_bit_width_t bit_width = SPI_BIT_WIDTH_8_BITS;
  515. if (data_width == 1)
  516. bit_width = SPI_BIT_WIDTH_8_BITS;
  517. else if (data_width == 2)
  518. bit_width = SPI_BIT_WIDTH_16_BITS;
  519. else if (data_width == 4)
  520. bit_width = SPI_BIT_WIDTH_32_BITS;
  521. return bit_width;
  522. }
  523. static rt_err_t ra_write_message(struct rt_spi_device *device, const void *send_buf, const rt_size_t len)
  524. {
  525. RT_ASSERT(device != NULL);
  526. RT_ASSERT(send_buf != NULL);
  527. RT_ASSERT(len > 0);
  528. rt_err_t err = RT_EOK;
  529. struct ra_sci_object *obj = rt_container_of(device->bus, struct ra_sci_object, sbus);
  530. const struct ra_sci_param *param = obj->param;
  531. spi_bit_width_t bit_width = ra_width_shift(obj->spi_cfg->data_width);
  532. /**< send msessage */
  533. err = R_SCI_SPI_Write((spi_ctrl_t *)param->sci_ctrl, send_buf, len, bit_width);
  534. if (RT_EOK != err)
  535. {
  536. LOG_E("%s write failed. %d", param->bus_name, err);
  537. return -RT_ERROR;
  538. }
  539. /* Wait for SPI_EVENT_TRANSFER_COMPLETE callback event. */
  540. ra_wait_complete(obj);
  541. return len;
  542. }
  543. static rt_err_t ra_read_message(struct rt_spi_device *device, void *recv_buf, const rt_size_t len)
  544. {
  545. RT_ASSERT(device != NULL);
  546. RT_ASSERT(recv_buf != NULL);
  547. RT_ASSERT(len > 0);
  548. rt_err_t err = RT_EOK;
  549. struct ra_sci_object *obj = rt_container_of(device->bus, struct ra_sci_object, sbus);
  550. const struct ra_sci_param *param = obj->param;
  551. spi_bit_width_t bit_width = ra_width_shift(obj->spi_cfg->data_width);
  552. /**< receive message */
  553. err = R_SCI_SPI_Read((spi_ctrl_t *)param->sci_ctrl, recv_buf, len, bit_width);
  554. if (RT_EOK != err)
  555. {
  556. LOG_E("%s write failed. %d", param->bus_name, err);
  557. return -RT_ERROR;
  558. }
  559. /* Wait for SPI_EVENT_TRANSFER_COMPLETE callback event. */
  560. ra_wait_complete(obj);
  561. return len;
  562. }
  563. static rt_err_t ra_write_read_message(struct rt_spi_device *device, struct rt_spi_message *message)
  564. {
  565. RT_ASSERT(device != NULL);
  566. RT_ASSERT(message != NULL);
  567. RT_ASSERT(message->length > 0);
  568. rt_err_t err = RT_EOK;
  569. struct ra_sci_object *obj = rt_container_of(device->bus, struct ra_sci_object, sbus);
  570. const struct ra_sci_param *param = obj->param;
  571. spi_bit_width_t bit_width = ra_width_shift(obj->spi_cfg->data_width);
  572. /**< write and receive message */
  573. err = R_SCI_SPI_WriteRead((spi_ctrl_t *)param->sci_ctrl, message->send_buf, message->recv_buf, message->length, bit_width);
  574. if (RT_EOK != err)
  575. {
  576. LOG_E("%s write and read failed. %d", param->bus_name, err);
  577. return -RT_ERROR;
  578. }
  579. /* Wait for SPI_EVENT_TRANSFER_COMPLETE callback event. */
  580. ra_wait_complete(obj);
  581. return message->length;
  582. }
  583. /**< init spi TODO : MSB does not support modification */
  584. static rt_err_t ra_hw_spi_configure(struct rt_spi_device *device,
  585. struct rt_spi_configuration *configuration)
  586. {
  587. RT_ASSERT(device != NULL);
  588. RT_ASSERT(configuration != NULL);
  589. rt_err_t err = RT_EOK;
  590. struct ra_sci_object *obj = rt_container_of(device->bus, struct ra_sci_object, sbus);
  591. const struct ra_sci_param *param = obj->param;
  592. const spi_cfg_t *cfg = (const spi_cfg_t *)param->sci_cfg;
  593. /**< data_width : 1 -> 8 bits , 2 -> 16 bits, 4 -> 32 bits, default 32 bits*/
  594. rt_uint8_t data_width = configuration->data_width / 8;
  595. RT_ASSERT(data_width == 1 || data_width == 2 || data_width == 4);
  596. configuration->data_width = configuration->data_width / 8;
  597. obj->spi_cfg = configuration;
  598. #ifdef R_SCI_B_SPI_H
  599. sci_b_spi_extended_cfg_t spi_cfg = *(sci_b_spi_extended_cfg_t *)cfg->p_extend;
  600. #else
  601. sci_spi_extended_cfg_t *spi_cfg = (sci_spi_extended_cfg_t *)cfg->p_extend;
  602. #endif
  603. /**< Configure Select Line */
  604. rt_pin_write(device->cs_pin, PIN_HIGH);
  605. /**< config bitrate */
  606. #ifdef R_SCI_B_SPI_H
  607. R_SCI_B_SPI_CalculateBitrate(obj->spi_cfg->max_hz, SCI_B_SPI_SOURCE_CLOCK_PCLK, &spi_cfg.clk_div);
  608. #else
  609. R_SCI_SPI_CalculateBitrate(obj->spi_cfg->max_hz, &spi_cfg->clk_div, false);
  610. #endif
  611. /**< init */
  612. err = R_SCI_SPI_Open((spi_ctrl_t *)param->sci_ctrl, cfg);
  613. /* handle error */
  614. if (err == FSP_ERR_IN_USE)
  615. {
  616. R_SCI_SPI_Close((spi_ctrl_t *)param->sci_ctrl);
  617. err = R_SCI_SPI_Open((spi_ctrl_t *)param->sci_ctrl, cfg);
  618. }
  619. if (RT_EOK != err)
  620. {
  621. LOG_E("%s init failed. %d", param->bus_name, err);
  622. return -RT_ERROR;
  623. }
  624. err = R_SCI_SPI_CallbackSet((spi_ctrl_t *)param->sci_ctrl, sci_spi_irq_callback, obj, NULL);
  625. if (FSP_SUCCESS != err)
  626. {
  627. LOG_E("R_SCI_I2C_CallbackSet API failed,%d", err);
  628. }
  629. return RT_EOK;
  630. }
  631. static rt_ssize_t ra_spixfer(struct rt_spi_device *device, struct rt_spi_message *message)
  632. {
  633. RT_ASSERT(device != RT_NULL);
  634. RT_ASSERT(device->bus != RT_NULL);
  635. RT_ASSERT(message != RT_NULL);
  636. rt_err_t err = RT_EOK;
  637. if (message->cs_take && !(device->config.mode & RT_SPI_NO_CS) && (device->cs_pin != PIN_NONE))
  638. {
  639. if (device->config.mode & RT_SPI_CS_HIGH)
  640. rt_pin_write(device->cs_pin, PIN_HIGH);
  641. else
  642. rt_pin_write(device->cs_pin, PIN_LOW);
  643. }
  644. if (message->length > 0)
  645. {
  646. if (message->send_buf == RT_NULL && message->recv_buf != RT_NULL)
  647. {
  648. /**< receive message */
  649. err = ra_read_message(device, (void *)message->recv_buf, (const rt_size_t)message->length);
  650. }
  651. else if (message->send_buf != RT_NULL && message->recv_buf == RT_NULL)
  652. {
  653. /**< send message */
  654. err = ra_write_message(device, (const void *)message->send_buf, (const rt_size_t)message->length);
  655. }
  656. else if (message->send_buf != RT_NULL && message->recv_buf != RT_NULL)
  657. {
  658. /**< send and receive message */
  659. err = ra_write_read_message(device, message);
  660. }
  661. }
  662. if (message->cs_release && !(device->config.mode & RT_SPI_NO_CS) && (device->cs_pin != PIN_NONE))
  663. {
  664. if (device->config.mode & RT_SPI_CS_HIGH)
  665. rt_pin_write(device->cs_pin, PIN_LOW);
  666. else
  667. rt_pin_write(device->cs_pin, PIN_HIGH);
  668. }
  669. return err;
  670. }
  671. const struct rt_spi_ops sci_ops_spi =
  672. {
  673. .configure = ra_hw_spi_configure,
  674. .xfer = ra_spixfer,
  675. };
  676. #endif
  677. /**
  678. * @}
  679. */
  680. static int ra_hw_sci_init(void)
  681. {
  682. int bufsz_idx = 0;
  683. for (rt_uint8_t idx = 0; idx < RA_SCI_INDEX_MAX; idx++)
  684. {
  685. struct ra_sci_object *obj = &sci_obj[idx];
  686. const struct ra_sci_param *param = &sci_param[idx];
  687. obj->param = param;
  688. rt_err_t err;
  689. #ifdef BSP_USING_SCIn_SPI
  690. if ((uint32_t)param->ops == (uint32_t)&sci_ops_spi)
  691. {
  692. /**< register spi bus */
  693. err = rt_spi_bus_register(&obj->sbus, param->bus_name, param->ops);
  694. if (RT_EOK != err)
  695. {
  696. LOG_E("bus %s register failed. %d", param->bus_name, err);
  697. return -RT_ERROR;
  698. }
  699. }
  700. else
  701. #endif
  702. #ifdef BSP_USING_SCIn_I2C
  703. if ((uint32_t)param->ops == (uint32_t)&sci_ops_i2c)
  704. {
  705. obj->ibus.ops = param->ops;
  706. obj->ibus.priv = 0;
  707. /* opening IIC master module */
  708. #ifdef SOC_SERIES_R7FA8M85
  709. err = R_SCI_B_I2C_Open((i2c_master_ctrl_t *)param->sci_ctrl, param->sci_cfg);
  710. #else
  711. err = R_SCI_I2C_Open((i2c_master_ctrl_t *)param->sci_ctrl, param->sci_cfg);
  712. #endif
  713. if (err != FSP_SUCCESS)
  714. {
  715. LOG_E("R_IIC_MASTER_Open API failed,%d", err);
  716. continue;
  717. }
  718. #ifdef SOC_SERIES_R7FA8M85
  719. err = R_SCI_B_I2C_CallbackSet((i2c_master_ctrl_t *)param->sci_ctrl, sci_i2c_irq_callback, obj, NULL);
  720. #else
  721. err = R_SCI_I2C_CallbackSet((i2c_master_ctrl_t *)param->sci_ctrl, sci_i2c_irq_callback, obj, NULL);
  722. #endif
  723. /* handle error */
  724. if (FSP_SUCCESS != err)
  725. {
  726. LOG_E("R_SCI_I2C_CallbackSet API failed,%d", err);
  727. continue;
  728. }
  729. err = rt_i2c_bus_device_register(&obj->ibus, param->bus_name);
  730. if (RT_EOK != err)
  731. {
  732. LOG_E("i2c bus %s register failed,%d", param->bus_name, err);
  733. continue;
  734. }
  735. }
  736. else
  737. #endif
  738. #ifdef BSP_USING_SCIn_UART
  739. if ((uint32_t)param->ops == (uint32_t)&sci_ops_uart)
  740. {
  741. if (rt_device_find(param->bus_name) != RT_NULL)
  742. {
  743. continue;
  744. }
  745. struct rt_serial_device *serial = &obj->ubus;
  746. obj->ubus.ops = param->ops;
  747. serial->config.rx_bufsz = uart_buff_size[bufsz_idx][0];
  748. serial->config.tx_bufsz = uart_buff_size[bufsz_idx][1];
  749. bufsz_idx ++;
  750. err = rt_hw_serial_register(serial, param->bus_name, RT_DEVICE_FLAG_RDWR, RT_NULL);
  751. if (RT_EOK != err)
  752. {
  753. LOG_E("uart %s register failed,%d", param->bus_name, err);
  754. continue;
  755. }
  756. }
  757. #endif
  758. {
  759. }
  760. if (RT_EOK != rt_event_init(&obj->event, param->bus_name, RT_IPC_FLAG_PRIO))
  761. {
  762. LOG_E("sci event init fail!");
  763. return -RT_ERROR;
  764. }
  765. }
  766. return RT_EOK;
  767. }
  768. INIT_BOARD_EXPORT(ra_hw_sci_init);
  769. #ifdef BSP_USING_SCIn_UART
  770. rt_weak int rt_hw_usart_init(void)
  771. {
  772. int bufsz_idx = 0;
  773. for (rt_uint8_t idx = 0; idx < RA_SCI_INDEX_MAX; idx++)
  774. {
  775. struct ra_sci_object *obj = &sci_obj[idx];
  776. const struct ra_sci_param *param = &sci_param[idx];
  777. obj->param = param;
  778. rt_err_t err;
  779. if ((uint32_t)param->ops == (uint32_t)&sci_ops_uart)
  780. {
  781. if (rt_device_find(param->bus_name) != RT_NULL)
  782. {
  783. continue;
  784. }
  785. struct rt_serial_device *serial = &obj->ubus;
  786. obj->ubus.ops = param->ops;
  787. serial->config.rx_bufsz = uart_buff_size[bufsz_idx][0];
  788. serial->config.tx_bufsz = uart_buff_size[bufsz_idx][1];
  789. bufsz_idx ++;
  790. err = rt_hw_serial_register(serial, param->bus_name, RT_DEVICE_FLAG_RDWR, RT_NULL);
  791. if (RT_EOK != err)
  792. {
  793. continue;
  794. }
  795. if (RT_EOK != rt_event_init(&obj->event, param->bus_name, RT_IPC_FLAG_PRIO))
  796. {
  797. return -RT_ERROR;
  798. }
  799. }
  800. }
  801. return RT_EOK;
  802. }
  803. #endif
  804. /**
  805. * Attach the spi device to SPI bus, this function must be used after initialization.
  806. */
  807. #ifdef BSP_USING_SCIn_SPI
  808. rt_err_t rt_hw_sci_spi_device_attach(const char *bus_name, const char *device_name, rt_base_t cs_pin)
  809. {
  810. RT_ASSERT(bus_name != RT_NULL);
  811. RT_ASSERT(device_name != RT_NULL);
  812. rt_err_t result;
  813. struct rt_spi_device *spi_device;
  814. /* attach the device to spi bus*/
  815. spi_device = (struct rt_spi_device *)rt_malloc(sizeof(struct rt_spi_device));
  816. RT_ASSERT(spi_device != RT_NULL);
  817. result = rt_spi_bus_attach_device_cspin(spi_device, device_name, bus_name, cs_pin, RT_NULL);
  818. if (result != RT_EOK)
  819. {
  820. LOG_E("%s attach to %s faild, %d\n", device_name, bus_name, result);
  821. }
  822. LOG_D("%s attach to %s done", device_name, bus_name);
  823. return result;
  824. }
  825. #endif
  826. #endif /* BSP_USING_SCI */