r_transfer_api.h 18 KB

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  1. /*
  2. * Copyright (c) 2020 - 2025 Renesas Electronics Corporation and/or its affiliates
  3. *
  4. * SPDX-License-Identifier: BSD-3-Clause
  5. */
  6. /*******************************************************************************************************************//**
  7. * @ingroup RENESAS_TRANSFER_INTERFACES
  8. * @defgroup TRANSFER_API Transfer Interface
  9. *
  10. * @brief Interface for data transfer functions.
  11. *
  12. * @section TRANSFER_API_SUMMARY Summary
  13. * The transfer interface supports background data transfer (no CPU intervention).
  14. *
  15. *
  16. * @{
  17. **********************************************************************************************************************/
  18. #ifndef R_TRANSFER_API_H
  19. #define R_TRANSFER_API_H
  20. /***********************************************************************************************************************
  21. * Includes
  22. **********************************************************************************************************************/
  23. /* Common error codes and definitions. */
  24. #include "bsp_api.h"
  25. /* Common macro for FSP header files. There is also a corresponding FSP_FOOTER macro at the end of this file. */
  26. FSP_HEADER
  27. /**********************************************************************************************************************
  28. * Macro definitions
  29. **********************************************************************************************************************/
  30. #define TRANSFER_SETTINGS_MODE_BITS (30U)
  31. #define TRANSFER_SETTINGS_SIZE_BITS (28U)
  32. #define TRANSFER_SETTINGS_SRC_ADDR_BITS (26U)
  33. #define TRANSFER_SETTINGS_CHAIN_MODE_BITS (22U)
  34. #define TRANSFER_SETTINGS_IRQ_BITS (21U)
  35. #define TRANSFER_SETTINGS_REPEAT_AREA_BITS (20U)
  36. #define TRANSFER_SETTINGS_DEST_ADDR_BITS (18U)
  37. /**********************************************************************************************************************
  38. * Typedef definitions
  39. **********************************************************************************************************************/
  40. /** Transfer control block. Allocate an instance specific control block to pass into the transfer API calls.
  41. */
  42. typedef void transfer_ctrl_t;
  43. #ifndef BSP_OVERRIDE_TRANSFER_MODE_T
  44. /** Transfer mode describes what will happen when a transfer request occurs. */
  45. typedef enum e_transfer_mode
  46. {
  47. /** In normal mode, each transfer request causes a transfer of @ref transfer_size_t from the source pointer to
  48. * the destination pointer. The transfer length is decremented and the source and address pointers are
  49. * updated according to @ref transfer_addr_mode_t. After the transfer length reaches 0, transfer requests
  50. * will not cause any further transfers. */
  51. TRANSFER_MODE_NORMAL = 0,
  52. /** Repeat mode is like normal mode, except that when the transfer length reaches 0, the pointer to the
  53. * repeat area and the transfer length will be reset to their initial values. If DMAC is used, the
  54. * transfer repeats only transfer_info_t::num_blocks times. After the transfer repeats
  55. * transfer_info_t::num_blocks times, transfer requests will not cause any further transfers. If DTC is
  56. * used, the transfer repeats continuously (no limit to the number of repeat transfers). */
  57. TRANSFER_MODE_REPEAT = 1,
  58. /** In block mode, each transfer request causes transfer_info_t::length transfers of @ref transfer_size_t.
  59. * After each individual transfer, the source and destination pointers are updated according to
  60. * @ref transfer_addr_mode_t. After the block transfer is complete, transfer_info_t::num_blocks is
  61. * decremented. After the transfer_info_t::num_blocks reaches 0, transfer requests will not cause any
  62. * further transfers. */
  63. TRANSFER_MODE_BLOCK = 2,
  64. /** In addition to block mode features, repeat-block mode supports a ring buffer of blocks and offsets
  65. * within a block (to split blocks into arrays of their first data, second data, etc.) */
  66. TRANSFER_MODE_REPEAT_BLOCK = 3
  67. } transfer_mode_t;
  68. #endif
  69. #ifndef BSP_OVERRIDE_TRANSFER_SIZE_T
  70. /** Transfer size specifies the size of each individual transfer.
  71. * Total transfer length = transfer_size_t * transfer_length_t
  72. */
  73. typedef enum e_transfer_size
  74. {
  75. TRANSFER_SIZE_1_BYTE = 0, ///< Each transfer transfers a 8-bit value
  76. TRANSFER_SIZE_2_BYTE = 1, ///< Each transfer transfers a 16-bit value
  77. TRANSFER_SIZE_4_BYTE = 2, ///< Each transfer transfers a 32-bit value
  78. TRANSFER_SIZE_8_BYTE = 3 ///< Each transfer transfers a 64-bit value
  79. } transfer_size_t;
  80. #endif
  81. #ifndef BSP_OVERRIDE_TRANSFER_ADDR_MODE_T
  82. /** Address mode specifies whether to modify (increment or decrement) pointer after each transfer. */
  83. typedef enum e_transfer_addr_mode
  84. {
  85. /** Address pointer remains fixed after each transfer. */
  86. TRANSFER_ADDR_MODE_FIXED = 0,
  87. /** Offset is added to the address pointer after each transfer. */
  88. TRANSFER_ADDR_MODE_OFFSET = 1,
  89. /** Address pointer is incremented by associated @ref transfer_size_t after each transfer. */
  90. TRANSFER_ADDR_MODE_INCREMENTED = 2,
  91. /** Address pointer is decremented by associated @ref transfer_size_t after each transfer. */
  92. TRANSFER_ADDR_MODE_DECREMENTED = 3
  93. } transfer_addr_mode_t;
  94. #endif
  95. #ifndef BSP_OVERRIDE_TRANSFER_REPEAT_AREA_T
  96. /** Repeat area options (source or destination). In @ref TRANSFER_MODE_REPEAT, the selected pointer returns to its
  97. * original value after transfer_info_t::length transfers. In @ref TRANSFER_MODE_BLOCK and @ref TRANSFER_MODE_REPEAT_BLOCK,
  98. * the selected pointer returns to its original value after each transfer. */
  99. typedef enum e_transfer_repeat_area
  100. {
  101. /** Destination area repeated in @ref TRANSFER_MODE_REPEAT or @ref TRANSFER_MODE_BLOCK or @ref TRANSFER_MODE_REPEAT_BLOCK. */
  102. TRANSFER_REPEAT_AREA_DESTINATION = 0,
  103. /** Source area repeated in @ref TRANSFER_MODE_REPEAT or @ref TRANSFER_MODE_BLOCK or @ref TRANSFER_MODE_REPEAT_BLOCK. */
  104. TRANSFER_REPEAT_AREA_SOURCE = 1
  105. } transfer_repeat_area_t;
  106. #endif
  107. #ifndef BSP_OVERRIDE_TRANSFER_CHAIN_MODE_T
  108. /** Chain transfer mode options.
  109. * @note Only applies for DTC. */
  110. typedef enum e_transfer_chain_mode
  111. {
  112. /** Chain mode not used. */
  113. TRANSFER_CHAIN_MODE_DISABLED = 0,
  114. /** Switch to next transfer after a single transfer from this @ref transfer_info_t. */
  115. TRANSFER_CHAIN_MODE_EACH = 2,
  116. /** Complete the entire transfer defined in this @ref transfer_info_t before chaining to next transfer. */
  117. TRANSFER_CHAIN_MODE_END = 3
  118. } transfer_chain_mode_t;
  119. #endif
  120. #ifndef BSP_OVERRIDE_TRANSFER_IRQ_T
  121. /** Interrupt options. */
  122. typedef enum e_transfer_irq
  123. {
  124. /** Interrupt occurs only after last transfer. If this transfer is chained to a subsequent transfer,
  125. * the interrupt will occur only after subsequent chained transfer(s) are complete.
  126. * @warning DTC triggers the interrupt of the activation source. Choosing TRANSFER_IRQ_END with DTC will
  127. * prevent activation source interrupts until the transfer is complete. */
  128. TRANSFER_IRQ_END = 0,
  129. /** Interrupt occurs after each transfer.
  130. * @note Not available in all HAL drivers. See HAL driver for details. */
  131. TRANSFER_IRQ_EACH = 1
  132. } transfer_irq_t;
  133. #endif
  134. #ifndef BSP_OVERRIDE_TRANSFER_CALLBACK_ARGS_T
  135. /** Callback function parameter data. */
  136. typedef struct st_transfer_callback_args_t
  137. {
  138. void * p_context; ///< Placeholder for user data. Set in @ref transfer_api_t::open function in ::transfer_cfg_t.
  139. } transfer_callback_args_t;
  140. #endif
  141. /** Driver specific information. */
  142. typedef struct st_transfer_properties
  143. {
  144. uint32_t block_count_max; ///< Maximum number of blocks
  145. uint32_t block_count_remaining; ///< Number of blocks remaining
  146. uint32_t transfer_length_max; ///< Maximum number of transfers
  147. uint32_t transfer_length_remaining; ///< Number of transfers remaining
  148. } transfer_properties_t;
  149. #ifndef BSP_OVERRIDE_TRANSFER_INFO_T
  150. /** This structure specifies the properties of the transfer.
  151. * @warning When using DTC, this structure corresponds to the descriptor block registers required by the DTC.
  152. * The following components may be modified by the driver: p_src, p_dest, num_blocks, and length.
  153. * @warning When using DTC, do NOT reuse this structure to configure multiple transfers. Each transfer must
  154. * have a unique transfer_info_t.
  155. * @warning When using DTC, this structure must not be allocated in a temporary location. Any instance of this
  156. * structure must remain in scope until the transfer it is used for is closed.
  157. * @note When using DTC, consider placing instances of this structure in a protected section of memory. */
  158. typedef struct st_transfer_info
  159. {
  160. union
  161. {
  162. struct
  163. {
  164. uint32_t : 16;
  165. uint32_t : 2;
  166. /** Select what happens to destination pointer after each transfer. */
  167. transfer_addr_mode_t dest_addr_mode : 2;
  168. /** Select to repeat source or destination area, unused in @ref TRANSFER_MODE_NORMAL. */
  169. transfer_repeat_area_t repeat_area : 1;
  170. /** Select if interrupts should occur after each individual transfer or after the completion of all planned
  171. * transfers. */
  172. transfer_irq_t irq : 1;
  173. /** Select when the chain transfer ends. */
  174. transfer_chain_mode_t chain_mode : 2;
  175. uint32_t : 2;
  176. /** Select what happens to source pointer after each transfer. */
  177. transfer_addr_mode_t src_addr_mode : 2;
  178. /** Select number of bytes to transfer at once. @see transfer_info_t::length. */
  179. transfer_size_t size : 2;
  180. /** Select mode from @ref transfer_mode_t. */
  181. transfer_mode_t mode : 2;
  182. } transfer_settings_word_b;
  183. uint32_t transfer_settings_word;
  184. };
  185. void const * volatile p_src; ///< Source pointer
  186. void * volatile p_dest; ///< Destination pointer
  187. /** Number of blocks to transfer when using @ref TRANSFER_MODE_BLOCK (both DTC an DMAC) or
  188. * @ref TRANSFER_MODE_REPEAT (DMAC only) or
  189. * @ref TRANSFER_MODE_REPEAT_BLOCK (DMAC only), unused in other modes. */
  190. volatile uint16_t num_blocks;
  191. /** Length of each transfer. Range limited for @ref TRANSFER_MODE_BLOCK, @ref TRANSFER_MODE_REPEAT,
  192. * and @ref TRANSFER_MODE_REPEAT_BLOCK
  193. * see HAL driver for details. */
  194. volatile uint16_t length;
  195. } transfer_info_t;
  196. #endif
  197. /** Driver configuration set in @ref transfer_api_t::open. All elements except p_extend are required and must be
  198. * initialized. */
  199. typedef struct st_transfer_cfg
  200. {
  201. /** Pointer to transfer configuration options. If using chain transfer (DTC only), this can be a pointer to
  202. * an array of chained transfers that will be completed in order. */
  203. transfer_info_t * p_info;
  204. void const * p_extend; ///< Extension parameter for hardware specific settings.
  205. } transfer_cfg_t;
  206. /** Select whether to start single or repeated transfer with software start. */
  207. typedef enum e_transfer_start_mode
  208. {
  209. TRANSFER_START_MODE_SINGLE = 0, ///< Software start triggers single transfer.
  210. TRANSFER_START_MODE_REPEAT = 1 ///< Software start transfer continues until transfer is complete.
  211. } transfer_start_mode_t;
  212. /** Transfer functions implemented at the HAL layer will follow this API. */
  213. typedef struct st_transfer_api
  214. {
  215. /** Initial configuration.
  216. *
  217. * @param[in,out] p_ctrl Pointer to control block. Must be declared by user. Elements set here.
  218. * @param[in] p_cfg Pointer to configuration structure. All elements of this structure
  219. * must be set by user.
  220. */
  221. fsp_err_t (* open)(transfer_ctrl_t * const p_ctrl, transfer_cfg_t const * const p_cfg);
  222. /** Reconfigure the transfer.
  223. * Enable the transfer if p_info is valid.
  224. *
  225. * @param[in,out] p_ctrl Pointer to control block. Must be declared by user. Elements set here.
  226. * @param[in] p_info Pointer to a new transfer info structure.
  227. */
  228. fsp_err_t (* reconfigure)(transfer_ctrl_t * const p_ctrl, transfer_info_t * p_info);
  229. /** Reset source address pointer, destination address pointer, and/or length, keeping all other settings the same.
  230. * Enable the transfer if p_src, p_dest, and length are valid.
  231. *
  232. * @param[in] p_ctrl Control block set in @ref transfer_api_t::open call for this transfer.
  233. * @param[in] p_src Pointer to source. Set to NULL if source pointer should not change.
  234. * @param[in] p_dest Pointer to destination. Set to NULL if destination pointer should not change.
  235. * @param[in] num_transfers Transfer length in normal mode or number of blocks in block mode. In DMAC only,
  236. * resets number of repeats (initially stored in transfer_info_t::num_blocks) in
  237. * repeat mode. Not used in repeat mode for DTC.
  238. */
  239. fsp_err_t (* reset)(transfer_ctrl_t * const p_ctrl, void const * p_src, void * p_dest,
  240. uint16_t const num_transfers);
  241. /** Enable transfer. Transfers occur after the activation source event (or when
  242. * @ref transfer_api_t::softwareStart is called if no peripheral event is chosen as activation source).
  243. *
  244. * @param[in] p_ctrl Control block set in @ref transfer_api_t::open call for this transfer.
  245. */
  246. fsp_err_t (* enable)(transfer_ctrl_t * const p_ctrl);
  247. /** Disable transfer. Transfers do not occur after the activation source event (or when
  248. * @ref transfer_api_t::softwareStart is called if no peripheral event is chosen as the DMAC activation source).
  249. * @note If a transfer is in progress, it will be completed. Subsequent transfer requests do not cause a
  250. * transfer.
  251. *
  252. * @param[in] p_ctrl Control block set in @ref transfer_api_t::open call for this transfer.
  253. */
  254. fsp_err_t (* disable)(transfer_ctrl_t * const p_ctrl);
  255. /** Start transfer in software.
  256. * @warning Only works if no peripheral event is chosen as the DMAC activation source.
  257. * @note Not supported for DTC.
  258. *
  259. * @param[in] p_ctrl Control block set in @ref transfer_api_t::open call for this transfer.
  260. * @param[in] mode Select mode from @ref transfer_start_mode_t.
  261. */
  262. fsp_err_t (* softwareStart)(transfer_ctrl_t * const p_ctrl, transfer_start_mode_t mode);
  263. /** Stop transfer in software. The transfer will stop after completion of the current transfer.
  264. * @note Not supported for DTC.
  265. * @note Only applies for transfers started with TRANSFER_START_MODE_REPEAT.
  266. * @warning Only works if no peripheral event is chosen as the DMAC activation source.
  267. *
  268. * @param[in] p_ctrl Control block set in @ref transfer_api_t::open call for this transfer.
  269. */
  270. fsp_err_t (* softwareStop)(transfer_ctrl_t * const p_ctrl);
  271. /** Provides information about this transfer.
  272. *
  273. * @param[in] p_ctrl Control block set in @ref transfer_api_t::open call for this transfer.
  274. * @param[out] p_properties Driver specific information.
  275. */
  276. fsp_err_t (* infoGet)(transfer_ctrl_t * const p_ctrl, transfer_properties_t * const p_properties);
  277. /** Releases hardware lock. This allows a transfer to be reconfigured using @ref transfer_api_t::open.
  278. *
  279. * @param[in] p_ctrl Control block set in @ref transfer_api_t::open call for this transfer.
  280. */
  281. fsp_err_t (* close)(transfer_ctrl_t * const p_ctrl);
  282. /** To update next transfer information without interruption during transfer.
  283. * Allow further transfer continuation.
  284. *
  285. * @param[in] p_ctrl Control block set in @ref transfer_api_t::open call for this transfer.
  286. * @param[in] p_src Pointer to source. Set to NULL if source pointer should not change.
  287. * @param[in] p_dest Pointer to destination. Set to NULL if destination pointer should not change.
  288. * @param[in] num_transfers Transfer length in normal mode or block mode.
  289. */
  290. fsp_err_t (* reload)(transfer_ctrl_t * const p_ctrl, void const * p_src, void * p_dest,
  291. uint32_t const num_transfers);
  292. /** Specify callback function and optional context pointer and working memory pointer.
  293. *
  294. * @param[in] p_ctrl Control block set in @ref transfer_api_t::open call for this transfer.
  295. * @param[in] p_callback Callback function to register
  296. * @param[in] p_context Pointer to send to callback function
  297. * @param[in] p_callback_memory Pointer to volatile memory where callback structure can be allocated.
  298. * Callback arguments allocated here are only valid during the callback.
  299. */
  300. fsp_err_t (* callbackSet)(transfer_ctrl_t * const p_ctrl, void (* p_callback)(transfer_callback_args_t *),
  301. void * const p_context, transfer_callback_args_t * const p_callback_memory);
  302. } transfer_api_t;
  303. /** This structure encompasses everything that is needed to use an instance of this interface. */
  304. typedef struct st_transfer_instance
  305. {
  306. transfer_ctrl_t * p_ctrl; ///< Pointer to the control structure for this instance
  307. transfer_cfg_t const * p_cfg; ///< Pointer to the configuration structure for this instance
  308. transfer_api_t const * p_api; ///< Pointer to the API structure for this instance
  309. } transfer_instance_t;
  310. /* Common macro for FSP header files. There is also a corresponding FSP_HEADER macro at the top of this file. */
  311. FSP_FOOTER
  312. #endif
  313. /*******************************************************************************************************************//**
  314. * @} (end defgroup TRANSFER_API)
  315. **********************************************************************************************************************/