fsp_xspi0_boot_scons.ld 18 KB

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  1. /*
  2. Linker File for Renesas RZ/N2L FSP
  3. */
  4. /* The memory information for each device is done in memory regions file.
  5. * The starting address and length of memory not defined in memory regions file are defined as 0. */
  6. /* generated memory regions file - do not edit */
  7. ATCM_START = 0x00000000;
  8. ATCM_LENGTH = 0x20000;
  9. BTCM_START = 0x00100000;
  10. BTCM_LENGTH = 0x20000;
  11. SYSTEM_RAM_START = 0x10000000;
  12. SYSTEM_RAM_LENGTH = 0x180000;
  13. SYSTEM_RAM_MIRROR_START = 0x30000000;
  14. SYSTEM_RAM_MIRROR_LENGTH = 0x180000;
  15. xSPI0_CS0_SPACE_MIRROR_START = 0x40000000;
  16. xSPI0_CS0_SPACE_MIRROR_LENGTH = 0x4000000;
  17. xSPI0_CS1_SPACE_MIRROR_START = 0x44000000;
  18. xSPI0_CS1_SPACE_MIRROR_LENGTH = 0x4000000;
  19. xSPI1_CS0_SPACE_MIRROR_START = 0x48000000;
  20. xSPI1_CS0_SPACE_MIRROR_LENGTH = 0x4000000;
  21. CS0_SPACE_MIRROR_START = 0x50000000;
  22. CS0_SPACE_MIRROR_LENGTH = 0x4000000;
  23. CS2_SPACE_MIRROR_START = 0x54000000;
  24. CS2_SPACE_MIRROR_LENGTH = 0x4000000;
  25. CS3_SPACE_MIRROR_START = 0x58000000;
  26. CS3_SPACE_MIRROR_LENGTH = 0x4000000;
  27. CS5_SPACE_MIRROR_START = 0x5C000000;
  28. CS5_SPACE_MIRROR_LENGTH = 0x4000000;
  29. xSPI0_CS0_SPACE_START = 0x60000000;
  30. xSPI0_CS0_SPACE_LENGTH = 0x4000000;
  31. xSPI0_CS1_SPACE_START = 0x64000000;
  32. xSPI0_CS1_SPACE_LENGTH = 0x4000000;
  33. xSPI1_CS0_SPACE_START = 0x68000000;
  34. xSPI1_CS0_SPACE_LENGTH = 0x4000000;
  35. CS0_SPACE_START = 0x70000000;
  36. CS0_SPACE_LENGTH = 0x4000000;
  37. CS2_SPACE_START = 0x74000000;
  38. CS2_SPACE_LENGTH = 0x4000000;
  39. CS3_SPACE_START = 0x78000000;
  40. CS3_SPACE_LENGTH = 0x4000000;
  41. CS5_SPACE_START = 0x7C000000;
  42. CS5_SPACE_LENGTH = 0x4000000;
  43. ATCM_PRV_START = DEFINED(ATCM_START) ? ATCM_START : 0;
  44. ATCM_PRV_LENGTH = DEFINED(ATCM_LENGTH) ? ATCM_LENGTH : 0;
  45. BTCM_PRV_START = DEFINED(BTCM_START) ? BTCM_START : 0;
  46. BTCM_PRV_LENGTH = DEFINED(BTCM_LENGTH) ? BTCM_LENGTH : 0;
  47. SYSTEM_RAM_PRV_START = DEFINED(SYSTEM_RAM_START) ? SYSTEM_RAM_START : 0;
  48. SYSTEM_RAM_PRV_LENGTH = DEFINED(SYSTEM_RAM_LENGTH) ? SYSTEM_RAM_LENGTH : 0;
  49. SYSTEM_RAM_MIRROR_PRV_START = DEFINED(SYSTEM_RAM_MIRROR_START) ? SYSTEM_RAM_MIRROR_START : 0;
  50. SYSTEM_RAM_MIRROR_PRV_LENGTH = DEFINED(SYSTEM_RAM_MIRROR_LENGTH) ? SYSTEM_RAM_MIRROR_LENGTH : 0;
  51. xSPI0_CS0_SPACE_MIRROR_PRV_START = DEFINED(xSPI0_CS0_SPACE_MIRROR_START) ? xSPI0_CS0_SPACE_MIRROR_START : 0;
  52. xSPI0_CS0_SPACE_MIRROR_PRV_LENGTH = DEFINED(xSPI0_CS0_SPACE_MIRROR_LENGTH) ? xSPI0_CS0_SPACE_MIRROR_LENGTH : 0;
  53. xSPI0_CS1_SPACE_MIRROR_PRV_START = DEFINED(xSPI0_CS1_SPACE_MIRROR_START) ? xSPI0_CS1_SPACE_MIRROR_START : 0;
  54. xSPI0_CS1_SPACE_MIRROR_PRV_LENGTH = DEFINED(xSPI0_CS1_SPACE_MIRROR_LENGTH) ? xSPI0_CS1_SPACE_MIRROR_LENGTH : 0;
  55. xSPI1_CS0_SPACE_MIRROR_PRV_START = DEFINED(xSPI1_CS0_SPACE_MIRROR_START) ? xSPI1_CS0_SPACE_MIRROR_START : 0;
  56. xSPI1_CS0_SPACE_MIRROR_PRV_LENGTH = DEFINED(xSPI1_CS0_SPACE_MIRROR_LENGTH) ? xSPI1_CS0_SPACE_MIRROR_LENGTH : 0;
  57. xSPI1_CS1_SPACE_MIRROR_PRV_START = DEFINED(xSPI1_CS1_SPACE_MIRROR_START) ? xSPI1_CS1_SPACE_MIRROR_START : 0;
  58. xSPI1_CS1_SPACE_MIRROR_PRV_LENGTH = DEFINED(xSPI1_CS1_SPACE_MIRROR_LENGTH) ? xSPI1_CS1_SPACE_MIRROR_LENGTH : 0;
  59. CS0_SPACE_MIRROR_PRV_START = DEFINED(CS0_SPACE_MIRROR_START) ? CS0_SPACE_MIRROR_START : 0;
  60. CS0_SPACE_MIRROR_PRV_LENGTH = DEFINED(CS0_SPACE_MIRROR_LENGTH) ? CS0_SPACE_MIRROR_LENGTH : 0;
  61. CS2_SPACE_MIRROR_PRV_START = DEFINED(CS2_SPACE_MIRROR_START) ? CS2_SPACE_MIRROR_START : 0;
  62. CS2_SPACE_MIRROR_PRV_LENGTH = DEFINED(CS2_SPACE_MIRROR_LENGTH) ? CS2_SPACE_MIRROR_LENGTH : 0;
  63. CS3_SPACE_MIRROR_PRV_START = DEFINED(CS3_SPACE_MIRROR_START) ? CS3_SPACE_MIRROR_START : 0;
  64. CS3_SPACE_MIRROR_PRV_LENGTH = DEFINED(CS3_SPACE_MIRROR_LENGTH) ? CS3_SPACE_MIRROR_LENGTH : 0;
  65. CS5_SPACE_MIRROR_PRV_START = DEFINED(CS5_SPACE_MIRROR_START) ? CS5_SPACE_MIRROR_START : 0;
  66. CS5_SPACE_MIRROR_PRV_LENGTH = DEFINED(CS5_SPACE_MIRROR_LENGTH) ? CS5_SPACE_MIRROR_LENGTH : 0;
  67. xSPI0_CS0_SPACE_PRV_START = DEFINED(xSPI0_CS0_SPACE_START) ? xSPI0_CS0_SPACE_START : 0;
  68. xSPI0_CS0_SPACE_PRV_LENGTH = DEFINED(xSPI0_CS0_SPACE_LENGTH) ? xSPI0_CS0_SPACE_LENGTH : 0;
  69. xSPI0_CS1_SPACE_PRV_START = DEFINED(xSPI0_CS1_SPACE_START) ? xSPI0_CS1_SPACE_START : 0;
  70. xSPI0_CS1_SPACE_PRV_LENGTH = DEFINED(xSPI0_CS1_SPACE_LENGTH) ? xSPI0_CS1_SPACE_LENGTH : 0;
  71. xSPI1_CS0_SPACE_PRV_START = DEFINED(xSPI1_CS0_SPACE_START) ? xSPI1_CS0_SPACE_START : 0;
  72. xSPI1_CS0_SPACE_PRV_LENGTH = DEFINED(xSPI1_CS0_SPACE_LENGTH) ? xSPI1_CS0_SPACE_LENGTH : 0;
  73. xSPI1_CS1_SPACE_PRV_START = DEFINED(xSPI1_CS1_SPACE_START) ? xSPI1_CS1_SPACE_START : 0;
  74. xSPI1_CS1_SPACE_PRV_LENGTH = DEFINED(xSPI1_CS1_SPACE_LENGTH) ? xSPI1_CS1_SPACE_LENGTH : 0;
  75. CS0_SPACE_PRV_START = DEFINED(CS0_SPACE_START) ? CS0_SPACE_START : 0;
  76. CS0_SPACE_PRV_LENGTH = DEFINED(CS0_SPACE_LENGTH) ? CS0_SPACE_LENGTH : 0;
  77. CS2_SPACE_PRV_START = DEFINED(CS2_SPACE_START) ? CS2_SPACE_START : 0;
  78. CS2_SPACE_PRV_LENGTH = DEFINED(CS2_SPACE_LENGTH) ? CS2_SPACE_LENGTH : 0;
  79. CS3_SPACE_PRV_START = DEFINED(CS3_SPACE_START) ? CS3_SPACE_START : 0;
  80. CS3_SPACE_PRV_LENGTH = DEFINED(CS3_SPACE_LENGTH) ? CS3_SPACE_LENGTH : 0;
  81. CS5_SPACE_PRV_START = DEFINED(CS5_SPACE_START) ? CS5_SPACE_START : 0;
  82. CS5_SPACE_PRV_LENGTH = DEFINED(CS5_SPACE_LENGTH) ? CS5_SPACE_LENGTH : 0;
  83. LOADER_PARAM_ADDRESS = xSPI0_CS0_SPACE_PRV_START;
  84. FLASH_CONTENTS_ADDRESS = LOADER_PARAM_ADDRESS + 0x0000004C;
  85. LOADER_TEXT_ADDRESS = 0x00102000;
  86. INTVEC_ADDRESS = 0x10000000;
  87. TEXT_ADDRESS = 0x10020000;
  88. NONCACHE_BUFFER_OFFSET = 0x00020000;
  89. DMAC_LINK_MODE_OFFSET = 0x00044000;
  90. DATA_NONCACHE_OFFSET = 0x00048000;
  91. RAM_START = SYSTEM_RAM_PRV_START;
  92. RAM_LENGTH = SYSTEM_RAM_PRV_LENGTH;
  93. LOADER_START = BTCM_PRV_START;
  94. LOADER_LENGTH = BTCM_PRV_LENGTH;
  95. /* Define starting addresses and length for data_noncache, DMAC link mode data, CPU-shared non-cache, and CPU-specific non-cache areas. */
  96. DATA_NONCACHE_START = DEFINED(SYSTEM_RAM_MIRROR_START) ? SYSTEM_RAM_MIRROR_START + SYSTEM_RAM_MIRROR_LENGTH - DATA_NONCACHE_OFFSET : 0;
  97. DATA_NONCACHE_LENGTH = DEFINED(SYSTEM_RAM_MIRROR_LENGTH) ? 0x00004000 : 0;
  98. DMAC_LINK_MODE_START = DEFINED(SYSTEM_RAM_MIRROR_START) ? SYSTEM_RAM_MIRROR_START + SYSTEM_RAM_MIRROR_LENGTH - DMAC_LINK_MODE_OFFSET : 0;
  99. DMAC_LINK_MODE_LENGTH = DEFINED(SYSTEM_RAM_MIRROR_LENGTH) ? 0x00004000 : 0;
  100. SHARED_NONCACHE_BUFFER_START = DEFINED(SYSTEM_RAM_MIRROR_START) ? SYSTEM_RAM_MIRROR_START + SYSTEM_RAM_MIRROR_LENGTH - 0x00040000 : 0;
  101. SHARED_NONCACHE_BUFFER_LENGTH = DEFINED(SYSTEM_RAM_MIRROR_LENGTH) ? 0x00020000 : 0;
  102. NONCACHE_BUFFER_START = DEFINED(SYSTEM_RAM_MIRROR_START) ? SYSTEM_RAM_MIRROR_START + SYSTEM_RAM_MIRROR_LENGTH - NONCACHE_BUFFER_OFFSET : 0;
  103. NONCACHE_BUFFER_LENGTH = DEFINED(SYSTEM_RAM_MIRROR_LENGTH) ? 0x00020000 : 0;
  104. MEMORY
  105. {
  106. ATCM : ORIGIN = ATCM_PRV_START, LENGTH = ATCM_PRV_LENGTH
  107. BTCM : ORIGIN = BTCM_PRV_START, LENGTH = BTCM_PRV_LENGTH
  108. SYSTEM_RAM : ORIGIN = SYSTEM_RAM_PRV_START, LENGTH = SYSTEM_RAM_PRV_LENGTH
  109. SYSTEM_RAM_MIRROR : ORIGIN = SYSTEM_RAM_MIRROR_PRV_START, LENGTH = SYSTEM_RAM_MIRROR_PRV_LENGTH
  110. xSPI0_CS0_SPACE_MIRROR : ORIGIN = xSPI0_CS0_SPACE_MIRROR_PRV_START, LENGTH = xSPI0_CS0_SPACE_MIRROR_PRV_LENGTH
  111. xSPI0_CS1_SPACE_MIRROR : ORIGIN = xSPI0_CS1_SPACE_MIRROR_PRV_START, LENGTH = xSPI0_CS1_SPACE_MIRROR_PRV_LENGTH
  112. xSPI1_CS0_SPACE_MIRROR : ORIGIN = xSPI1_CS0_SPACE_MIRROR_PRV_START, LENGTH = xSPI1_CS0_SPACE_MIRROR_PRV_LENGTH
  113. xSPI1_CS1_SPACE_MIRROR : ORIGIN = xSPI1_CS1_SPACE_MIRROR_PRV_START, LENGTH = xSPI1_CS1_SPACE_MIRROR_PRV_LENGTH
  114. CS0_SPACE_MIRROR : ORIGIN = CS0_SPACE_MIRROR_PRV_START, LENGTH = CS0_SPACE_MIRROR_PRV_LENGTH
  115. CS2_SPACE_MIRROR : ORIGIN = CS2_SPACE_MIRROR_PRV_START, LENGTH = CS2_SPACE_MIRROR_PRV_LENGTH
  116. CS3_SPACE_MIRROR : ORIGIN = CS3_SPACE_MIRROR_PRV_START, LENGTH = CS3_SPACE_MIRROR_PRV_LENGTH
  117. CS5_SPACE_MIRROR : ORIGIN = CS5_SPACE_MIRROR_PRV_START, LENGTH = CS5_SPACE_MIRROR_PRV_LENGTH
  118. xSPI0_CS0_SPACE : ORIGIN = xSPI0_CS0_SPACE_PRV_START, LENGTH = xSPI0_CS0_SPACE_PRV_LENGTH
  119. xSPI0_CS1_SPACE : ORIGIN = xSPI0_CS1_SPACE_PRV_START, LENGTH = xSPI0_CS1_SPACE_PRV_LENGTH
  120. xSPI1_CS0_SPACE : ORIGIN = xSPI1_CS0_SPACE_PRV_START, LENGTH = xSPI1_CS0_SPACE_PRV_LENGTH
  121. xSPI1_CS1_SPACE : ORIGIN = xSPI1_CS1_SPACE_PRV_START, LENGTH = xSPI1_CS1_SPACE_PRV_LENGTH
  122. CS0_SPACE : ORIGIN = CS0_SPACE_PRV_START, LENGTH = CS0_SPACE_PRV_LENGTH
  123. CS2_SPACE : ORIGIN = CS2_SPACE_PRV_START, LENGTH = CS2_SPACE_PRV_LENGTH
  124. CS3_SPACE : ORIGIN = CS3_SPACE_PRV_START, LENGTH = CS3_SPACE_PRV_LENGTH
  125. CS5_SPACE : ORIGIN = CS5_SPACE_PRV_START, LENGTH = CS5_SPACE_PRV_LENGTH
  126. RAM : ORIGIN = RAM_START, LENGTH = RAM_LENGTH
  127. LOADER_STACK : ORIGIN = LOADER_START, LENGTH = LOADER_LENGTH
  128. DUMMY : ORIGIN = RAM_START, LENGTH = RAM_LENGTH
  129. DATA_NONCACHE : ORIGIN = DATA_NONCACHE_START, LENGTH = DATA_NONCACHE_LENGTH
  130. DMAC_LINK_MODE : ORIGIN = DMAC_LINK_MODE_START, LENGTH = DMAC_LINK_MODE_LENGTH
  131. SHARED_NONCACHE_BUFFER : ORIGIN = SHARED_NONCACHE_BUFFER_START, LENGTH = SHARED_NONCACHE_BUFFER_LENGTH
  132. NONCACHE_BUFFER : ORIGIN = NONCACHE_BUFFER_START, LENGTH = NONCACHE_BUFFER_LENGTH
  133. }
  134. SECTIONS
  135. {
  136. .loader_param LOADER_PARAM_ADDRESS : AT (LOADER_PARAM_ADDRESS)
  137. {
  138. KEEP(*(.loader_param))
  139. } > xSPI0_CS0_SPACE
  140. .flash_contents FLASH_CONTENTS_ADDRESS : AT (FLASH_CONTENTS_ADDRESS)
  141. {
  142. _mloader_text = .;
  143. . = . + (_loader_text_end - _loader_text_start);
  144. _mloader_data = .;
  145. . = . + (_loader_data_end - _loader_data_start);
  146. _mfvector = .;
  147. . = . + (_fvector_end - _fvector_start);
  148. _mtext = .;
  149. . = . + (_text_end - _text_start);
  150. _mdummy = .;
  151. . = . + (_dummy_end - _dummy_start);
  152. _mdata = .;
  153. . = . + (_data_end - _data_start);
  154. _mdata_noncache = .;
  155. . = . + (_data_noncache_end - _data_noncache_start);
  156. flash_contents_end = .;
  157. } > xSPI0_CS0_SPACE
  158. .loader_text LOADER_TEXT_ADDRESS : AT (_mloader_text)
  159. {
  160. _loader_text_start = .;
  161. *(.loader_text)
  162. build/rzn/fsp/src/bsp/cmsis/Device/RENESAS/Source/cr/startup_core.o(.text*)
  163. build/rzn/fsp/src/bsp/cmsis/Device/RENESAS/Source/cr/system_core.o(.text*)
  164. build/rzn/fsp/src/bsp/cmsis/Device/RENESAS/Source/startup.o(.text*)
  165. build/rzn/fsp/src/bsp/cmsis/Device/RENESAS/Source/system.o(.text*)
  166. build/rzn/fsp/src/bsp/mcu/all/cr/bsp_irq_core.o(.text*)
  167. build/rzn/fsp/src/bsp/mcu/all/bsp_clocks.o(.text*)
  168. build/rzn/fsp/src/bsp/mcu/all/bsp_irq.o(.text*)
  169. build/rzn/fsp/src/bsp/mcu/all/bsp_register_protection.o(.text*)
  170. build/rzn/fsp/src/bsp/mcu/all/bsp_cache.o(.text*)
  171. build/rzn/fsp/src/r_ioport/r_ioport.o(.text*)
  172. KEEP(*(.warm_start))
  173. . = . + (512 - ((. - _loader_text_start) % 512));
  174. _loader_text_end = .;
  175. } > LOADER_STACK
  176. .loader_data : AT (_mloader_data)
  177. {
  178. _loader_data_start = .;
  179. __loader_data_start = .;
  180. build/rzn/fsp/src/bsp/cmsis/Device/RENESAS/Source/cr/startup_core.o(.data*)
  181. build/rzn/fsp/src/bsp/cmsis/Device/RENESAS/Source/cr/system_core.o(.rodata*)
  182. build/rzn/fsp/src/bsp/cmsis/Device/RENESAS/Source/startup.o(.data*)
  183. build/rzn/fsp/src/bsp/cmsis/Device/RENESAS/Source/system.o(.data*)
  184. build/rzn/fsp/src/bsp/mcu/all/cr/bsp_irq_core.o(.data*)
  185. build/rzn/fsp/src/bsp/mcu/all/bsp_clocks.o(.data*)
  186. build/rzn/fsp/src/bsp/mcu/all/bsp_irq.o(.data*)
  187. build/rzn/fsp/src/bsp/mcu/all/bsp_register_protection.o(.data*)
  188. build/rzn/fsp/src/bsp/mcu/all/bsp_cache.o(.data*)
  189. build/rzn/fsp/src/r_ioport/r_ioport.o(.data*)
  190. . = ALIGN(4);
  191. __loader_data_end = .;
  192. __loader_bss_start = .;
  193. build/rzn/fsp/src/bsp/cmsis/Device/RENESAS/Source/cr/startup_core.o(.bss*)
  194. build/rzn/fsp/src/bsp/cmsis/Device/RENESAS/Source/cr/system_core.o(.bss*)
  195. build/rzn/fsp/src/bsp/cmsis/Device/RENESAS/Source/startup.o(.bss*)
  196. build/rzn/fsp/src/bsp/cmsis/Device/RENESAS/Source/system.o(.bss*)
  197. build/rzn/fsp/src/bsp/mcu/all/cr/bsp_irq_core.o(.bss*)
  198. build/rzn/fsp/src/bsp/mcu/all/bsp_clocks.o(.bss*)
  199. build/rzn/fsp/src/bsp/mcu/all/bsp_irq.o(.bss*)
  200. build/rzn/fsp/src/bsp/mcu/all/bsp_register_protection.o(.bss*)
  201. build/rzn/fsp/src/bsp/mcu/all/bsp_cache.o(.bss*)
  202. build/rzn/fsp/src/r_ioport/r_ioport.o(.bss*)
  203. build/rzn/fsp/src/bsp/cmsis/Device/RENESAS/Source/*.o(COMMON)
  204. build/rzn/fsp/src/bsp/mcu/all/cr/bsp_irq_core.o(COMMON)
  205. build/rzn/fsp/src/bsp/mcu/all/bsp_clocks.o(COMMON)
  206. build/rzn/fsp/src/bsp/mcu/all/bsp_irq.o(COMMON)
  207. build/rzn/fsp/src/bsp/mcu/all/bsp_register_protection.o(.COMMON)
  208. build/rzn/fsp/src/bsp/mcu/all/bsp_cache.o(COMMON)
  209. build/rzn/fsp/src/r_ioport/r_ioport.o(.COMMON)
  210. . = ALIGN(4);
  211. __loader_bss_end = . ;
  212. _loader_data_end = .;
  213. } > LOADER_STACK
  214. .intvec INTVEC_ADDRESS : AT (_mfvector)
  215. {
  216. _fvector_start = .;
  217. KEEP(*(.intvec))
  218. _fvector_end = .;
  219. } > RAM
  220. .text TEXT_ADDRESS : AT (_mtext)
  221. {
  222. _text_start = .;
  223. *(.text*)
  224. KEEP(*(.reset_handler))
  225. KEEP(*(.init))
  226. KEEP(*(.fini))
  227. /* .ctors */
  228. *crtbegin.o(.ctors)
  229. *crtbegin?.o(.ctors)
  230. *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
  231. *(SORT(.ctors.*))
  232. *(.ctors)
  233. _ctor_end = .;
  234. /* .dtors */
  235. *crtbegin.o(.dtors)
  236. *crtbegin?.o(.dtors)
  237. *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
  238. *(SORT(.dtors.*))
  239. *(.dtors)
  240. _dtor_end = .;
  241. /* section information for utest */
  242. . = ALIGN(4);
  243. __rt_utest_tc_tab_start = .;
  244. KEEP(*(UtestTcTab))
  245. __rt_utest_tc_tab_end = .;
  246. /* section information for finsh shell */
  247. . = ALIGN(4);
  248. __fsymtab_start = .;
  249. KEEP(*(FSymTab))
  250. __fsymtab_end = .;
  251. . = ALIGN(4);
  252. __vsymtab_start = .;
  253. KEEP(*(VSymTab))
  254. __vsymtab_end = .;
  255. /* section information for initial. */
  256. . = ALIGN(4);
  257. __rt_init_start = .;
  258. KEEP(*(SORT(.rti_fn*)))
  259. __rt_init_end = .;
  260. /* new GCC version uses .init_array */
  261. PROVIDE(__ctors_start__ = .);
  262. KEEP (*(SORT(.init_array.*)))
  263. KEEP (*(.init_array))
  264. PROVIDE(__ctors_end__ = .);
  265. . = ALIGN(4);
  266. KEEP(*(FalPartTable))
  267. KEEP(*(.eh_frame*))
  268. } > RAM
  269. .rvectors :
  270. {
  271. _rvectors_start = .;
  272. KEEP(*(.rvectors))
  273. _rvectors_end = .;
  274. } > RAM
  275. .ARM.extab :
  276. {
  277. *(.ARM.extab* .gnu.linkonce.armextab.*)
  278. } > RAM
  279. __exidx_start = .;
  280. .ARM.exidx :
  281. {
  282. *(.ARM.exidx* .gnu.linkonce.armexidx.*)
  283. } > RAM
  284. __exidx_end = .;
  285. .got :
  286. {
  287. *(.got)
  288. *(.got.plt)
  289. . = ALIGN(4);
  290. _text_end = .;
  291. } > RAM
  292. .dummy _fvector_end : AT (_mdummy)
  293. {
  294. _dummy_start = .;
  295. KEEP(*(.dummy));
  296. _dummy_end = .;
  297. } > DUMMY
  298. .data : AT (_mdata)
  299. {
  300. _data_start = .;
  301. *(vtable)
  302. *(.data.*)
  303. *(.data)
  304. *(.rodata*)
  305. _erodata = .;
  306. . = ALIGN(4);
  307. /* preinit data */
  308. PROVIDE_HIDDEN (__preinit_array_start = .);
  309. KEEP(*(.preinit_array))
  310. PROVIDE_HIDDEN (__preinit_array_end = .);
  311. . = ALIGN(4);
  312. /* init data */
  313. PROVIDE_HIDDEN (__init_array_start = .);
  314. KEEP(*(SORT(.init_array.*)))
  315. KEEP(*(.init_array))
  316. PROVIDE_HIDDEN (__init_array_end = .);
  317. . = ALIGN(4);
  318. /* finit data */
  319. PROVIDE_HIDDEN (__fini_array_start = .);
  320. KEEP(*(SORT(.fini_array.*)))
  321. KEEP(*(.fini_array))
  322. PROVIDE_HIDDEN (__fini_array_end = .);
  323. KEEP(*(.jcr*))
  324. . = ALIGN(4);
  325. /* All data end */
  326. _data_end = .;
  327. } > RAM
  328. .bss :
  329. {
  330. . = ALIGN(4);
  331. __bss_start__ = .;
  332. _bss = .;
  333. *(.bss*)
  334. *(COMMON)
  335. . = ALIGN(4);
  336. __bss_end__ = .;
  337. _ebss = .;
  338. _end = .;
  339. } > RAM
  340. .heap (NOLOAD) :
  341. {
  342. . = ALIGN(8);
  343. __HeapBase = .;
  344. /* Place the STD heap here. */
  345. KEEP(*(.heap))
  346. __HeapLimit = .;
  347. } > RAM
  348. .thread_stack (NOLOAD):
  349. {
  350. . = ALIGN(8);
  351. __ThreadStackBase = .;
  352. /* Place the Thread stacks here. */
  353. KEEP(*(.stack*))
  354. __ThreadStackLimit = .;
  355. } > RAM
  356. .sys_stack (NOLOAD) :
  357. {
  358. . = ALIGN(8);
  359. __SysStackBase = .;
  360. /* Place the sys_stack here. */
  361. KEEP(*(.sys_stack))
  362. __SysStackLimit = .;
  363. } > LOADER_STACK
  364. .svc_stack (NOLOAD) :
  365. {
  366. . = ALIGN(8);
  367. __SvcStackBase = .;
  368. /* Place the svc_stack here. */
  369. KEEP(*(.svc_stack))
  370. __SvcStackLimit = .;
  371. } > LOADER_STACK
  372. .irq_stack (NOLOAD) :
  373. {
  374. . = ALIGN(8);
  375. __IrqStackBase = .;
  376. /* Place the irq_stack here. */
  377. KEEP(*(.irq_stack))
  378. __IrqStackLimit = .;
  379. } > LOADER_STACK
  380. .fiq_stack (NOLOAD) :
  381. {
  382. . = ALIGN(8);
  383. __FiqStackBase = .;
  384. /* Place the fiq_stack here. */
  385. KEEP(*(.fiq_stack))
  386. __FiqStackLimit = .;
  387. } > LOADER_STACK
  388. .und_stack (NOLOAD) :
  389. {
  390. . = ALIGN(8);
  391. __UndStackBase = .;
  392. /* Place the und_stack here. */
  393. KEEP(*(.und_stack))
  394. __UndStackLimit = .;
  395. } > LOADER_STACK
  396. .abt_stack (NOLOAD) :
  397. {
  398. . = ALIGN(8);
  399. __AbtStackBase = .;
  400. /* Place the abt_stack here. */
  401. KEEP(*(.abt_stack))
  402. __AbtStackLimit = .;
  403. } > LOADER_STACK
  404. .data_noncache DATA_NONCACHE_START : AT (_mdata_noncache)
  405. {
  406. . = ALIGN(4);
  407. _data_noncache_start = .;
  408. KEEP(*(.data_noncache*))
  409. _data_noncache_end = .;
  410. } > DATA_NONCACHE
  411. .dmac_link_mode DMAC_LINK_MODE_START : AT (DMAC_LINK_MODE_START)
  412. {
  413. . = ALIGN(4);
  414. _DmacLinkMode_start = .;
  415. KEEP(*(.dmac_link_mode*))
  416. _DmacLinkMode_end = .;
  417. } > DMAC_LINK_MODE
  418. .shared_noncache_buffer SHARED_NONCACHE_BUFFER_START (NOLOAD) : AT (SHARED_NONCACHE_BUFFER_START)
  419. {
  420. . = ALIGN(32);
  421. _sncbuffer_start = .;
  422. KEEP(*(.shared_noncache_buffer*))
  423. _sncbuffer_end = .;
  424. } > SHARED_NONCACHE_BUFFER
  425. .noncache_buffer NONCACHE_BUFFER_START (NOLOAD) : AT (NONCACHE_BUFFER_START)
  426. {
  427. . = ALIGN(32);
  428. _ncbuffer_start = .;
  429. KEEP(*(.noncache_buffer*))
  430. _ncbuffer_end = .;
  431. } > NONCACHE_BUFFER
  432. }