arm_convolve_s8.c 11 KB

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  1. /*
  2. * SPDX-FileCopyrightText: Copyright 2010-2023 Arm Limited and/or its affiliates <open-source-office@arm.com>
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Licensed under the Apache License, Version 2.0 (the License); you may
  7. * not use this file except in compliance with the License.
  8. * You may obtain a copy of the License at
  9. *
  10. * www.apache.org/licenses/LICENSE-2.0
  11. *
  12. * Unless required by applicable law or agreed to in writing, software
  13. * distributed under the License is distributed on an AS IS BASIS, WITHOUT
  14. * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  15. * See the License for the specific language governing permissions and
  16. * limitations under the License.
  17. */
  18. /* ----------------------------------------------------------------------
  19. * Project: CMSIS NN Library
  20. * Title: arm_convolve_s8.c
  21. * Description: s8 version of convolution using symmetric quantization.
  22. *
  23. * $Date: 21 Mars 2023
  24. * $Revision: V.3.4.0
  25. *
  26. * Target : Arm(R) M-Profile Architecture
  27. *
  28. * -------------------------------------------------------------------- */
  29. #include "arm_nnfunctions.h"
  30. #include "arm_nnsupportfunctions.h"
  31. /**
  32. * @ingroup Public
  33. */
  34. /**
  35. * @addtogroup NNConv
  36. * @{
  37. */
  38. /*
  39. * Basic s8 convolution function.
  40. *
  41. * Refer header file for details. Optimal use case for the DSP/MVE implementation is when input and output channels
  42. * are multiples of 4 or atleast greater than 4.
  43. *
  44. */
  45. arm_cmsis_nn_status arm_convolve_s8(const cmsis_nn_context *ctx,
  46. const cmsis_nn_conv_params *conv_params,
  47. const cmsis_nn_per_channel_quant_params *quant_params,
  48. const cmsis_nn_dims *input_dims,
  49. const int8_t *input_data,
  50. const cmsis_nn_dims *filter_dims,
  51. const int8_t *filter_data,
  52. const cmsis_nn_dims *bias_dims,
  53. const int32_t *bias_data,
  54. const cmsis_nn_dims *output_dims,
  55. int8_t *output_data)
  56. {
  57. (void)bias_dims;
  58. if (ctx->buf == NULL)
  59. {
  60. return ARM_CMSIS_NN_ARG_ERROR;
  61. }
  62. int16_t *buffer_a = (int16_t *)ctx->buf;
  63. const int32_t input_batches = input_dims->n;
  64. const uint16_t input_x = input_dims->w;
  65. const uint16_t input_y = input_dims->h;
  66. const uint16_t input_ch = input_dims->c;
  67. const uint16_t kernel_x = filter_dims->w;
  68. const uint16_t kernel_y = filter_dims->h;
  69. const uint16_t output_x = output_dims->w;
  70. const uint16_t output_y = output_dims->h;
  71. const uint16_t output_ch = output_dims->c;
  72. const uint16_t pad_x = conv_params->padding.w;
  73. const uint16_t pad_y = conv_params->padding.h;
  74. const uint16_t stride_x = conv_params->stride.w;
  75. const uint16_t stride_y = conv_params->stride.h;
  76. const int32_t dilation_x = conv_params->dilation.w;
  77. const int32_t dilation_y = conv_params->dilation.h;
  78. const int32_t out_offset = conv_params->output_offset;
  79. const int32_t out_activation_min = conv_params->activation.min;
  80. const int32_t out_activation_max = conv_params->activation.max;
  81. const int32_t rhs_cols = kernel_x * kernel_y * input_ch;
  82. const int32_t input_offset = conv_params->input_offset;
  83. int32_t *output_mult = quant_params->multiplier;
  84. int32_t *output_shift = quant_params->shift;
  85. int i_batch;
  86. for (i_batch = 0; i_batch < input_batches; i_batch++)
  87. {
  88. #if defined(ARM_MATH_MVEI)
  89. /* Generate up to four columns from the input tensor a GEMM computation */
  90. int8_t *im2col_buf = (int8_t *)buffer_a;
  91. const int32_t rhs_rows = output_dims->c;
  92. #else
  93. /* Use as a ping-pong buffer for unordered elements */
  94. int8_t *im2col_buf = (int8_t *)buffer_a + rhs_cols * 2;
  95. int16_t *im2col_buf_start_s16 = buffer_a;
  96. #endif
  97. int8_t *out = output_data;
  98. int32_t lhs_rows = 0;
  99. /* This part implements the im2col function */
  100. for (int i_out_y = 0; i_out_y < output_y; i_out_y++)
  101. {
  102. for (int i_out_x = 0; i_out_x < output_x; i_out_x++)
  103. {
  104. const int32_t base_idx_x = stride_x * i_out_x - pad_x;
  105. const int32_t base_idx_y = stride_y * i_out_y - pad_y;
  106. for (int32_t i_ker_y = 0; i_ker_y < kernel_y; i_ker_y++)
  107. {
  108. for (int32_t i_ker_x = 0; i_ker_x < kernel_x; i_ker_x++)
  109. {
  110. const int32_t k_y = base_idx_y + dilation_y * i_ker_y;
  111. const int32_t k_x = base_idx_x + dilation_x * i_ker_x;
  112. if (k_y < 0 || k_y >= input_y || k_x < 0 || k_x >= input_x)
  113. {
  114. arm_memset_s8(im2col_buf, (int8_t)-input_offset, sizeof(int8_t) * input_ch);
  115. }
  116. else
  117. {
  118. arm_memcpy_s8(im2col_buf, input_data + (k_y * input_x + k_x) * input_ch, input_ch);
  119. }
  120. im2col_buf += input_ch;
  121. }
  122. }
  123. lhs_rows++;
  124. #if defined(ARM_MATH_MVEI)
  125. /* Computation is filed for every 4 columns */
  126. if (lhs_rows == 4)
  127. {
  128. arm_nn_mat_mult_nt_t_s8((int8_t *)buffer_a,
  129. filter_data,
  130. bias_data,
  131. out,
  132. output_mult,
  133. output_shift,
  134. lhs_rows,
  135. rhs_rows,
  136. rhs_cols,
  137. input_offset,
  138. out_offset,
  139. out_activation_min,
  140. out_activation_max,
  141. rhs_cols);
  142. out += lhs_rows * rhs_rows;
  143. lhs_rows = 0;
  144. im2col_buf = (int8_t *)buffer_a;
  145. }
  146. #else
  147. #if defined(ARM_MATH_DSP)
  148. /* Copy one column with input offset and no ordering */
  149. arm_s8_to_s16_unordered_with_offset(
  150. im2col_buf - rhs_cols, im2col_buf_start_s16, rhs_cols, (int16_t)input_offset);
  151. #else
  152. arm_q7_to_q15_with_offset(im2col_buf - rhs_cols, im2col_buf_start_s16, rhs_cols, (int16_t)input_offset);
  153. #endif
  154. im2col_buf_start_s16 += rhs_cols;
  155. if (lhs_rows == 2)
  156. {
  157. out = arm_nn_mat_mult_kernel_s8_s16(filter_data,
  158. buffer_a,
  159. output_ch,
  160. output_shift,
  161. output_mult,
  162. out_offset,
  163. out_activation_min,
  164. out_activation_max,
  165. rhs_cols,
  166. bias_data,
  167. out);
  168. /* counter reset */
  169. im2col_buf_start_s16 = buffer_a;
  170. im2col_buf = (int8_t *)buffer_a + rhs_cols * 2;
  171. lhs_rows = 0;
  172. }
  173. #endif
  174. }
  175. if (out == NULL)
  176. {
  177. return ARM_CMSIS_NN_NO_IMPL_ERROR;
  178. }
  179. }
  180. /* Handle left over columns */
  181. if (lhs_rows != 0)
  182. {
  183. #if defined(ARM_MATH_MVEI)
  184. arm_nn_mat_mult_nt_t_s8((int8_t *)buffer_a,
  185. filter_data,
  186. bias_data,
  187. out,
  188. output_mult,
  189. output_shift,
  190. lhs_rows,
  191. rhs_rows,
  192. rhs_cols,
  193. input_offset,
  194. out_offset,
  195. out_activation_min,
  196. out_activation_max,
  197. rhs_cols);
  198. out += lhs_rows * rhs_rows;
  199. lhs_rows = 0;
  200. im2col_buf = (int8_t *)buffer_a;
  201. #else // #if defined(ARM_MATH_MVEI)
  202. const int8_t *ker_a = filter_data;
  203. int i;
  204. for (i = 0; i < output_ch; i++)
  205. {
  206. /* Load the accumulator with bias first */
  207. int32_t sum = 0;
  208. if (bias_data)
  209. {
  210. sum = bias_data[i];
  211. }
  212. const int16_t *ip_as_col = buffer_a;
  213. #if defined(ARM_MATH_DSP)
  214. /* 4 multiply and accumulates are done in one loop. */
  215. uint16_t col_count = rhs_cols / 4;
  216. while (col_count)
  217. {
  218. int32_t ker_a1, ker_a2;
  219. int32_t ip_b1, ip_b2;
  220. ker_a = read_and_pad_reordered(ker_a, &ker_a1, &ker_a2);
  221. ip_b1 = arm_nn_read_q15x2_ia(&ip_as_col);
  222. sum = SMLAD(ker_a1, ip_b1, sum);
  223. ip_b2 = arm_nn_read_q15x2_ia(&ip_as_col);
  224. sum = SMLAD(ker_a2, ip_b2, sum);
  225. col_count--;
  226. }
  227. /* Handle left over mac */
  228. col_count = rhs_cols & 0x3;
  229. #else
  230. uint16_t col_count = rhs_cols;
  231. #endif
  232. while (col_count)
  233. {
  234. int8_t ker_a1 = *ker_a++;
  235. int16_t ip_b1 = *ip_as_col++;
  236. sum += ker_a1 * ip_b1;
  237. col_count--;
  238. }
  239. sum = arm_nn_requantize(sum, output_mult[i], output_shift[i]);
  240. sum += out_offset;
  241. sum = MAX(sum, out_activation_min);
  242. sum = MIN(sum, out_activation_max);
  243. *out++ = (int8_t)sum;
  244. }
  245. #endif // #if defined(ARM_MATH_MVEI)
  246. }
  247. /* Advance to the next batch */
  248. input_data += (input_x * input_y * input_ch);
  249. output_data += (output_x * output_y * output_ch);
  250. }
  251. /* Return to application */
  252. return ARM_CMSIS_NN_SUCCESS;
  253. }
  254. /**
  255. * @} end of NNConv group
  256. */