arm_elementwise_mul_s16.c 3.7 KB

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  1. /*
  2. * Copyright (C) 2022 Arm Limited or its affiliates.
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Licensed under the Apache License, Version 2.0 (the License); you may
  7. * not use this file except in compliance with the License.
  8. * You may obtain a copy of the License at
  9. *
  10. * www.apache.org/licenses/LICENSE-2.0
  11. *
  12. * Unless required by applicable law or agreed to in writing, software
  13. * distributed under the License is distributed on an AS IS BASIS, WITHOUT
  14. * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  15. * See the License for the specific language governing permissions and
  16. * limitations under the License.
  17. */
  18. /* ----------------------------------------------------------------------
  19. * Project: CMSIS NN Library
  20. * Title: arm_elementwise_mul_s16
  21. * Description: Element wise multiplication
  22. *
  23. * $Date: 10 May 2022
  24. * $Revision: V.2.1.0
  25. *
  26. * Target Processor: Cortex-M cores
  27. *
  28. * -------------------------------------------------------------------- */
  29. #include "arm_nnfunctions.h"
  30. #include "arm_nnsupportfunctions.h"
  31. /**
  32. * @ingroup groupNN
  33. */
  34. /**
  35. * @addtogroup BasicMath
  36. * @{
  37. */
  38. /**
  39. * @brief s16 element wise multiplication of two vectors
  40. *
  41. * @note Refer header file for details.
  42. *
  43. */
  44. arm_cmsis_nn_status arm_elementwise_mul_s16(const int16_t *input_1_vect,
  45. const int16_t *input_2_vect,
  46. const int32_t input_1_offset,
  47. const int32_t input_2_offset,
  48. int16_t *output,
  49. const int32_t out_offset,
  50. const int32_t out_mult,
  51. const int32_t out_shift,
  52. const int32_t out_activation_min,
  53. const int32_t out_activation_max,
  54. const int32_t block_size)
  55. {
  56. (void)input_1_offset;
  57. (void)input_2_offset;
  58. (void)out_offset;
  59. int32_t input_1;
  60. int32_t input_2;
  61. int32_t mul_res;
  62. int32_t two_halfword_1, two_halfword_2;
  63. int16_t mul_1, mul_2;
  64. int32_t loop_count = block_size / 2;
  65. while (loop_count > 0)
  66. {
  67. two_halfword_1 = arm_nn_read_q15x2_ia(&input_1_vect);
  68. two_halfword_2 = arm_nn_read_q15x2_ia(&input_2_vect);
  69. input_1 = (int16_t)(two_halfword_1 & 0xFFFF);
  70. input_2 = (int16_t)(two_halfword_2 & 0xFFFF);
  71. mul_res = input_1 * input_2;
  72. mul_res = arm_nn_requantize(mul_res, out_mult, out_shift);
  73. mul_res = MAX(mul_res, out_activation_min);
  74. mul_res = MIN(mul_res, out_activation_max);
  75. mul_1 = (int16_t)mul_res;
  76. input_1 = (int16_t)(two_halfword_1 >> 16);
  77. input_2 = (int16_t)(two_halfword_2 >> 16);
  78. mul_res = input_1 * input_2;
  79. mul_res = arm_nn_requantize(mul_res, out_mult, out_shift);
  80. mul_res = MAX(mul_res, out_activation_min);
  81. mul_res = MIN(mul_res, out_activation_max);
  82. mul_2 = (int16_t)mul_res;
  83. arm_nn_write_q15x2_ia(&output, PACK_Q15x2_32x1(mul_1, mul_2));
  84. loop_count--;
  85. }
  86. loop_count = block_size & 0x1;
  87. while (loop_count > 0)
  88. {
  89. /* C = A * B */
  90. input_1 = *input_1_vect++;
  91. input_2 = *input_2_vect++;
  92. mul_res = input_1 * input_2;
  93. mul_res = arm_nn_requantize(mul_res, out_mult, out_shift);
  94. mul_res = MAX(mul_res, out_activation_min);
  95. mul_res = MIN(mul_res, out_activation_max);
  96. *output++ = (int16_t)mul_res;
  97. /* Decrement loop counter */
  98. loop_count--;
  99. }
  100. return ARM_CMSIS_NN_SUCCESS;
  101. }
  102. /**
  103. * @} end of BasicMath group
  104. */