arm_convolve_s8.c 14 KB

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  1. /*
  2. * SPDX-FileCopyrightText: Copyright 2010-2024 Arm Limited and/or its affiliates <open-source-office@arm.com>
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Licensed under the Apache License, Version 2.0 (the License); you may
  7. * not use this file except in compliance with the License.
  8. * You may obtain a copy of the License at
  9. *
  10. * www.apache.org/licenses/LICENSE-2.0
  11. *
  12. * Unless required by applicable law or agreed to in writing, software
  13. * distributed under the License is distributed on an AS IS BASIS, WITHOUT
  14. * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  15. * See the License for the specific language governing permissions and
  16. * limitations under the License.
  17. */
  18. /* ----------------------------------------------------------------------
  19. * Project: CMSIS NN Library
  20. * Title: arm_convolve_s8.c
  21. * Description: s8 version of convolution using symmetric quantization.
  22. *
  23. * $Date: 27 February 2024
  24. * $Revision: V.3.7.0
  25. *
  26. * Target : Arm(R) M-Profile Architecture
  27. *
  28. * -------------------------------------------------------------------- */
  29. #include "arm_nnfunctions.h"
  30. #include "arm_nnsupportfunctions.h"
  31. /**
  32. * @ingroup Public
  33. */
  34. /**
  35. * @addtogroup NNConv
  36. * @{
  37. */
  38. /*
  39. * Basic s8 convolution function.
  40. *
  41. * Refer header file for details. Optimal use case for the DSP/MVE implementation is when input and output channels
  42. * are multiples of 4 or atleast greater than 4.
  43. *
  44. */
  45. arm_cmsis_nn_status arm_convolve_s8(const cmsis_nn_context *ctx,
  46. const cmsis_nn_conv_params *conv_params,
  47. const cmsis_nn_per_channel_quant_params *quant_params,
  48. const cmsis_nn_dims *input_dims,
  49. const int8_t *input_data,
  50. const cmsis_nn_dims *filter_dims,
  51. const int8_t *filter_data,
  52. const cmsis_nn_dims *bias_dims,
  53. const int32_t *bias_data,
  54. const cmsis_nn_dims *output_dims,
  55. int8_t *output_data)
  56. {
  57. (void)bias_dims;
  58. if (ctx->buf == NULL)
  59. {
  60. return ARM_CMSIS_NN_ARG_ERROR;
  61. }
  62. int16_t *buffer_a = (int16_t *)ctx->buf;
  63. const int32_t input_batches = input_dims->n;
  64. const uint16_t input_x = input_dims->w;
  65. const uint16_t input_y = input_dims->h;
  66. const uint16_t input_ch = input_dims->c;
  67. const uint16_t kernel_x = filter_dims->w;
  68. const uint16_t kernel_y = filter_dims->h;
  69. const uint16_t kernel_ch = filter_dims->c;
  70. const uint16_t output_x = output_dims->w;
  71. const uint16_t output_y = output_dims->h;
  72. const uint16_t output_ch = output_dims->c;
  73. const uint16_t pad_x = conv_params->padding.w;
  74. const uint16_t pad_y = conv_params->padding.h;
  75. const uint16_t stride_x = conv_params->stride.w;
  76. const uint16_t stride_y = conv_params->stride.h;
  77. const int32_t dilation_x = conv_params->dilation.w;
  78. const int32_t dilation_y = conv_params->dilation.h;
  79. const int32_t out_offset = conv_params->output_offset;
  80. const int32_t out_activation_min = conv_params->activation.min;
  81. const int32_t out_activation_max = conv_params->activation.max;
  82. const int32_t input_offset = conv_params->input_offset;
  83. const int32_t groups = input_ch / kernel_ch;
  84. const int32_t rhs_cols = kernel_x * kernel_y * kernel_ch;
  85. const int32_t output_ch_per_group = output_ch / groups;
  86. int32_t *output_mult = quant_params->multiplier;
  87. int32_t *output_shift = quant_params->shift;
  88. if (input_ch % groups != 0 || output_ch % groups != 0)
  89. {
  90. return ARM_CMSIS_NN_ARG_ERROR;
  91. }
  92. const int32_t remainder = rhs_cols % 4;
  93. const int32_t aligned_rhs_cols = remainder != 0 ? rhs_cols + 4 - remainder : rhs_cols;
  94. for (int i_batch = 0; i_batch < input_batches; i_batch++)
  95. {
  96. #if defined(ARM_MATH_MVEI)
  97. const int32_t aligned_rhs_cols_offset = aligned_rhs_cols - rhs_cols;
  98. /* Generate up to four columns from the input tensor a GEMM computation */
  99. int8_t *im2col_buf = (int8_t *)buffer_a;
  100. #else
  101. /* Use as a ping-pong buffer for unordered elements */
  102. int8_t *im2col_buf = (int8_t *)buffer_a + aligned_rhs_cols * 2;
  103. int16_t *im2col_buf_start_s16 = buffer_a;
  104. #endif
  105. int32_t lhs_rows = 0;
  106. const int8_t *filter_data_ptr = &filter_data[0];
  107. const int32_t *bias_data_ptr = &bias_data[0];
  108. const int32_t *output_mult_ptr = &output_mult[0];
  109. const int32_t *output_shift_ptr = &output_shift[0];
  110. /* This part implements the im2col function */
  111. for (int32_t i_group = 0; i_group < groups; i_group++)
  112. {
  113. int8_t *out = output_data + i_group * output_ch_per_group;
  114. for (int i_out_y = 0; i_out_y < output_y; i_out_y++)
  115. {
  116. for (int i_out_x = 0; i_out_x < output_x; i_out_x++)
  117. {
  118. const int32_t base_idx_x = stride_x * i_out_x - pad_x;
  119. const int32_t base_idx_y = stride_y * i_out_y - pad_y;
  120. for (int32_t i_ker_y = 0; i_ker_y < kernel_y; i_ker_y++)
  121. {
  122. for (int32_t i_ker_x = 0; i_ker_x < kernel_x; i_ker_x++)
  123. {
  124. const int32_t k_y = base_idx_y + dilation_y * i_ker_y;
  125. const int32_t k_x = base_idx_x + dilation_x * i_ker_x;
  126. if (k_y < 0 || k_y >= input_y || k_x < 0 || k_x >= input_x)
  127. {
  128. arm_memset_s8(im2col_buf, (int8_t)-input_offset, sizeof(int8_t) * kernel_ch);
  129. }
  130. else
  131. {
  132. arm_memcpy_s8(im2col_buf,
  133. input_data + (k_y * input_x + k_x) * input_ch + i_group * kernel_ch,
  134. sizeof(int8_t) * kernel_ch);
  135. }
  136. im2col_buf += kernel_ch;
  137. }
  138. }
  139. lhs_rows++;
  140. #if defined(ARM_MATH_MVEI)
  141. im2col_buf += aligned_rhs_cols_offset;
  142. /* Computation is filed for every 4 columns */
  143. if (lhs_rows == 4)
  144. {
  145. arm_nn_mat_mult_nt_t_s8((int8_t *)buffer_a,
  146. filter_data_ptr,
  147. bias_data_ptr,
  148. out,
  149. output_mult_ptr,
  150. output_shift_ptr,
  151. lhs_rows,
  152. output_ch_per_group,
  153. rhs_cols,
  154. input_offset,
  155. out_offset,
  156. out_activation_min,
  157. out_activation_max,
  158. output_ch,
  159. aligned_rhs_cols);
  160. out += lhs_rows * output_ch;
  161. lhs_rows = 0;
  162. im2col_buf = (int8_t *)buffer_a;
  163. }
  164. #else
  165. #if defined(ARM_MATH_DSP)
  166. /* Copy one column with input offset and no ordering */
  167. arm_s8_to_s16_unordered_with_offset(
  168. im2col_buf - rhs_cols, im2col_buf_start_s16, rhs_cols, (int16_t)input_offset);
  169. #else
  170. arm_q7_to_q15_with_offset(
  171. im2col_buf - rhs_cols, im2col_buf_start_s16, rhs_cols, (int16_t)input_offset);
  172. #endif
  173. im2col_buf_start_s16 += aligned_rhs_cols;
  174. if (lhs_rows == 2)
  175. {
  176. if (groups > 1)
  177. {
  178. out = arm_nn_mat_mult_kernel_row_offset_s8_s16(filter_data_ptr,
  179. buffer_a,
  180. output_ch_per_group,
  181. output_shift_ptr,
  182. output_mult_ptr,
  183. out_offset,
  184. out_activation_min,
  185. out_activation_max,
  186. rhs_cols,
  187. aligned_rhs_cols,
  188. bias_data_ptr,
  189. output_ch,
  190. out);
  191. }
  192. else
  193. {
  194. out = arm_nn_mat_mult_kernel_s8_s16(filter_data_ptr,
  195. buffer_a,
  196. output_ch_per_group,
  197. output_shift_ptr,
  198. output_mult_ptr,
  199. out_offset,
  200. out_activation_min,
  201. out_activation_max,
  202. rhs_cols,
  203. aligned_rhs_cols,
  204. bias_data_ptr,
  205. out);
  206. }
  207. /* counter reset */
  208. im2col_buf_start_s16 = buffer_a;
  209. im2col_buf = (int8_t *)buffer_a + aligned_rhs_cols * 2;
  210. lhs_rows = 0;
  211. }
  212. #endif
  213. }
  214. }
  215. if (out == NULL)
  216. {
  217. return ARM_CMSIS_NN_NO_IMPL_ERROR;
  218. }
  219. /* Handle left over columns */
  220. if (lhs_rows != 0)
  221. {
  222. #if defined(ARM_MATH_MVEI)
  223. arm_nn_mat_mult_nt_t_s8((int8_t *)buffer_a,
  224. filter_data_ptr,
  225. bias_data_ptr,
  226. out,
  227. output_mult_ptr,
  228. output_shift_ptr,
  229. lhs_rows,
  230. output_ch_per_group,
  231. rhs_cols,
  232. input_offset,
  233. out_offset,
  234. out_activation_min,
  235. out_activation_max,
  236. output_ch,
  237. aligned_rhs_cols);
  238. out += lhs_rows * output_ch;
  239. lhs_rows = 0;
  240. im2col_buf = (int8_t *)buffer_a;
  241. #else // #if defined(ARM_MATH_MVEI)
  242. const int8_t *ker_a = filter_data_ptr;
  243. int i;
  244. for (i = 0; i < output_ch_per_group; i++)
  245. {
  246. /* Load the accumulator with bias first */
  247. int32_t sum = 0;
  248. if (bias_data_ptr)
  249. {
  250. sum = bias_data_ptr[i];
  251. }
  252. const int16_t *ip_as_col = buffer_a;
  253. #if defined(ARM_MATH_DSP)
  254. /* 4 multiply and accumulates are done in one loop. */
  255. uint16_t col_count = rhs_cols / 4;
  256. while (col_count)
  257. {
  258. int32_t ker_a1, ker_a2;
  259. int32_t ip_b1, ip_b2;
  260. ker_a = read_and_pad_reordered(ker_a, &ker_a1, &ker_a2);
  261. ip_b1 = arm_nn_read_q15x2_ia(&ip_as_col);
  262. sum = SMLAD(ker_a1, ip_b1, sum);
  263. ip_b2 = arm_nn_read_q15x2_ia(&ip_as_col);
  264. sum = SMLAD(ker_a2, ip_b2, sum);
  265. col_count--;
  266. }
  267. /* Handle left over mac */
  268. col_count = rhs_cols & 0x3;
  269. #else
  270. uint16_t col_count = rhs_cols;
  271. #endif
  272. while (col_count)
  273. {
  274. int8_t ker_a1 = *ker_a++;
  275. int16_t ip_b1 = *ip_as_col++;
  276. sum += ker_a1 * ip_b1;
  277. col_count--;
  278. }
  279. sum = arm_nn_requantize(sum, output_mult_ptr[i], output_shift_ptr[i]);
  280. sum += out_offset;
  281. sum = MAX(sum, out_activation_min);
  282. sum = MIN(sum, out_activation_max);
  283. *out++ = (int8_t)sum;
  284. }
  285. im2col_buf_start_s16 = buffer_a;
  286. im2col_buf = (int8_t *)buffer_a + aligned_rhs_cols * 2;
  287. lhs_rows = 0;
  288. #endif // #if defined(ARM_MATH_MVEI)
  289. }
  290. filter_data_ptr += output_ch_per_group * rhs_cols;
  291. bias_data_ptr += output_ch_per_group;
  292. output_mult_ptr += output_ch_per_group;
  293. output_shift_ptr += output_ch_per_group;
  294. }
  295. /* Advance to the next batch */
  296. input_data += (input_x * input_y * input_ch);
  297. output_data += (output_x * output_y * output_ch);
  298. }
  299. /* Return to application */
  300. return ARM_CMSIS_NN_SUCCESS;
  301. }
  302. /**
  303. * @} end of NNConv group
  304. */