arm_depthwise_conv_s8.c 16 KB

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  1. /*
  2. * SPDX-FileCopyrightText: Copyright 2010-2022 Arm Limited and/or its affiliates <open-source-office@arm.com>
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Licensed under the Apache License, Version 2.0 (the License); you may
  7. * not use this file except in compliance with the License.
  8. * You may obtain a copy of the License at
  9. *
  10. * www.apache.org/licenses/LICENSE-2.0
  11. *
  12. * Unless required by applicable law or agreed to in writing, software
  13. * distributed under the License is distributed on an AS IS BASIS, WITHOUT
  14. * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  15. * See the License for the specific language governing permissions and
  16. * limitations under the License.
  17. */
  18. /* ----------------------------------------------------------------------
  19. * Project: CMSIS NN Library
  20. * Title: arm_depthwise_conv_s8.c
  21. * Description: s8 version of depthwise convolution.
  22. *
  23. * $Date: 26 October 2022
  24. * $Revision: V.3.0.4
  25. *
  26. * Target Processor: Cortex-M CPUs
  27. *
  28. * -------------------------------------------------------------------- */
  29. #include "arm_nnfunctions.h"
  30. #include "arm_nnsupportfunctions.h"
  31. /**
  32. * @ingroup Public
  33. */
  34. /**
  35. * @addtogroup NNConv
  36. * @{
  37. */
  38. #if !defined(__ARMCC_VERSION)
  39. __attribute__((optimize("no-unroll-loops")))
  40. #endif
  41. static void
  42. depthwise_conv_s8_mult_4(const int8_t *input,
  43. const int32_t input_x,
  44. const int32_t input_y,
  45. const int32_t input_ch,
  46. const int8_t *kernel,
  47. const int32_t output_ch,
  48. const int32_t ch_mult,
  49. const int32_t kernel_x,
  50. const int32_t kernel_y,
  51. const int32_t pad_x,
  52. const int32_t pad_y,
  53. const int32_t stride_x,
  54. const int32_t stride_y,
  55. const int32_t *bias,
  56. int8_t *output,
  57. const int32_t *output_shift,
  58. const int32_t *output_mult,
  59. const int32_t output_x,
  60. const int32_t output_y,
  61. const int32_t output_offset,
  62. const int32_t input_offset,
  63. const int32_t output_activation_min,
  64. const int32_t output_activation_max)
  65. {
  66. const int32_t *bias_base = bias;
  67. const int32_t *mult_base = output_mult;
  68. const int32_t *shift_base = output_shift;
  69. const int8_t *kernel_base = kernel;
  70. for (int32_t in_h = -pad_y, out_h = 0; out_h < output_y; in_h += stride_y, ++out_h)
  71. {
  72. for (int32_t in_w = -pad_x, out_w = 0, ker_h_start = MAX(0, -in_h); out_w < output_x; in_w += stride_x, ++out_w)
  73. {
  74. bias = bias_base;
  75. output_mult = mult_base;
  76. output_shift = shift_base;
  77. for (int32_t in_ch = 0, out_ch = 0, ker_w_start = MAX(0, -in_w); out_ch < output_ch;
  78. ++in_ch, out_ch += ch_mult)
  79. {
  80. for (int mult_tile = 0; mult_tile < ch_mult; mult_tile += 4)
  81. {
  82. int32_t out_buff[4] = {0, 0, 0, 0};
  83. if (bias)
  84. {
  85. out_buff[0] = *bias++;
  86. out_buff[1] = *bias++;
  87. out_buff[2] = *bias++;
  88. out_buff[3] = *bias++;
  89. }
  90. for (int32_t ker_h = ker_h_start; ker_h < MIN(kernel_y, input_y - in_h); ++ker_h)
  91. {
  92. int32_t ker_idx = ker_h * (output_ch * kernel_x) + ker_w_start * output_ch + out_ch;
  93. kernel = kernel_base + mult_tile + ker_idx;
  94. int32_t in_idx = (in_h + ker_h) * (input_ch * input_x) + in_w * input_ch + in_ch;
  95. #if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
  96. #pragma clang loop unroll(disable)
  97. #endif
  98. for (int32_t ker_w = ker_w_start; ker_w < MIN(kernel_x, input_x - in_w);
  99. ++ker_w, kernel += output_ch)
  100. {
  101. int32_t in_val = input[in_idx + ker_w * input_ch] + input_offset;
  102. out_buff[0] += in_val * kernel[0];
  103. out_buff[1] += in_val * kernel[1];
  104. out_buff[2] += in_val * kernel[2];
  105. out_buff[3] += in_val * kernel[3];
  106. }
  107. }
  108. #if defined(ARM_MATH_MVEI)
  109. int32x4_t res = vldrwq_s32(out_buff);
  110. res = arm_requantize_mve_32x4(res, vldrwq_s32(output_mult), vldrwq_s32(output_shift));
  111. output_mult += 4;
  112. output_shift += 4;
  113. res = vaddq_n_s32(res, output_offset);
  114. res = vmaxq_s32(res, vdupq_n_s32(output_activation_min));
  115. res = vminq_s32(res, vdupq_n_s32(output_activation_max));
  116. vstrbq_s32(output, res);
  117. output += 4;
  118. #else
  119. out_buff[0] = arm_nn_requantize(out_buff[0], *output_mult++, *output_shift++);
  120. out_buff[1] = arm_nn_requantize(out_buff[1], *output_mult++, *output_shift++);
  121. out_buff[2] = arm_nn_requantize(out_buff[2], *output_mult++, *output_shift++);
  122. out_buff[3] = arm_nn_requantize(out_buff[3], *output_mult++, *output_shift++);
  123. out_buff[0] += output_offset;
  124. out_buff[1] += output_offset;
  125. out_buff[2] += output_offset;
  126. out_buff[3] += output_offset;
  127. out_buff[0] = MIN(MAX(out_buff[0], output_activation_min), output_activation_max);
  128. out_buff[1] = MIN(MAX(out_buff[1], output_activation_min), output_activation_max);
  129. out_buff[2] = MIN(MAX(out_buff[2], output_activation_min), output_activation_max);
  130. out_buff[3] = MIN(MAX(out_buff[3], output_activation_min), output_activation_max);
  131. *output++ = (int8_t)out_buff[0];
  132. *output++ = (int8_t)out_buff[1];
  133. *output++ = (int8_t)out_buff[2];
  134. *output++ = (int8_t)out_buff[3];
  135. #endif
  136. }
  137. }
  138. }
  139. }
  140. }
  141. static void depthwise_conv_s8_generic(const int8_t *input,
  142. const uint16_t input_batches,
  143. const uint16_t input_x,
  144. const uint16_t input_y,
  145. const uint16_t input_ch,
  146. const int8_t *kernel,
  147. const uint16_t output_ch,
  148. const uint16_t ch_mult,
  149. const uint16_t kernel_x,
  150. const uint16_t kernel_y,
  151. const uint16_t pad_x,
  152. const uint16_t pad_y,
  153. const uint16_t stride_x,
  154. const uint16_t stride_y,
  155. const int32_t *bias,
  156. int8_t *output,
  157. const int32_t *output_shift,
  158. const int32_t *output_mult,
  159. const uint16_t output_x,
  160. const uint16_t output_y,
  161. const int32_t output_offset,
  162. const int32_t input_offset,
  163. const int32_t output_activation_min,
  164. const int32_t output_activation_max,
  165. const uint16_t dilation_x,
  166. const uint16_t dilation_y)
  167. {
  168. (void)output_ch;
  169. int i_out = 0;
  170. int i_batch;
  171. for (i_batch = 0; i_batch < input_batches; i_batch++)
  172. {
  173. for (int i_out_y = 0; i_out_y < output_y; i_out_y++)
  174. {
  175. const int16_t base_idx_y = (i_out_y * stride_y) - pad_y;
  176. for (int i_out_x = 0; i_out_x < output_x; i_out_x++)
  177. {
  178. const int16_t base_idx_x = (i_out_x * stride_x) - pad_x;
  179. for (int i_input_ch = 0; i_input_ch < input_ch; i_input_ch++)
  180. {
  181. for (int i_ch_mult = 0; i_ch_mult < ch_mult; i_ch_mult++)
  182. {
  183. const int idx_out_ch = i_ch_mult + i_input_ch * ch_mult;
  184. int32_t acc_0 = 0;
  185. int ker_y_start;
  186. int ker_x_start;
  187. int ker_y_end;
  188. int ker_x_end;
  189. if (dilation_x > 1)
  190. {
  191. const int32_t start_x_max = (-base_idx_x + dilation_x - 1) / dilation_x;
  192. ker_x_start = MAX(0, start_x_max);
  193. const int32_t end_min_x = (input_x - base_idx_x + dilation_x - 1) / dilation_x;
  194. ker_x_end = MIN(kernel_x, end_min_x);
  195. }
  196. else
  197. {
  198. ker_x_start = MAX(0, -base_idx_x);
  199. ker_x_end = MIN(kernel_x, input_x - base_idx_x);
  200. }
  201. if (dilation_y > 1)
  202. {
  203. const int32_t start_y_max = (-base_idx_y + dilation_y - 1) / dilation_y;
  204. ker_y_start = MAX(0, start_y_max);
  205. const int32_t end_min_y = (input_y - base_idx_y + dilation_y - 1) / dilation_y;
  206. ker_y_end = MIN(kernel_y, end_min_y);
  207. }
  208. else
  209. {
  210. ker_y_start = MAX(0, -base_idx_y);
  211. ker_y_end = MIN(kernel_y, input_y - base_idx_y);
  212. }
  213. if (bias)
  214. {
  215. acc_0 = bias[idx_out_ch];
  216. }
  217. for (int i_ker_y = ker_y_start; i_ker_y < ker_y_end; i_ker_y++)
  218. {
  219. const int32_t idx_y = base_idx_y + dilation_y * i_ker_y;
  220. for (int i_ker_x = ker_x_start; i_ker_x < ker_x_end; i_ker_x++)
  221. {
  222. const int32_t idx_x = base_idx_x + dilation_x * i_ker_x;
  223. int32_t idx_0 = (idx_y * input_x + idx_x) * input_ch + i_input_ch;
  224. int32_t ker_idx_0 = (i_ker_y * kernel_x + i_ker_x) * (input_ch * ch_mult) + idx_out_ch;
  225. acc_0 += (input[idx_0] + input_offset) * kernel[ker_idx_0];
  226. }
  227. }
  228. /* Requantize and clamp output to provided range */
  229. acc_0 = arm_nn_requantize(acc_0, output_mult[idx_out_ch], output_shift[idx_out_ch]);
  230. acc_0 += output_offset;
  231. acc_0 = MAX(acc_0, output_activation_min);
  232. acc_0 = MIN(acc_0, output_activation_max);
  233. output[i_out++] = acc_0;
  234. }
  235. }
  236. }
  237. }
  238. /* Advance to the next batch */
  239. input += (input_x * input_y * input_ch);
  240. }
  241. }
  242. /*
  243. * Basic s8 depthwise convolution function.
  244. *
  245. * Refer header file for details.
  246. * Optimization using DSP extension is not available for the generic case where channel multiplier is > 1.
  247. *
  248. */
  249. arm_cmsis_nn_status arm_depthwise_conv_s8(const cmsis_nn_context *ctx,
  250. const cmsis_nn_dw_conv_params *dw_conv_params,
  251. const cmsis_nn_per_channel_quant_params *quant_params,
  252. const cmsis_nn_dims *input_dims,
  253. const int8_t *input,
  254. const cmsis_nn_dims *filter_dims,
  255. const int8_t *kernel,
  256. const cmsis_nn_dims *bias_dims,
  257. const int32_t *bias,
  258. const cmsis_nn_dims *output_dims,
  259. int8_t *output)
  260. {
  261. const uint16_t dilation_x = dw_conv_params->dilation.w;
  262. const uint16_t dilation_y = dw_conv_params->dilation.h;
  263. (void)bias_dims;
  264. (void)ctx;
  265. if (dw_conv_params->ch_mult % 4 == 0 && input_dims->n == 1 && dw_conv_params->dilation.w == 1 &&
  266. dw_conv_params->dilation.h == 1)
  267. {
  268. depthwise_conv_s8_mult_4(input,
  269. input_dims->w,
  270. input_dims->h,
  271. input_dims->c,
  272. kernel,
  273. output_dims->c,
  274. dw_conv_params->ch_mult,
  275. filter_dims->w,
  276. filter_dims->h,
  277. dw_conv_params->padding.w,
  278. dw_conv_params->padding.h,
  279. dw_conv_params->stride.w,
  280. dw_conv_params->stride.h,
  281. bias,
  282. output,
  283. quant_params->shift,
  284. quant_params->multiplier,
  285. output_dims->w,
  286. output_dims->h,
  287. dw_conv_params->output_offset,
  288. dw_conv_params->input_offset,
  289. dw_conv_params->activation.min,
  290. dw_conv_params->activation.max);
  291. }
  292. else
  293. {
  294. depthwise_conv_s8_generic(input,
  295. input_dims->n,
  296. input_dims->w,
  297. input_dims->h,
  298. input_dims->c,
  299. kernel,
  300. output_dims->c,
  301. dw_conv_params->ch_mult,
  302. filter_dims->w,
  303. filter_dims->h,
  304. dw_conv_params->padding.w,
  305. dw_conv_params->padding.h,
  306. dw_conv_params->stride.w,
  307. dw_conv_params->stride.h,
  308. bias,
  309. output,
  310. quant_params->shift,
  311. quant_params->multiplier,
  312. output_dims->w,
  313. output_dims->h,
  314. dw_conv_params->output_offset,
  315. dw_conv_params->input_offset,
  316. dw_conv_params->activation.min,
  317. dw_conv_params->activation.max,
  318. dilation_x,
  319. dilation_y);
  320. }
  321. /* Return to application */
  322. return ARM_CMSIS_NN_SUCCESS;
  323. }
  324. /**
  325. * @} end of NNConv group
  326. */