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@@ -162,6 +162,60 @@ typedef enum
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#define POSITION_VAL(VAL) (__CLZ(__RBIT(VAL)))
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+/* Use of CMSIS compiler intrinsics for register exclusive access */
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+/* Atomic 32-bit register access macro to set one or several bits */
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+#define ATOMIC_SET_BIT(REG, BIT) \
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+ do { \
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+ uint32_t val; \
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+ do { \
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+ val = __LDREXW((__IO uint32_t *)&(REG)) | (BIT); \
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+ } while ((__STREXW(val,(__IO uint32_t *)&(REG))) != 0U); \
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+ } while(0)
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+
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+/* Atomic 32-bit register access macro to clear one or several bits */
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+#define ATOMIC_CLEAR_BIT(REG, BIT) \
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+ do { \
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+ uint32_t val; \
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+ do { \
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+ val = __LDREXW((__IO uint32_t *)&(REG)) & ~(BIT); \
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+ } while ((__STREXW(val,(__IO uint32_t *)&(REG))) != 0U); \
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+ } while(0)
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+
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+/* Atomic 32-bit register access macro to clear and set one or several bits */
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+#define ATOMIC_MODIFY_REG(REG, CLEARMSK, SETMASK) \
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+ do { \
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+ uint32_t val; \
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+ do { \
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+ val = (__LDREXW((__IO uint32_t *)&(REG)) & ~(CLEARMSK)) | (SETMASK); \
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+ } while ((__STREXW(val,(__IO uint32_t *)&(REG))) != 0U); \
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+ } while(0)
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+
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+/* Atomic 16-bit register access macro to set one or several bits */
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+#define ATOMIC_SETH_BIT(REG, BIT) \
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+ do { \
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+ uint16_t val; \
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+ do { \
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+ val = __LDREXH((__IO uint16_t *)&(REG)) | (BIT); \
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+ } while ((__STREXH(val,(__IO uint16_t *)&(REG))) != 0U); \
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+ } while(0)
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+
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+/* Atomic 16-bit register access macro to clear one or several bits */
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+#define ATOMIC_CLEARH_BIT(REG, BIT) \
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+ do { \
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+ uint16_t val; \
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+ do { \
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+ val = __LDREXH((__IO uint16_t *)&(REG)) & ~(BIT); \
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+ } while ((__STREXH(val,(__IO uint16_t *)&(REG))) != 0U); \
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+ } while(0)
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+
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+/* Atomic 16-bit register access macro to clear and set one or several bits */
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+#define ATOMIC_MODIFYH_REG(REG, CLEARMSK, SETMASK) \
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+ do { \
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+ uint16_t val; \
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+ do { \
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+ val = (__LDREXH((__IO uint16_t *)&(REG)) & ~(CLEARMSK)) | (SETMASK); \
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+ } while ((__STREXH(val,(__IO uint16_t *)&(REG))) != 0U); \
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+ } while(0)
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/**
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* @}
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