Merge branch 'bugfix/fix_co-cpu_riscv_ulp_ld_for_esp32s2' into 'master'

bugfix: add .rodata section for riscv ulp for esp32s2

See merge request espressif/esp-idf!13109

components/ulp/ld/esp32s2.ulp.riscv.ld

@@ -16,6 +16,12 @@ SECTIONS
         *(.text*)
     } >ram
 
+    .rodata ALIGN(4):
+    {
+        *(.rodata)
+        *(.rodata*)
+    } > ram
+
     .data ALIGN(4):
     {
         *(.data)