mcpwm: fix h2 mcpwm legacy test

components/driver/.build-test-rules.yml

@@ -43,10 +43,6 @@ components/driver/test_apps/legacy_adc_driver:
 components/driver/test_apps/legacy_mcpwm_driver:
   disable:
     - if: SOC_MCPWM_SUPPORTED != 1
-  disable_test:
-    - if: IDF_TARGET in ["esp32h2"]
-      temporary: true
-      reason: default group resolution changed, IDF-6812
 
 components/driver/test_apps/legacy_pcnt_driver:
   disable:

components/driver/test_apps/legacy_mcpwm_driver/main/test_app_main.c

@@ -1,25 +1,18 @@
 /*
- * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
 
 #include "unity.h"
-#include "unity_test_runner.h"
+#include "unity_test_utils.h"
 #include "esp_heap_caps.h"
 
-#define TEST_MEMORY_LEAK_THRESHOLD (-300)
+#define TEST_MEMORY_LEAK_THRESHOLD (300)
 
 static size_t before_free_8bit;
 static size_t before_free_32bit;
 
-static void check_leak(size_t before_free, size_t after_free, const char *type)
-{
-    ssize_t delta = after_free - before_free;
-    printf("MALLOC_CAP_%s: Before %u bytes free, After %u bytes free (delta %d)\n", type, before_free, after_free, delta);
-    TEST_ASSERT_MESSAGE(delta >= TEST_MEMORY_LEAK_THRESHOLD, "memory leak");
-}
-
 void setUp(void)
 {
     before_free_8bit = heap_caps_get_free_size(MALLOC_CAP_8BIT);
@@ -30,8 +23,9 @@ void tearDown(void)
 {
     size_t after_free_8bit = heap_caps_get_free_size(MALLOC_CAP_8BIT);
     size_t after_free_32bit = heap_caps_get_free_size(MALLOC_CAP_32BIT);
-    check_leak(before_free_8bit, after_free_8bit, "8BIT");
-    check_leak(before_free_32bit, after_free_32bit, "32BIT");
+    printf("\n");
+    unity_utils_check_leak(before_free_8bit, after_free_8bit, "8BIT", TEST_MEMORY_LEAK_THRESHOLD);
+    unity_utils_check_leak(before_free_32bit, after_free_32bit, "32BIT", TEST_MEMORY_LEAK_THRESHOLD);
 }
 
 void app_main(void)

components/driver/test_apps/legacy_mcpwm_driver/main/test_legacy_mcpwm.c

@@ -17,6 +17,7 @@
 #include "driver/mcpwm.h"
 #include "driver/gpio.h"
 
+#if CONFIG_IDF_TARGET_ESP32
 #define TEST_PWMA_GPIO (2)
 #define TEST_PWMB_GPIO (4)
 #define TEST_FAULT_GPIO (21)
@@ -24,6 +25,15 @@
 #define TEST_SYNC_GPIO_1 (18)
 #define TEST_SYNC_GPIO_2 (19)
 #define TEST_CAP_GPIO (21)
+#else
+#define TEST_PWMA_GPIO (1)
+#define TEST_PWMB_GPIO (2)
+#define TEST_CAP_GPIO  (3)
+#define TEST_FAULT_GPIO  (3)
+#define TEST_SYNC_GPIO_0 (3)
+#define TEST_SYNC_GPIO_1 (4)
+#define TEST_SYNC_GPIO_2 (5)
+#endif  //CONFIG_IDF_TARGET_ESP32
 
 // MCPWM default resolution
 #if CONFIG_IDF_TARGET_ESP32H2
@@ -31,6 +41,7 @@
 #else
 #define MCPWM_TEST_GROUP_CLK_HZ (10 * 1000 * 1000)
 #endif
+
 #define MCPWM_TEST_TIMER_CLK_HZ (1 * 1000 * 1000)
 
 const static mcpwm_io_signals_t pwma[] = {MCPWM0A, MCPWM1A, MCPWM2A};
@@ -257,7 +268,7 @@ TEST_CASE("MCPWM deadtime test", "[mcpwm]")
 }
 
 // -------------------------------------------------------------------------------------
-
+#define TEST_CARRIER_FREQ    250000
 static void mcpwm_carrier_test(mcpwm_unit_t unit, mcpwm_timer_t timer, mcpwm_carrier_out_ivt_t invert_or_not,
                                uint8_t period, uint8_t duty, uint8_t os_width)
 {
@@ -275,10 +286,10 @@ static void mcpwm_carrier_test(mcpwm_unit_t unit, mcpwm_timer_t timer, mcpwm_car
     vTaskDelay(pdMS_TO_TICKS(100));
 
     pulse_number = pcnt_get_pulse_number(pcnt_unit_a, 10);
-    TEST_ASSERT_INT_WITHIN(50, 2500, pulse_number);
+    TEST_ASSERT_INT_WITHIN(50, (TEST_CARRIER_FREQ / 100), pulse_number);
     usleep(10000);
     pulse_number = pcnt_get_pulse_number(pcnt_unit_b, 10);
-    TEST_ASSERT_INT_WITHIN(50, 2500, pulse_number);
+    TEST_ASSERT_INT_WITHIN(50, (TEST_CARRIER_FREQ / 100), pulse_number);
 
     TEST_ESP_OK(mcpwm_carrier_disable(unit, timer));
     TEST_ESP_OK(mcpwm_stop(unit, timer));
@@ -290,8 +301,9 @@ TEST_CASE("MCPWM carrier test", "[mcpwm]")
     for (int i = 0; i < SOC_MCPWM_GROUPS; i++) {
         for (int j = 0; j < SOC_MCPWM_TIMERS_PER_GROUP; j++) {
             // carrier should be 10MHz/8/(4+1) = 250KHz, (10MHz is the group resolution, it's fixed in the driver), carrier duty cycle is 4/8 = 50%
-            mcpwm_carrier_test(i, j, MCPWM_CARRIER_OUT_IVT_DIS, 4, 4, 3);
-            mcpwm_carrier_test(i, j, MCPWM_CARRIER_OUT_IVT_EN, 4, 4, 3);
+            // (MCPWM_TEST_GROUP_CLK_HZ/8/TEST_CARRIER_FREQ - 1) should be a integer
+            mcpwm_carrier_test(i, j, MCPWM_CARRIER_OUT_IVT_DIS, (MCPWM_TEST_GROUP_CLK_HZ / 8 / TEST_CARRIER_FREQ - 1), 4, 3);
+            mcpwm_carrier_test(i, j, MCPWM_CARRIER_OUT_IVT_EN, (MCPWM_TEST_GROUP_CLK_HZ / 8 / TEST_CARRIER_FREQ - 1), 4, 3);
         }
     }
 }

components/driver/test_apps/legacy_mcpwm_driver/pytest_legacy_mcpwm.py

@@ -8,7 +8,7 @@ from pytest_embedded import Dut
 @pytest.mark.esp32
 @pytest.mark.esp32s3
 @pytest.mark.esp32c6
-# @pytest.mark.esp32h2  IDF-6812
+@pytest.mark.esp32h2
 @pytest.mark.generic
 @pytest.mark.parametrize(
     'config',