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@@ -0,0 +1,58 @@
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+/*
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+ * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
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+ *
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+ * SPDX-License-Identifier: Apache-2.0
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+ */
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+
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+#pragma once
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+
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+#include <stdbool.h>
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+#include "hal/misc.h"
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+#include "hal/assert.h"
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+#include "soc/gpio_ext_struct.h"
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+
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+#ifdef __cplusplus
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+extern "C" {
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+#endif
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+
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+/**
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+ * @brief Set Sigma-delta enable
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+ *
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+ * @param hw Peripheral SIGMADELTA hardware instance address.
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+ * @param en Sigma-delta enable value
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+ */
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+static inline void sdm_ll_enable_clock(gpio_sd_dev_t *hw, bool en)
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+{
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+ hw->misc.function_clk_en = en;
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+}
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+
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+/**
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+ * @brief Set Sigma-delta channel duty.
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+ *
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+ * @param hw Peripheral SIGMADELTA hardware instance address.
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+ * @param channel Sigma-delta channel number
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+ * @param duty Sigma-delta duty of one channel, the value ranges from -128 to 127, recommended range is -90 ~ 90.
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+ * The waveform is more like a random one in this range.
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+ */
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+__attribute__((always_inline))
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+static inline void sdm_ll_set_duty(gpio_sd_dev_t *hw, int channel, int8_t duty)
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+{
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+ HAL_FORCE_MODIFY_U32_REG_FIELD(hw->channel[channel], duty, (uint32_t)duty);
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+}
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+
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+/**
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+ * @brief Set Sigma-delta channel's clock pre-scale value.
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+ *
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+ * @param hw Peripheral SIGMADELTA hardware instance address.
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+ * @param channel Sigma-delta channel number
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+ * @param prescale The divider of source clock, ranges from 1 to 256
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+ */
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+static inline void sdm_ll_set_prescale(gpio_sd_dev_t *hw, int channel, uint32_t prescale)
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+{
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+ HAL_ASSERT(prescale && prescale <= 256);
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+ HAL_FORCE_MODIFY_U32_REG_FIELD(hw->channel[channel], prescale, prescale - 1);
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+}
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+
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+#ifdef __cplusplus
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+}
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+#endif
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