gptimer: Fix esp32c6 gptimer clock source, no APB, instead, is PLL_F80M_CLK

components/driver/deprecated/timer_legacy.c

@@ -97,6 +97,11 @@ esp_err_t timer_get_counter_time_sec(timer_group_t group_num, timer_idx_t timer_
     case TIMER_SRC_CLK_PLL_F40M:
         *time = (double)timer_val * div / (40 * 1000 * 1000);
         break;
+#endif
+#if SOC_TIMER_GROUP_SUPPORT_PLL_F80M
+    case TIMER_SRC_CLK_PLL_F80M:
+        *time = (double)timer_val * div / (80 * 1000 * 1000);
+        break;
 #endif
     default:
         ESP_RETURN_ON_FALSE(false, ESP_ERR_INVALID_ARG, TIMER_TAG, "invalid clock source");

components/driver/gptimer/gptimer.c

@@ -411,6 +411,18 @@ static esp_err_t gptimer_select_periph_clock(gptimer_t *timer, gptimer_clock_sou
 #endif
         break;
 #endif // SOC_TIMER_GROUP_SUPPORT_PLL_F40M
+#if SOC_TIMER_GROUP_SUPPORT_PLL_F80M
+    case GPTIMER_CLK_SRC_PLL_F80M:
+        counter_src_hz = 80 * 1000 * 1000;
+#if CONFIG_PM_ENABLE
+        sprintf(timer->pm_lock_name, "gptimer_%d_%d", timer->group->group_id, timer_id); // e.g. gptimer_0_0
+        // ESP32C6 PLL_F80M is available when SOC_ROOT_CLK switchs to XTAL
+        ret  = esp_pm_lock_create(ESP_PM_NO_LIGHT_SLEEP, 0, timer->pm_lock_name, &timer->pm_lock);
+        ESP_RETURN_ON_ERROR(ret, TAG, "create NO_LIGHT_SLEEP lock failed");
+        ESP_LOGD(TAG, "install NO_LIGHT_SLEEP lock for timer (%d,%d)", timer->group->group_id, timer_id);
+#endif
+        break;
+#endif // SOC_TIMER_GROUP_SUPPORT_PLL_F80M
 #if SOC_TIMER_GROUP_SUPPORT_AHB
     case GPTIMER_CLK_SRC_AHB:
         // TODO: decide which kind of PM lock we should use for such clock

components/hal/esp32c6/include/hal/timer_ll.h

@@ -65,7 +65,7 @@ static inline void timer_ll_set_clock_source(timg_dev_t *hw, uint32_t timer_num,
     case GPTIMER_CLK_SRC_XTAL:
         clk_id = 0;
         break;
-    case GPTIMER_CLK_SRC_APB:
+    case GPTIMER_CLK_SRC_PLL_F80M:
         clk_id = 1;
         break;
     default:

components/soc/esp32c6/include/soc/Kconfig.soc_caps.in

@@ -755,7 +755,7 @@ config SOC_TIMER_GROUP_SUPPORT_XTAL
     bool
     default y
 
-config SOC_TIMER_GROUP_SUPPORT_APB
+config SOC_TIMER_GROUP_SUPPORT_PLL_F80M
     bool
     default y
 

components/soc/esp32c6/include/soc/clk_tree_defs.h

@@ -149,24 +149,24 @@ typedef enum {
  * }
  * @endcode
  */
-#define SOC_GPTIMER_CLKS {SOC_MOD_CLK_APB, SOC_MOD_CLK_XTAL}
+#define SOC_GPTIMER_CLKS {SOC_MOD_CLK_PLL_F80M, SOC_MOD_CLK_XTAL}
 
 /**
  * @brief Type of GPTimer clock source
  */
 typedef enum {
-    GPTIMER_CLK_SRC_APB = SOC_MOD_CLK_APB,         /*!< Select APB as the source clock */
-    GPTIMER_CLK_SRC_XTAL = SOC_MOD_CLK_XTAL,       /*!< Select XTAL as the source clock */
-    GPTIMER_CLK_SRC_DEFAULT = SOC_MOD_CLK_APB,     /*!< Select APB as the default choice */
+    GPTIMER_CLK_SRC_PLL_F80M = SOC_MOD_CLK_PLL_F80M,   /*!< Select PLL_F80M as the source clock */
+    GPTIMER_CLK_SRC_XTAL = SOC_MOD_CLK_XTAL,           /*!< Select XTAL as the source clock */
+    GPTIMER_CLK_SRC_DEFAULT = SOC_MOD_CLK_PLL_F80M,    /*!< Select PLL_F80M as the default choice */
 } soc_periph_gptimer_clk_src_t;
 
 /**
  * @brief Type of Timer Group clock source, reserved for the legacy timer group driver
  */
 typedef enum {
-    TIMER_SRC_CLK_APB = SOC_MOD_CLK_APB,     /*!< Timer group clock source is APB */
-    TIMER_SRC_CLK_XTAL = SOC_MOD_CLK_XTAL,   /*!< Timer group clock source is XTAL */
-    TIMER_SRC_CLK_DEFAULT = SOC_MOD_CLK_APB, /*!< Timer group clock source default choice is APB */
+    TIMER_SRC_CLK_PLL_F80M = SOC_MOD_CLK_PLL_F80M,     /*!< Timer group clock source is PLL_F80M */
+    TIMER_SRC_CLK_XTAL = SOC_MOD_CLK_XTAL,             /*!< Timer group clock source is XTAL */
+    TIMER_SRC_CLK_DEFAULT = SOC_MOD_CLK_PLL_F80M,      /*!< Timer group clock source default choice is PLL_F80M */
 } soc_periph_tg_clk_src_legacy_t;
 
 //////////////////////////////////////////////////RMT///////////////////////////////////////////////////////////////////

components/soc/esp32c6/include/soc/soc_caps.h

@@ -363,7 +363,7 @@
 #define SOC_TIMER_GROUP_TIMERS_PER_GROUP  (1U)
 #define SOC_TIMER_GROUP_COUNTER_BIT_WIDTH (54)
 #define SOC_TIMER_GROUP_SUPPORT_XTAL      (1)
-#define SOC_TIMER_GROUP_SUPPORT_APB       (1)
+#define SOC_TIMER_GROUP_SUPPORT_PLL_F80M  (1)
 #define SOC_TIMER_GROUP_TOTAL_TIMERS      (2)
 #define SOC_TIMER_SUPPORT_ETM             (1)