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@@ -200,7 +200,7 @@ TEST_CASE("Test fast switching between PLL and XTAL", "[rtc_clk]")
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/* In CI environments, the 32kXTAL runners don't have 8MB psram for bank switching.
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So can only test one config or the other. */
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-#if !IDF_CI_BUILD || !CONFIG_SPIRAM_BANKSWITCH_ENABLE
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+#if !defined(CONFIG_IDF_CI_BUILD) || !CONFIG_SPIRAM_BANKSWITCH_ENABLE
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#define COUNT_TEST 3
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#define TIMEOUT_TEST_MS (5 + CONFIG_RTC_CLK_CAL_CYCLES / 16)
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@@ -345,7 +345,7 @@ TEST_CASE("Test starting 'External 32kHz XTAL' on the board without it.", "[rtc_
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start_freq(SOC_RTC_SLOW_CLK_SRC_RC_SLOW, 0);
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}
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-#endif // !IDF_CI_BUILD || !CONFIG_SPIRAM_BANKSWITCH_ENABLE
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+#endif // !defined(CONFIG_IDF_CI_BUILD) || !CONFIG_SPIRAM_BANKSWITCH_ENABLE
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#endif // !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32S3, ESP32C3)
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