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@@ -41,6 +41,8 @@
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#include "esp_flash_partitions.h"
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#include "cache_utils.h"
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#include "esp_flash.h"
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+#include "esp_attr.h"
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+
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/* bytes erased by SPIEraseBlock() ROM function */
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#define BLOCK_ERASE_SIZE 65536
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@@ -270,10 +272,10 @@ static IRAM_ATTR esp_rom_spiflash_result_t spi_flash_write_inner(uint32_t target
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uint32_t before_buf[ESP_ROM_SPIFLASH_BUFF_BYTE_READ_NUM / sizeof(uint32_t)];
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uint32_t after_buf[ESP_ROM_SPIFLASH_BUFF_BYTE_READ_NUM / sizeof(uint32_t)];
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+ uint32_t *expected_buf = before_buf;
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int32_t remaining = len;
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for(int i = 0; i < len; i += sizeof(before_buf)) {
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int i_w = i / sizeof(uint32_t); // index in words (i is an index in bytes)
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-
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int32_t read_len = MIN(sizeof(before_buf), remaining);
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// Read "before" contents from flash
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@@ -282,20 +284,22 @@ static IRAM_ATTR esp_rom_spiflash_result_t spi_flash_write_inner(uint32_t target
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break;
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}
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-#ifdef CONFIG_SPI_FLASH_WARN_SETTING_ZERO_TO_ONE
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for (int r = 0; r < read_len; r += sizeof(uint32_t)) {
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int r_w = r / sizeof(uint32_t); // index in words (r is index in bytes)
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uint32_t write = src_addr[i_w + r_w];
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uint32_t before = before_buf[r_w];
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+ uint32_t expected = write & before;
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+#ifdef CONFIG_SPI_FLASH_WARN_SETTING_ZERO_TO_ONE
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if ((before & write) != write) {
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spi_flash_guard_end();
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ESP_LOGW(TAG, "Write at offset 0x%x requests 0x%08x but will write 0x%08x -> 0x%08x",
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target + i + r, write, before, before & write);
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spi_flash_guard_start();
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}
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- }
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#endif
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+ expected_buf[r_w] = expected;
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+ }
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res = esp_rom_spiflash_write(target + i, &src_addr[i_w], read_len);
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if (res != ESP_ROM_SPIFLASH_RESULT_OK) {
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@@ -310,7 +314,7 @@ static IRAM_ATTR esp_rom_spiflash_result_t spi_flash_write_inner(uint32_t target
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for (int r = 0; r < read_len; r += sizeof(uint32_t)) {
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int r_w = r / sizeof(uint32_t); // index in words (r is index in bytes)
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- uint32_t expected = src_addr[i_w + r_w] & before_buf[r_w];
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+ uint32_t expected = expected_buf[r_w];
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uint32_t actual = after_buf[r_w];
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if (expected != actual) {
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#ifdef CONFIG_SPI_FLASH_LOG_FAILED_WRITE
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@@ -427,10 +431,63 @@ out:
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}
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#endif // CONFIG_SPI_FLASH_USE_LEGACY_IMPL
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+
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+static IRAM_ATTR esp_err_t spi_flash_write_encrypted_in_rows(size_t dest_addr, const uint8_t *src, size_t size)
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+{
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+ assert((dest_addr % 16) == 0);
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+ assert((size % 16) == 0);
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+
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+ /* esp_rom_spiflash_write_encrypted encrypts data in RAM as it writes,
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+ so copy to a temporary buffer - 32 bytes at a time.
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+
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+ Each call to esp_rom_spiflash_write_encrypted takes a 32 byte "row" of
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+ data to encrypt, and each row is two 16 byte AES blocks
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+ that share a key (as derived from flash address).
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+ */
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+
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+ esp_rom_spiflash_result_t rc = ESP_ROM_SPIFLASH_RESULT_OK;
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+ WORD_ALIGNED_ATTR uint8_t encrypt_buf[32];
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+ uint32_t row_size;
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+ for (size_t i = 0; i < size; i += row_size) {
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+ uint32_t row_addr = dest_addr + i;
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+
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+ if (i == 0 && (row_addr % 32) != 0) {
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+ /* writing to second block of a 32 byte row */
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+ row_size = 16;
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+ row_addr -= 16;
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+ /* copy to second block in buffer */
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+ memcpy(encrypt_buf + 16, src + i, 16);
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+ /* decrypt the first block from flash, will reencrypt to same bytes */
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+ spi_flash_read_encrypted(row_addr, encrypt_buf, 16);
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+ } else if (size - i == 16) {
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+ /* 16 bytes left, is first block of a 32 byte row */
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+ row_size = 16;
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+ /* copy to first block in buffer */
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+ memcpy(encrypt_buf, src + i, 16);
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+ /* decrypt the second block from flash, will reencrypt to same bytes */
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+ spi_flash_read_encrypted(row_addr + 16, encrypt_buf + 16, 16);
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+ } else {
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+ /* Writing a full 32 byte row (2 blocks) */
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+ row_size = 32;
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+ memcpy(encrypt_buf, src + i, 32);
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+ }
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+
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+ spi_flash_guard_start();
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+ rc = esp_rom_spiflash_write_encrypted(row_addr, (uint32_t *)encrypt_buf, 32);
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+ spi_flash_guard_end();
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+ if (rc != ESP_ROM_SPIFLASH_RESULT_OK) {
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+ break;
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+ }
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+ }
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+ bzero(encrypt_buf, sizeof(encrypt_buf));
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+ return spi_flash_translate_rc(rc);
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+}
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+
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+
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esp_err_t IRAM_ATTR spi_flash_write_encrypted(size_t dest_addr, const void *src, size_t size)
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{
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+ esp_err_t err = ESP_OK;
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CHECK_WRITE_ADDRESS(dest_addr, size);
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- const uint8_t *ssrc = (const uint8_t *)src;
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if ((dest_addr % 16) != 0) {
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return ESP_ERR_INVALID_ARG;
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}
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@@ -439,60 +496,84 @@ esp_err_t IRAM_ATTR spi_flash_write_encrypted(size_t dest_addr, const void *src,
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}
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COUNTER_START();
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- esp_rom_spiflash_result_t rc;
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- rc = spi_flash_unlock();
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- if (rc == ESP_ROM_SPIFLASH_RESULT_OK) {
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- /* esp_rom_spiflash_write_encrypted encrypts data in RAM as it writes,
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- so copy to a temporary buffer - 32 bytes at a time.
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-
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- Each call to esp_rom_spiflash_write_encrypted takes a 32 byte "row" of
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- data to encrypt, and each row is two 16 byte AES blocks
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- that share a key (as derived from flash address).
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- */
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- uint8_t encrypt_buf[32] __attribute__((aligned(4)));
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- uint32_t row_size;
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- for (size_t i = 0; i < size; i += row_size) {
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- uint32_t row_addr = dest_addr + i;
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- if (i == 0 && (row_addr % 32) != 0) {
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- /* writing to second block of a 32 byte row */
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- row_size = 16;
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- row_addr -= 16;
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- /* copy to second block in buffer */
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- memcpy(encrypt_buf + 16, ssrc + i, 16);
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- /* decrypt the first block from flash, will reencrypt to same bytes */
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- spi_flash_read_encrypted(row_addr, encrypt_buf, 16);
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- } else if (size - i == 16) {
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- /* 16 bytes left, is first block of a 32 byte row */
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- row_size = 16;
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- /* copy to first block in buffer */
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- memcpy(encrypt_buf, ssrc + i, 16);
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- /* decrypt the second block from flash, will reencrypt to same bytes */
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- spi_flash_read_encrypted(row_addr + 16, encrypt_buf + 16, 16);
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- } else {
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- /* Writing a full 32 byte row (2 blocks) */
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- row_size = 32;
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- memcpy(encrypt_buf, ssrc + i, 32);
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+ esp_rom_spiflash_result_t rc = spi_flash_unlock();
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+ err = spi_flash_translate_rc(rc);
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+ if (err != ESP_OK) {
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+ goto fail;
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+ }
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+
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+#ifndef CONFIG_SPI_FLASH_VERIFY_WRITE
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+ err = spi_flash_write_encrypted_in_rows(dest_addr, (const uint8_t*)src, size);
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+ COUNTER_ADD_BYTES(write, size);
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+ spi_flash_guard_start();
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+ spi_flash_check_and_flush_cache(dest_addr, size);
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+ spi_flash_guard_end();
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+#else
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+ const uint32_t* src_w = (const uint32_t*)src;
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+ uint32_t read_buf[ESP_ROM_SPIFLASH_BUFF_BYTE_READ_NUM / sizeof(uint32_t)];
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+ int32_t remaining = size;
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+ for(int i = 0; i < size; i += sizeof(read_buf)) {
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+ int i_w = i / sizeof(uint32_t); // index in words (i is an index in bytes)
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+ int32_t read_len = MIN(sizeof(read_buf), remaining);
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+
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+ // Read "before" contents from flash
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+ esp_err_t err = spi_flash_read(dest_addr + i, read_buf, read_len);
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+ if (err != ESP_OK) {
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+ break;
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+ }
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+
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+#ifdef CONFIG_SPI_FLASH_WARN_SETTING_ZERO_TO_ONE
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+ //The written data cannot be predicted, so warning is shown if any of the bits is not 1.
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+ for (int r = 0; r < read_len; r += sizeof(uint32_t)) {
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+ uint32_t before = read_buf[r / sizeof(uint32_t)];
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+ if (before != 0xFFFFFFFF) {
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+ ESP_LOGW(TAG, "Encrypted write at offset 0x%x but not erased (0x%08x)",
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+ dest_addr + i + r, before);
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}
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+ }
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+#endif
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- spi_flash_guard_start();
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- rc = esp_rom_spiflash_write_encrypted(row_addr, (uint32_t *)encrypt_buf, 32);
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- spi_flash_guard_end();
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- if (rc != ESP_ROM_SPIFLASH_RESULT_OK) {
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- break;
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+ err = spi_flash_write_encrypted_in_rows(dest_addr + i, src + i, read_len);
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+ if (err != ESP_OK) {
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+ break;
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+ }
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+ COUNTER_ADD_BYTES(write, size);
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+
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+ spi_flash_guard_start();
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+ spi_flash_check_and_flush_cache(dest_addr, size);
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+ spi_flash_guard_end();
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+
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+ err = spi_flash_read_encrypted(dest_addr + i, read_buf, read_len);
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+ if (err != ESP_OK) {
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+ break;
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+ }
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+
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+ for (int r = 0; r < read_len; r += sizeof(uint32_t)) {
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+ int r_w = r / sizeof(uint32_t); // index in words (r is index in bytes)
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+
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+ uint32_t expected = src_w[i_w + r_w];
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+ uint32_t actual = read_buf[r_w];
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+ if (expected != actual) {
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+#ifdef CONFIG_SPI_FLASH_LOG_FAILED_WRITE
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+ ESP_LOGE(TAG, "Bad write at offset 0x%x expected 0x%08x readback 0x%08x", dest_addr + i + r, expected, actual);
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+#endif
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+ err = ESP_FAIL;
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}
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}
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- bzero(encrypt_buf, sizeof(encrypt_buf));
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+ if (err != ESP_OK) {
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+ break;
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+ }
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+ remaining -= read_len;
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}
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- COUNTER_ADD_BYTES(write, size);
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- COUNTER_STOP(write);
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+#endif // CONFIG_SPI_FLASH_VERIFY_WRITE
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- spi_flash_guard_start();
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- spi_flash_check_and_flush_cache(dest_addr, size);
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- spi_flash_guard_end();
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+fail:
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- return spi_flash_translate_rc(rc);
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+ COUNTER_STOP(write);
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+ return err;
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}
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+
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#ifdef CONFIG_SPI_FLASH_USE_LEGACY_IMPL
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esp_err_t IRAM_ATTR spi_flash_read(size_t src, void *dstv, size_t size)
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{
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