light sleep: libphy optimization for esp32c3

components/esp_rom/esp32c3/ld/esp32c3.rom.ld

@@ -1838,7 +1838,7 @@ rom_pbus_workmode = 0x400019a0;
 rom_pbus_xpd_rx_off = 0x400019a4;
 rom_pbus_xpd_rx_on = 0x400019a8;
 rom_pbus_xpd_tx_off = 0x400019ac;
-rom_pbus_xpd_tx_on = 0x400019b0;
+/* rom_pbus_xpd_tx_on = 0x400019b0; */
 rom_phy_byte_to_word = 0x400019b4;
 rom_phy_disable_cca = 0x400019b8;
 rom_phy_enable_cca = 0x400019bc;
@@ -1855,7 +1855,7 @@ rom_set_loopback_gain = 0x400019e4;
 rom_set_noise_floor = 0x400019e8;
 rom_set_rxclk_en = 0x400019ec;
 rom_set_tx_dig_gain = 0x400019f0;
-rom_set_txcap_reg = 0x400019f4;
+/* rom_set_txcap_reg = 0x400019f4; */
 rom_set_txclk_en = 0x400019f8;
 rom_spur_cal = 0x400019fc;
 rom_spur_reg_write_one_tone = 0x40001a00;
@@ -1879,21 +1879,21 @@ rom_tx_paon_set = 0x40001a44;
 rom_i2cmst_reg_init = 0x40001a48;
 rom_iq_corr_enable = 0x40001a4c;
 rom_fe_reg_init = 0x40001a50;
-rom_agc_reg_init = 0x40001a54;
-rom_bb_reg_init = 0x40001a58;
+/* rom_agc_reg_init = 0x40001a54; */
+/* rom_bb_reg_init = 0x40001a58; */
 rom_mac_enable_bb = 0x40001a5c;
 rom_bb_wdg_cfg = 0x40001a60;
 rom_force_txon = 0x40001a64;
 rom_fe_txrx_reset = 0x40001a68;
 rom_set_rx_comp = 0x40001a6c;
-rom_set_pbus_reg = 0x40001a70;
+/* rom_set_pbus_reg = 0x40001a70; */
 rom_write_chan_freq = 0x40001a74;
-rom_phy_xpd_rf = 0x40001a78;
+/* rom_phy_xpd_rf = 0x40001a78; */
 rom_set_xpd_sar = 0x40001a7c;
 rom_write_dac_gain2 = 0x40001a80;
 rom_rtc_sar2_init = 0x40001a84;
 rom_get_target_power_offset = 0x40001a88;
-rom_write_txrate_power_offset = 0x40001a8c;
+/* rom_write_txrate_power_offset = 0x40001a8c; */
 rom_get_rate_fcc_index = 0x40001a90;
 rom_get_rate_target_power = 0x40001a94;
 rom_write_wifi_dig_gain = 0x40001a98;
@@ -1903,7 +1903,7 @@ rom_read_sar2_code = 0x40001aa4;
 rom_get_sar2_vol = 0x40001aa8;
 rom_get_pll_vol = 0x40001aac;
 rom_get_phy_target_power = 0x40001ab0;
-rom_temp_to_power = 0x40001ab4;
+/* rom_temp_to_power = 0x40001ab4; */
 rom_phy_track_pll_cap = 0x40001ab8;
 rom_phy_pwdet_always_en = 0x40001abc;
 rom_phy_pwdet_onetime_en = 0x40001ac0;
@@ -1920,13 +1920,13 @@ rom_i2c_paral_write_num = 0x40001ae8;
 rom_i2c_paral_write_mask = 0x40001aec;
 rom_bb_bss_cbw40_ana = 0x40001af0;
 rom_chan_to_freq = 0x40001af4;
-rom_open_i2c_xpd = 0x40001af8;
+/* rom_open_i2c_xpd = 0x40001af8; */
 rom_dac_rate_set = 0x40001afc;
-rom_tsens_read_init = 0x40001b00;
-rom_tsens_code_read = 0x40001b04;
+/* rom_tsens_read_init = 0x40001b00; */
+/* rom_tsens_code_read = 0x40001b04; */
 rom_tsens_index_to_dac = 0x40001b08;
 rom_tsens_index_to_offset = 0x40001b0c;
-rom_tsens_dac_cal = 0x40001b10;
+/* rom_tsens_dac_cal = 0x40001b10; */
 rom_code_to_temp = 0x40001b14;
 rom_write_pll_cap_mem = 0x40001b18;
 rom_pll_correct_dcap = 0x40001b1c;

components/esp_wifi/include/phy.h

@@ -73,6 +73,13 @@ void phy_wakeup_init(void);
  */
 void phy_close_rf(void);
 
+#if CONFIG_IDF_TARGET_ESP32C3
+/**
+ * @brief Disable PHY temperature sensor.
+ */
+void phy_xpd_tsens(void);
+#endif
+
 #if CONFIG_MAC_BB_PD
 /**
  * @brief Store and load baseband registers.

components/esp_wifi/lib

@@ -1 +1 @@
-Subproject commit 7a3e28bf73aa80977575980e1c47af087b6eb23b
+Subproject commit c5cf57a2d0d61fa18dc847a4d13cd678c43bc7f5

components/esp_wifi/src/phy_init.c

@@ -239,6 +239,10 @@ IRAM_ATTR void esp_phy_disable(void)
     if (s_phy_access_ref == 0) {
         // Disable PHY and RF.
         phy_close_rf();
+#if CONFIG_IDF_TARGET_ESP32C3
+        // Disable PHY temperature sensor
+        phy_xpd_tsens();
+#endif
 #if CONFIG_IDF_TARGET_ESP32
         // Update WiFi MAC time before disalbe WiFi/BT common peripheral clock
         phy_update_wifi_mac_time(true, esp_timer_get_time());