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@@ -20,6 +20,7 @@
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#include "esp_private/esp_int_wdt.h"
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#include "esp_private/systimer.h"
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#include "esp_private/periph_ctrl.h"
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+#include "esp_attr.h"
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#include "esp_heap_caps.h"
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#include "esp_system.h"
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#include "esp_task.h"
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@@ -598,6 +599,240 @@ const DRAM_ATTR uint32_t offset_uxCoreAffinityMask = offsetof(StaticTask_t, uxDu
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#endif // ( configUSE_CORE_AFFINITY == 1 && configNUM_CORES > 1 )
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const DRAM_ATTR uint32_t offset_cpsa = XT_CP_SIZE;
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+/**
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+ * @brief Align stack pointer in a downward growing stack
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+ *
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+ * This macro is used to round a stack pointer downwards to the nearest n-byte boundary, where n is a power of 2.
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+ * This macro is generally used when allocating aligned areas on a downward growing stack.
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+ */
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+#define STACKPTR_ALIGN_DOWN(n, ptr) ((ptr) & (~((n)-1)))
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+
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+#if XCHAL_CP_NUM > 0
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+/**
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+ * @brief Allocate and initialize coprocessor save area on the stack
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+ *
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+ * This function allocates the coprocessor save area on the stack (sized XT_CP_SIZE) which includes...
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+ * - Individual save areas for each coprocessor (size XT_CPx_SA, inclusive of each area's alignment)
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+ * - Coprocessor context switching flags (e.g., XT_CPENABLE, XT_CPSTORED, XT_CP_CS_ST, XT_CP_ASA).
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+ *
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+ * The coprocessor save area is aligned to a 16-byte boundary.
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+ * The coprocessor context switching flags are then initialized
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+ *
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+ * @param[in] uxStackPointer Current stack pointer address
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+ * @return Stack pointer that points to allocated and initialized the coprocessor save area
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+ */
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+FORCE_INLINE_ATTR UBaseType_t uxInitialiseStackCPSA(UBaseType_t uxStackPointer)
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+{
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+ /*
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+ HIGH ADDRESS
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+ |-------------------| XT_CP_SIZE
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+ | CPn SA | ^
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+ | ... | |
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+ | CP0 SA | |
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+ | ----------------- | | ---- XCHAL_TOTAL_SA_ALIGN aligned
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+ |-------------------| | 12 bytes
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+ | XT_CP_ASA | | ^
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+ | XT_CP_CS_ST | | |
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+ | XT_CPSTORED | | |
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+ | XT_CPENABLE | | |
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+ |-------------------| ---------------------- 16 byte aligned
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+ LOW ADDRESS
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+ */
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+
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+ // Allocate overall coprocessor save area, aligned down to 16 byte boundary
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+ uxStackPointer = STACKPTR_ALIGN_DOWN(16, uxStackPointer - XT_CP_SIZE);
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+ // Initialize the coprocessor context switching flags.
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+ uint32_t *p = (uint32_t *)uxStackPointer;
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+ p[0] = 0; // Clear XT_CPENABLE and XT_CPSTORED
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+ p[1] = 0; // Clear XT_CP_CS_ST
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+ // XT_CP_ASA points to the aligned start of the individual CP save areas (i.e., start of CP0 SA)
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+ p[2] = (uint32_t)ALIGNUP(XCHAL_TOTAL_SA_ALIGN, (uint32_t)uxStackPointer + 12);
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+ return uxStackPointer;
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+}
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+#endif /* XCHAL_CP_NUM > 0 */
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+
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+/**
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+ * @brief Allocate and initialize GCC TLS area
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+ *
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+ * This function allocates and initializes the area on the stack used to store GCC TLS (Thread Local Storage) variables.
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+ * - The area's size is derived from the TLS section's linker variables, and rounded up to a multiple of 16 bytes
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+ * - The allocated area is aligned to a 16-byte aligned address
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+ * - The TLS variables in the area are then initialized
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+ *
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+ * Each task access the TLS variables using the THREADPTR register plus an offset to obtain the address of the variable.
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+ * The value for the THREADPTR register is also calculated by this function, and that value should be use to initialize
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+ * the THREADPTR register.
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+ *
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+ * @param[in] uxStackPointer Current stack pointer address
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+ * @param[out] ret_threadptr_reg_init Calculated THREADPTR register initialization value
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+ * @return Stack pointer that points to the TLS area
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+ */
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+FORCE_INLINE_ATTR UBaseType_t uxInitialiseStackTLS(UBaseType_t uxStackPointer, uint32_t *ret_threadptr_reg_init)
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+{
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+ /*
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+ TLS layout at link-time, where 0xNNN is the offset that the linker calculates to a particular TLS variable.
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+
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+ LOW ADDRESS
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+ |---------------------------| Linker Symbols
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+ | Section | --------------
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+ | .flash.rodata |
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+ 0x0|---------------------------| <- _flash_rodata_start
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+ ^ | Other Data |
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+ | |---------------------------| <- _thread_local_start
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+ | | .tbss | ^
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+ V | | |
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+ 0xNNN | int example; | | tls_area_size
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+ | | |
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+ | .tdata | V
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+ |---------------------------| <- _thread_local_end
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+ | Other data |
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+ | ... |
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+ |---------------------------|
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+ HIGH ADDRESS
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+ */
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+ // Calculate the TLS area's size (rounded up to multiple of 16 bytes).
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+ extern int _thread_local_start, _thread_local_end, _flash_rodata_start, _flash_rodata_align;
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+ const uint32_t tls_area_size = ALIGNUP(16, (uint32_t)&_thread_local_end - (uint32_t)&_thread_local_start);
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+ // TODO: check that TLS area fits the stack
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+
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+ // Allocate space for the TLS area on the stack. The area must be allocated at a 16-byte aligned address
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+ uxStackPointer = STACKPTR_ALIGN_DOWN(16, uxStackPointer - (UBaseType_t)tls_area_size);
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+ // Initialize the TLS area with the initialization values of each TLS variable
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+ memcpy((void *)uxStackPointer, &_thread_local_start, tls_area_size);
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+
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+ /*
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+ Calculate the THREADPTR register's initialization value based on the link-time offset and the TLS area allocated on
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+ the stack.
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+
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+ HIGH ADDRESS
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+ |---------------------------|
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+ | .tdata (*) |
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+ ^ | int example; |
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+ | | |
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+ | | .tbss (*) |
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+ | |---------------------------| <- uxStackPointer (start of TLS area)
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+ 0xNNN | | | ^
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+ | | | |
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+ | ... | (_thread_local_start - _flash_rodata_start) + align_up(TCB_SIZE, tls_section_alignment)
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+ | | | |
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+ | | | V
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+ V | | <- threadptr register's value
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+
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+ LOW ADDRESS
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+
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+ Note: Xtensa is slightly different compared to the RISC-V port as there is an implicit aligned TCB_SIZE added to
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+ the offset. (search for 'tpoff' in elf32-xtensa.c in BFD):
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+ - "offset = address - tls_section_vma + align_up(TCB_SIZE, tls_section_alignment)"
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+ - TCB_SIZE is hardcoded to 8
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+ */
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+ const uint32_t tls_section_align = (uint32_t)&_flash_rodata_align; // ALIGN value of .flash.rodata section
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+ #define TCB_SIZE 8
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+ const uint32_t base = ALIGNUP(tls_section_align, TCB_SIZE);
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+ *ret_threadptr_reg_init = (uint32_t)uxStackPointer - ((uint32_t)&_thread_local_start - (uint32_t)&_flash_rodata_start) - base;
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+
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+ return uxStackPointer;
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+}
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+
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+/**
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+ * @brief Initialize the task's starting interrupt stack frame
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+ *
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+ * This function initializes the task's starting interrupt stack frame. The dispatcher will use this stack frame in a
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+ * context restore routine. Therefore, the starting stack frame must be initialized as if the task was interrupted right
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+ * before its first instruction is called.
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+ *
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+ * - The stack frame is allocated to a 16-byte aligned address
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+ * - The THREADPTR register is saved in the extra storage area of the stack frame. This is also initialized
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+ *
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+ * @param[in] uxStackPointer Current stack pointer address
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+ * @param[in] pxCode Task function
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+ * @param[in] pvParameters Task function's parameter
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+ * @param[in] threadptr_reg_init THREADPTR register initialization value
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+ * @return Stack pointer that points to the stack frame
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+ */
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+FORCE_INLINE_ATTR UBaseType_t uxInitialiseStackFrame(UBaseType_t uxStackPointer, TaskFunction_t pxCode, void *pvParameters, uint32_t threadptr_reg_init)
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+{
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+ /*
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+ HIGH ADDRESS
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+ |---------------------------| ^ XT_STK_FRMSZ
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+ | | |
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+ | Stack Frame Extra Storage | |
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+ | | |
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+ | ------------------------- | | ^ XT_STK_EXTRA
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+ | | | |
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+ | Intr/Exc Stack Frame | | |
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+ | | V V
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+ | ------------------------- | ---------------------- 16 byte aligned
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+ LOW ADDRESS
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+ */
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+
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+ /*
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+ Allocate space for the task's starting interrupt stack frame.
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+ - The stack frame must be allocated to a 16-byte aligned address.
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+ - We use XT_STK_FRMSZ (instead of sizeof(XtExcFrame)) as it...
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+ - includes the size of the extra storage area
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+ - includes the size for a base save area before the stack frame
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+ - rounds up the total size to a multiple of 16
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+ */
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+ UBaseType_t uxStackPointerPrevious = uxStackPointer;
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+ uxStackPointer = STACKPTR_ALIGN_DOWN(16, uxStackPointer - XT_STK_FRMSZ);
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+
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+ // Clear the entire interrupt stack frame
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+ memset((void *)uxStackPointer, 0, (size_t)(uxStackPointerPrevious - uxStackPointer));
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+
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+ XtExcFrame *frame = (XtExcFrame *)uxStackPointer;
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+
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+ /*
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+ Initialize common registers
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+ */
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+ frame->a0 = 0; // Set the return address to 0 terminate GDB backtrace
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+ frame->a1 = uxStackPointer + XT_STK_FRMSZ; // Saved stack pointer should point to physical top of stack frame
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+ frame->exit = (UBaseType_t) _xt_user_exit; // User exception exit dispatcher
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+
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+ /*
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+ Initialize the task's entry point. This will differ depending on
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+ - Whether the task's entry point is the wrapper function or pxCode
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+ - Whether Windowed ABI is used (for windowed, we mimic the task entry point being call4'd )
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+ */
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+ #if CONFIG_FREERTOS_TASK_FUNCTION_WRAPPER
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+ frame->pc = (UBaseType_t) vPortTaskWrapper; // Task entry point is the wrapper function
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+ #ifdef __XTENSA_CALL0_ABI__
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+ frame->a2 = (UBaseType_t) pxCode; // Wrapper function's argument 0 (which is the task function)
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+ frame->a3 = (UBaseType_t) pvParameters; // Wrapper function's argument 1 (which is the task function's argument)
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+ #else // __XTENSA_CALL0_ABI__
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+ frame->a6 = (UBaseType_t) pxCode; // Wrapper function's argument 0 (which is the task function), passed as if we call4'd
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+ frame->a7 = (UBaseType_t) pvParameters; // Wrapper function's argument 1 (which is the task function's argument), passed as if we call4'd
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+ #endif // __XTENSA_CALL0_ABI__
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+ #else
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+ frame->pc = (UBaseType_t) pxCode; // Task entry point is the provided task function
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+ #ifdef __XTENSA_CALL0_ABI__
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+ frame->a2 = (UBaseType_t) pvParameters; // Task function's argument
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+ #else // __XTENSA_CALL0_ABI__
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+ frame->a6 = (UBaseType_t) pvParameters; // Task function's argument, passed as if we call4'd
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+ #endif // __XTENSA_CALL0_ABI__
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+ #endif
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+
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+ /*
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+ Set initial PS to int level 0, EXCM disabled ('rfe' will enable), user mode.
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+ For windowed ABI also set WOE and CALLINC (pretend task was 'call4'd)
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+ */
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+ #ifdef __XTENSA_CALL0_ABI__
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+ frame->ps = PS_UM | PS_EXCM;
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+ #else // __XTENSA_CALL0_ABI__
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+ frame->ps = PS_UM | PS_EXCM | PS_WOE | PS_CALLINC(1);
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+ #endif // __XTENSA_CALL0_ABI__
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+
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+ #ifdef XT_USE_SWPRI
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+ // Set the initial virtual priority mask value to all 1's.
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+ frame->vpri = 0xFFFFFFFF;
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+ #endif
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+
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+ // Initialize the threadptr register in the extra save area of the stack frame
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+ uint32_t *threadptr_reg = (uint32_t *)(uxStackPointer + XT_STK_EXTRA);
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+ *threadptr_reg = threadptr_reg_init;
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+
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+ return uxStackPointer;
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+}
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+
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#if ( portHAS_STACK_OVERFLOW_CHECKING == 1 )
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StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
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StackType_t * pxEndOfStack,
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@@ -609,108 +844,41 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
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void * pvParameters )
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#endif
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{
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- StackType_t *sp, *tp;
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- XtExcFrame *frame;
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-#if XCHAL_CP_NUM > 0
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- uint32_t *p;
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-#endif
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- uint32_t *threadptr;
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- void *task_thread_local_start;
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- extern int _thread_local_start, _thread_local_end, _flash_rodata_start, _flash_rodata_align;
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- // TODO: check that TLS area fits the stack
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- uint32_t thread_local_sz = (uint8_t *)&_thread_local_end - (uint8_t *)&_thread_local_start;
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-
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- thread_local_sz = ALIGNUP(0x10, thread_local_sz);
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-
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- /* Initialize task's stack so that we have the following structure at the top:
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-
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- ----LOW ADDRESSES ----------------------------------------HIGH ADDRESSES----------
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- task stack | interrupt stack frame | thread local vars | co-processor save area |
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- ----------------------------------------------------------------------------------
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- | |
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- SP pxTopOfStack
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-
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- All parts are aligned to 16 byte boundary. */
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- sp = (StackType_t *) (((UBaseType_t)pxTopOfStack - XT_CP_SIZE - thread_local_sz - XT_STK_FRMSZ) & ~0xf);
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-
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- /* Clear the entire frame (do not use memset() because we don't depend on C library) */
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- for (tp = sp; tp <= pxTopOfStack; ++tp) {
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- *tp = 0;
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- }
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-
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- frame = (XtExcFrame *) sp;
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-
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- /* Explicitly initialize certain saved registers */
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-#if CONFIG_FREERTOS_TASK_FUNCTION_WRAPPER
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- frame->pc = (UBaseType_t) vPortTaskWrapper; /* task wrapper */
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-#else
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- frame->pc = (UBaseType_t) pxCode; /* task entrypoint */
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-#endif
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- frame->a0 = 0; /* to terminate GDB backtrace */
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- frame->a1 = (UBaseType_t) sp + XT_STK_FRMSZ; /* physical top of stack frame */
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- frame->exit = (UBaseType_t) _xt_user_exit; /* user exception exit dispatcher */
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-
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- /* Set initial PS to int level 0, EXCM disabled ('rfe' will enable), user mode. */
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- /* Also set entry point argument parameter. */
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-#ifdef __XTENSA_CALL0_ABI__
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-#if CONFIG_FREERTOS_TASK_FUNCTION_WRAPPER
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- frame->a2 = (UBaseType_t) pxCode;
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- frame->a3 = (UBaseType_t) pvParameters;
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-#else
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- frame->a2 = (UBaseType_t) pvParameters;
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-#endif
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- frame->ps = PS_UM | PS_EXCM;
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-#else /* __XTENSA_CALL0_ABI__ */
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- /* + for windowed ABI also set WOE and CALLINC (pretend task was 'call4'd). */
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-#if CONFIG_FREERTOS_TASK_FUNCTION_WRAPPER
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- frame->a6 = (UBaseType_t) pxCode;
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- frame->a7 = (UBaseType_t) pvParameters;
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-#else
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- frame->a6 = (UBaseType_t) pvParameters;
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-#endif
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- frame->ps = PS_UM | PS_EXCM | PS_WOE | PS_CALLINC(1);
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-#endif /* __XTENSA_CALL0_ABI__ */
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-
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-#ifdef XT_USE_SWPRI
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- /* Set the initial virtual priority mask value to all 1's. */
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- frame->vpri = 0xFFFFFFFF;
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-#endif
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-
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- /* Init threadptr register and set up TLS run-time area.
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- * The diagram in port/riscv/port.c illustrates the calculations below.
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- */
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- task_thread_local_start = (void *)(((uint32_t)pxTopOfStack - XT_CP_SIZE - thread_local_sz) & ~0xf);
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- memcpy(task_thread_local_start, &_thread_local_start, thread_local_sz);
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- threadptr = (uint32_t *)(sp + XT_STK_EXTRA);
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- /* Calculate THREADPTR value.
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- * The generated code will add THREADPTR value to a constant value determined at link time,
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- * to get the address of the TLS variable.
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- * The constant value is calculated by the linker as follows
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- * (search for 'tpoff' in elf32-xtensa.c in BFD):
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- * offset = address - tls_section_vma + align_up(TCB_SIZE, tls_section_alignment)
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- * where TCB_SIZE is hardcoded to 8.
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- * Note this is slightly different compared to the RISC-V port, where offset = address - tls_section_vma.
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- */
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- const uint32_t tls_section_alignment = (uint32_t) &_flash_rodata_align; /* ALIGN value of .flash.rodata section */
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- const uint32_t tcb_size = 8; /* Unrelated to FreeRTOS, this is the constant from BFD */
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- const uint32_t base = (tcb_size + tls_section_alignment - 1) & (~(tls_section_alignment - 1));
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- *threadptr = (uint32_t)task_thread_local_start - ((uint32_t)&_thread_local_start - (uint32_t)&_flash_rodata_start) - base;
|
|
|
+ /*
|
|
|
+ HIGH ADDRESS
|
|
|
+ |---------------------------| <- pxTopOfStack on entry
|
|
|
+ | Coproc Save Area |
|
|
|
+ | ------------------------- |
|
|
|
+ | TLS Variables |
|
|
|
+ | ------------------------- | <- Start of useable stack
|
|
|
+ | Starting stack frame |
|
|
|
+ | ------------------------- | <- pxTopOfStack on return (which is the tasks current SP)
|
|
|
+ | | |
|
|
|
+ | | |
|
|
|
+ | V |
|
|
|
+ ----------------------------- <- Bottom of stack
|
|
|
+ LOW ADDRESS
|
|
|
+
|
|
|
+ - All stack areas are aligned to 16 byte boundary
|
|
|
+ - We use UBaseType_t for all of stack area initialization functions for more convenient pointer arithmetic
|
|
|
+ */
|
|
|
+
|
|
|
+ UBaseType_t uxStackPointer = (UBaseType_t)pxTopOfStack;
|
|
|
|
|
|
#if XCHAL_CP_NUM > 0
|
|
|
- /* Init the coprocessor save area (see xtensa_context.h) */
|
|
|
- /* No access to TCB here, so derive indirectly. Stack growth is top to bottom.
|
|
|
- * //p = (uint32_t *) xMPUSettings->coproc_area;
|
|
|
- */
|
|
|
- p = (uint32_t *)(((uint32_t) pxTopOfStack - XT_CP_SIZE) & ~0xf);
|
|
|
- configASSERT( ( uint32_t ) p >= frame->a1 );
|
|
|
- p[0] = 0;
|
|
|
- p[1] = 0;
|
|
|
- p[2] = (((uint32_t) p) + 12 + XCHAL_TOTAL_SA_ALIGN - 1) & -XCHAL_TOTAL_SA_ALIGN;
|
|
|
-#endif /* XCHAL_CP_NUM */
|
|
|
+ // Initialize the coprocessor save area
|
|
|
+ uxStackPointer = uxInitialiseStackCPSA(uxStackPointer);
|
|
|
+#endif /* XCHAL_CP_NUM > 0 */
|
|
|
|
|
|
- return sp;
|
|
|
-}
|
|
|
+ // Initialize the GCC TLS area
|
|
|
+ uint32_t threadptr_reg_init;
|
|
|
+ uxStackPointer = uxInitialiseStackTLS(uxStackPointer, &threadptr_reg_init);
|
|
|
|
|
|
+ // Initialize the starting interrupt stack frame
|
|
|
+ uxStackPointer = uxInitialiseStackFrame(uxStackPointer, pxCode, pvParameters, threadptr_reg_init);
|
|
|
+ // Return the task's current stack pointer address which should point to the starting interrupt stack frame
|
|
|
+ return (StackType_t *)uxStackPointer;
|
|
|
+}
|
|
|
// -------------------- Co-Processor -----------------------
|
|
|
#if ( XCHAL_CP_NUM > 0 && configUSE_CORE_AFFINITY == 1 && configNUM_CORES > 1 )
|
|
|
|