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@@ -60,6 +60,7 @@ static const char *SPI_TAG = "spi_slave";
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#endif
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typedef struct {
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+ int id;
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spi_slave_interface_config_t cfg;
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intr_handle_t intr;
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spi_dev_t *hw;
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@@ -80,6 +81,27 @@ static spi_slave_t *spihost[3];
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static void IRAM_ATTR spi_intr(void *arg);
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+static inline bool bus_is_iomux(spi_slave_t *host)
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+{
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+ return host->flags&SPICOMMON_BUSFLAG_NATIVE_PINS;
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+}
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+
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+static void freeze_cs(spi_slave_t *host)
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+{
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+ gpio_matrix_in(GPIO_FUNC_IN_HIGH, spi_periph_signal[host->id].spics_in, false);
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+}
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+
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+// Use this function instead of cs_initial to avoid overwrite the output config
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+// This is used in test by internal gpio matrix connections
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+static inline void restore_cs(spi_slave_t *host)
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+{
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+ if (bus_is_iomux(host)) {
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+ gpio_iomux_in(host->cfg.spics_io_num, spi_periph_signal[host->id].spics_in);
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+ } else {
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+ gpio_matrix_in(host->cfg.spics_io_num, spi_periph_signal[host->id].spics_in, false);
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+ }
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+}
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+
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esp_err_t spi_slave_initialize(spi_host_device_t host, const spi_bus_config_t *bus_config, const spi_slave_interface_config_t *slave_config, int dma_chan)
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{
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bool spi_chan_claimed, dma_chan_claimed;
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@@ -107,6 +129,7 @@ esp_err_t spi_slave_initialize(spi_host_device_t host, const spi_bus_config_t *b
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}
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memset(spihost[host], 0, sizeof(spi_slave_t));
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memcpy(&spihost[host]->cfg, slave_config, sizeof(spi_slave_interface_config_t));
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+ spihost[host]->id = host;
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err = spicommon_bus_initialize_io(host, bus_config, dma_chan, SPICOMMON_BUSFLAG_SLAVE|bus_config->flags, &spihost[host]->flags);
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if (err!=ESP_OK) {
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@@ -114,7 +137,10 @@ esp_err_t spi_slave_initialize(spi_host_device_t host, const spi_bus_config_t *b
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goto cleanup;
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}
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gpio_set_direction(slave_config->spics_io_num, GPIO_MODE_INPUT);
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- spicommon_cs_initialize(host, slave_config->spics_io_num, 0, !(spihost[host]->flags&SPICOMMON_BUSFLAG_NATIVE_PINS));
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+ spicommon_cs_initialize(host, slave_config->spics_io_num, 0, !bus_is_iomux(spihost[host]));
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+ // The slave DMA suffers from unexpected transactions. Forbid reading if DMA is enabled by disabling the CS line.
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+ if (dma_chan != 0) freeze_cs(spihost[host]);
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+
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spihost[host]->dma_chan = dma_chan;
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if (dma_chan != 0) {
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//See how many dma descriptors we need and allocate them
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@@ -357,11 +383,14 @@ static void SPI_SLAVE_ISR_ATTR spi_intr(void *arg)
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if (!host->hw->slave.trans_done) return;
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if (host->cur_trans) {
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+ // When DMA is enabled, the slave rx dma suffers from unexpected transactions. Forbid reading until transaction ready.
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+ if (host->dma_chan != 0) freeze_cs(host);
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+
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//when data of cur_trans->length are all sent, the slv_rdata_bit
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//will be the length sent-1 (i.e. cur_trans->length-1 ), otherwise
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//the length sent.
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host->cur_trans->trans_len = host->hw->slv_rd_bit.slv_rdata_bit;
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- if ( host->cur_trans->trans_len == host->cur_trans->length - 1 ) {
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+ if (host->cur_trans->trans_len == host->cur_trans->length - 1) {
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host->cur_trans->trans_len++;
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}
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@@ -465,6 +494,9 @@ static void SPI_SLAVE_ISR_ATTR spi_intr(void *arg)
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host->hw->user.usr_mosi = (trans->tx_buffer == NULL) ? 0 : 1;
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host->hw->user.usr_miso = (trans->rx_buffer == NULL) ? 0 : 1;
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+ //The slave rx dma get disturbed by unexpected transaction. Only connect the CS when slave is ready.
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+ if (host->dma_chan != 0) restore_cs(host);
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+
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//Kick off transfer
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host->hw->cmd.usr = 1;
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if (host->cfg.post_setup_cb) host->cfg.post_setup_cb(trans);
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