debug: esp32c3 uart1 wakeup

components/hal/esp32c3/include/hal/uart_ll.h

@@ -1,16 +1,8 @@
-// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
 // The LL layer for UART register operations.
 // Note that most of the register operations in this layer are non-atomic operations.

components/soc/esp32c3/include/soc/Kconfig.soc_caps.in

@@ -583,6 +583,10 @@ config SOC_UART_SUPPORT_XTAL_CLK
     bool
     default y
 
+config SOC_UART_SUPPORT_WAKEUP
+    bool
+    default y
+
 config SOC_UART_REQUIRE_CORE_RESET
     bool
     default y

examples/system/light_sleep/README.md

@@ -1,3 +1,5 @@
+| Supported Targets | ESP32-C3 |
+| ----------------- | -------- |
 # Light Sleep Example
 
 (See the README.md file in the upper level 'examples' directory for more information about examples.)

examples/system/light_sleep/main/light_sleep_example_main.c

@@ -1,11 +1,10 @@
-/* Light sleep example
+/*
+ * SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Unlicense OR CC0-1.0
+ */
 
-   This example code is in the Public Domain (or CC0 licensed, at your option.)
-
-   Unless required by applicable law or agreed to in writing, this
-   software is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
-   CONDITIONS OF ANY KIND, either express or implied.
-*/
+/* Light sleep example */
 
 #include <stdio.h>
 #include <string.h>
@@ -20,6 +19,9 @@
 #include "driver/gpio.h"
 #include "esp_timer.h"
 #include "soc/uart_struct.h"
+#include "soc/rtc.h"
+#include "esp_pm.h"
+#include "esp32c3/pm.h"
 
 #define TAG              "UART"
 #define TEST_UART_NUM    1
@@ -41,20 +43,43 @@ void light_sleep_wakeup_config(void)
     ESP_LOGI(TAG, "set_light_sleep_wakeup ok");
 }
 
+void light_sleep_setup(void)
+{
+    light_sleep_wakeup_config();
+
+    esp_pm_config_esp32c3_t pm_config = {
+        .max_freq_mhz = CONFIG_ESP32C3_DEFAULT_CPU_FREQ_MHZ,
+        .min_freq_mhz = (int) rtc_clk_xtal_freq_get(),
+        .light_sleep_enable = true
+    };
+    ESP_ERROR_CHECK(esp_pm_configure(&pm_config));
+}
+
+#define RD_BUF_SIZE 1024
+
 static void uart_wakeup_task(void *arg)
 {
     uart_event_t event;
-    esp_light_sleep_start();
+    // esp_light_sleep_start();
+
+    esp_pm_lock_handle_t lock = ((struct { esp_pm_lock_handle_t lock; } *)arg)->lock;
+    light_sleep_setup();
+
+    uint8_t* dtmp = (uint8_t*) malloc(RD_BUF_SIZE);
+
     for(;;) {
         //Waiting for UART event.
         if(xQueueReceive(uart0_queue, (void * )&event, (portTickType)portMAX_DELAY)) {
-            ESP_LOGI(TAG, "uart[%d] event:", TEST_UART_NUM);
+
+            esp_pm_lock_acquire(lock);
+
+            ESP_LOGI(TAG, "uar%d recved event:%d (wk:%d)", TEST_UART_NUM, event.type, UART_WAKEUP);
             switch(event.type) {
                 case UART_DATA:
                     ESP_LOGI(TAG, "[UART DATA]: %d", event.size);
-                    //uart_read_bytes(TEST_UART_NUM, dtmp, event.size, portMAX_DELAY);
-                    //ESP_LOGI(TAG, "[DATA EVT]:");
-                    //uart_write_bytes(TEST_UART_NUM, (const char*) dtmp, event.size);
+                    uart_read_bytes(TEST_UART_NUM, dtmp, event.size, portMAX_DELAY);
+                    ESP_LOGI(TAG, "[DATA EVT]:");
+                    uart_write_bytes(TEST_UART_NUM, (const char *)dtmp, event.size);
                     break;
                 //Event of HW FIFO overflow detected
                 case UART_FIFO_OVF:
@@ -92,6 +117,8 @@ static void uart_wakeup_task(void *arg)
                     ESP_LOGI(TAG, "uart event type: %d", event.type);
                     break;
             }
+            ESP_LOGI(TAG, "uart[%d] esp_pm_lock_release()", TEST_UART_NUM);
+            esp_pm_lock_release(lock);
         }
     }
     vTaskDelete(NULL);
@@ -112,5 +139,9 @@ void app_main(void)
     uart_param_config(TEST_UART_NUM, &uart_config);
     uart_set_pin(TEST_UART_NUM, 7, 6, UART_PIN_NO_CHANGE, UART_PIN_NO_CHANGE);
     light_sleep_wakeup_config();
-    xTaskCreate(uart_wakeup_task, "uart_wakeup_task", 2048, NULL, 12, NULL);
+
+    static esp_pm_lock_handle_t uart_event_lock;
+    ESP_ERROR_CHECK(esp_pm_lock_create(ESP_PM_APB_FREQ_MAX, 0, "uart_evt", &uart_event_lock));
+    struct { esp_pm_lock_handle_t lock; } args = { .lock = uart_event_lock };
+    xTaskCreate(uart_wakeup_task, "uart_wakeup_task", 2048, &args, 12, NULL);
 }

examples/system/light_sleep/sdkconfig.defaults

@@ -1 +1,2 @@
-CONFIG_ESP32_DEFAULT_CPU_FREQ_80=y
+CONFIG_PM_ENABLE=y
+CONFIG_FREERTOS_USE_TICKLESS_IDLE=y

tools/ci/check_copyright_ignore.txt

@@ -999,7 +999,6 @@ components/hal/esp32c3/include/hal/spi_flash_ll.h
 components/hal/esp32c3/include/hal/spimem_flash_ll.h
 components/hal/esp32c3/include/hal/systimer_ll.h
 components/hal/esp32c3/include/hal/twai_ll.h
-components/hal/esp32c3/include/hal/uart_ll.h
 components/hal/esp32c3/include/hal/uhci_ll.h
 components/hal/esp32c3/include/hal/usb_serial_jtag_ll.h
 components/hal/esp32c3/rtc_cntl_hal.c
@@ -2825,7 +2824,6 @@ examples/system/himem/main/himem_example_main.c
 examples/system/ipc/ipc_isr/example_test.py
 examples/system/ipc/ipc_isr/main/main.c
 examples/system/light_sleep/example_test.py
-examples/system/light_sleep/main/light_sleep_example_main.c
 examples/system/ota/advanced_https_ota/example_test.py
 examples/system/ota/advanced_https_ota/main/advanced_https_ota_example.c
 examples/system/ota/advanced_https_ota/main/ble_helper/ble_api.c