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@@ -318,22 +318,25 @@ esp_err_t esp_spiram_add_to_heapalloc(void)
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{
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size_t spiram_size = esp_spiram_get_size();
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uint32_t size_for_flash = (pages_for_flash << 16);
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+ intptr_t vaddr;
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ESP_EARLY_LOGI(TAG, "Adding pool of %dK of external SPI memory to heap allocator", (spiram_size - (pages_for_flash << 16))/1024);
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//Add entire external RAM region to heap allocator. Heap allocator knows the capabilities of this type of memory, so there's
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//no need to explicitly specify them.
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if (spiram_size <= DRAM0_DRAM1_DPORT_CACHE_SIZE) {
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/* cache size <= 10MB + 512KB, map DRAM0, DRAM1, DPORT bus */
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- return heap_caps_add_region((intptr_t)SPIRAM_SMALL_SIZE_MAP_VADDR + size_for_flash, (intptr_t)SPIRAM_SMALL_SIZE_MAP_VADDR + SPIRAM_SMALL_SIZE_MAP_SIZE -1);
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- } else {
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- Cache_Dbus_MMU_Set(MMU_ACCESS_SPIRAM, DPORT_CACHE_ADDRESS_LOW, SPIRAM_SMALL_SIZE_MAP_PADDR, 64, DRAM0_DRAM1_DPORT_CACHE_SIZE >> 16, 0);
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- if (size_for_flash <= SPIRAM_SIZE_EXC_DRAM0_DRAM1_DPORT) {
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- return heap_caps_add_region((intptr_t)DPORT_CACHE_ADDRESS_LOW, (intptr_t)DPORT_CACHE_ADDRESS_LOW + DRAM0_DRAM1_DPORT_CACHE_SIZE -1);
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- } else {
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- return heap_caps_add_region((intptr_t)DPORT_CACHE_ADDRESS_LOW + size_for_flash, (intptr_t)DPORT_CACHE_ADDRESS_LOW + DRAM0_DRAM1_DPORT_CACHE_SIZE -1);
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- }
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- return ESP_OK;
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+ vaddr = SPIRAM_SMALL_SIZE_MAP_VADDR;
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+ return heap_caps_add_region(vaddr + size_for_flash, vaddr + spiram_size - 1);
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}
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+
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+ vaddr = DPORT_CACHE_ADDRESS_LOW;
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+ Cache_Dbus_MMU_Set(MMU_ACCESS_SPIRAM, vaddr, SPIRAM_SMALL_SIZE_MAP_PADDR, 64, DRAM0_DRAM1_DPORT_CACHE_SIZE >> 16, 0);
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+ if (size_for_flash <= SPIRAM_SIZE_EXC_DRAM0_DRAM1_DPORT) {
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+ return heap_caps_add_region(vaddr, vaddr + DRAM0_DRAM1_DPORT_CACHE_SIZE - 1);
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+ }
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+
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+ // Largest size
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+ return heap_caps_add_region(vaddr + size_for_flash, vaddr + DRAM0_DRAM1_DPORT_CACHE_SIZE -1);
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}
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