feat(espcoredump): migrate the tests from unit-test-app

components/espcoredump/test/CMakeLists.txt

@@ -1,8 +0,0 @@
-if(TESTS_ALL EQUAL 1)
-    message("not linking coredump test from CI.")
-else()
-    idf_component_register(SRC_DIRS "."
-                        PRIV_INCLUDE_DIRS "."
-                        PRIV_REQUIRES cmock nvs_flash test_utils)
-    target_compile_options(${COMPONENT_LIB} PRIVATE "-Wno-format")
-endif()

components/espcoredump/test_apps/.build-test-rules.yml

@@ -0,0 +1,9 @@
+# Documentation: .gitlab/ci/README.md#manifest-file-to-control-the-buildtest-apps
+
+components/espcoredump/test_apps:
+  enable:
+    - if: IDF_TARGET in ["esp32", "esp32c3", "esp32c2"]
+      reason: Can test one chip per architecture, plus C2 which doesn't have RTC RAM
+  depends_components:
+    - espcoredump
+    - esp_system    # for linker scripts

components/espcoredump/test_apps/CMakeLists.txt

@@ -0,0 +1,9 @@
+cmake_minimum_required(VERSION 3.16)
+
+include($ENV{IDF_PATH}/tools/cmake/project.cmake)
+set(COMPONENTS main)
+list(PREPEND SDKCONFIG_DEFAULTS
+    "$ENV{IDF_PATH}/tools/test_apps/configs/sdkconfig.debug_helpers"
+    "sdkconfig.defaults")
+
+project(coredump_test)

components/espcoredump/test_apps/README.md

@@ -0,0 +1,25 @@
+| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 |
+| ----------------- | ----- | -------- | -------- |
+
+# Coredump unit tests
+
+The unit tests are currently run only on the chips listed above just to save CI resources. If you are adding some tests which need to run on a different chip, update [.build-test-rules.yml](../.build-test-rules.yml), adding the chip you need.
+
+When adding new test cases, check if the `depends_components` list in `.build-test-rules.yml` needs to be updated to include additional components. The test app will only be built and tested when these components are modified.
+
+See also the [panic test app](../../../tools/test_apps/system/panic) which serves as an integration test for espcoredump and is run on all supported chips.
+
+To build and run this test app, using esp32c3 target for example:
+
+```bash
+idf.py set-target esp32c3
+idf.py build flash monitor
+```
+
+To run tests using pytest:
+
+```bash
+idf.py set-target esp32c3
+idf.py build
+pytest --target=esp32c3
+```

components/espcoredump/test_apps/main/CMakeLists.txt

@@ -0,0 +1,5 @@
+idf_component_register(SRCS "test_coredump_main.c"
+                            "test_sections.c"
+                       INCLUDE_DIRS "."
+                       PRIV_REQUIRES unity espcoredump
+                       WHOLE_ARCHIVE)

components/espcoredump/test_apps/main/test_coredump_main.c

@@ -0,0 +1,48 @@
+/*
+ * SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "unity.h"
+#include "unity_test_runner.h"
+#include "esp_heap_caps.h"
+
+#define TEST_MEMORY_LEAK_THRESHOLD_DEFAULT 0
+static int leak_threshold = TEST_MEMORY_LEAK_THRESHOLD_DEFAULT;
+void set_leak_threshold(int threshold)
+{
+    leak_threshold = threshold;
+}
+
+static size_t before_free_8bit;
+static size_t before_free_32bit;
+
+static void check_leak(size_t before_free, size_t after_free, const char *type)
+{
+    ssize_t delta = after_free - before_free;
+    printf("MALLOC_CAP_%s: Before %u bytes free, After %u bytes free (delta %d)\n", type, before_free, after_free, delta);
+    TEST_ASSERT_MESSAGE(delta >= leak_threshold, "memory leak");
+}
+
+void setUp(void)
+{
+    before_free_8bit = heap_caps_get_free_size(MALLOC_CAP_8BIT);
+    before_free_32bit = heap_caps_get_free_size(MALLOC_CAP_32BIT);
+}
+
+void tearDown(void)
+{
+    size_t after_free_8bit = heap_caps_get_free_size(MALLOC_CAP_8BIT);
+    size_t after_free_32bit = heap_caps_get_free_size(MALLOC_CAP_32BIT);
+    check_leak(before_free_8bit, after_free_8bit, "8BIT");
+    check_leak(before_free_32bit, after_free_32bit, "32BIT");
+
+    leak_threshold = TEST_MEMORY_LEAK_THRESHOLD_DEFAULT;
+}
+
+void app_main(void)
+{
+    printf("Running espcoredump component tests\n");
+    unity_run_menu();
+}

components/espcoredump/test/test_sections.c → components/espcoredump/test_apps/main/test_sections.c

@@ -6,7 +6,6 @@
 #include <string.h>
 #include "unity.h"
 #include "esp_attr.h"
-#include "test_utils.h"
 
 /* Global variables that should be part of the coredump */
 COREDUMP_IRAM_DATA_ATTR uint32_t var_iram = 0x42;
@@ -28,10 +27,10 @@ extern int _coredump_rtc_fast_start;
 extern int _coredump_rtc_fast_end;
 #endif // SOC_RTC_MEM_SUPPORTED
 
-static inline bool is_addr_in_region(void* addr, uint8_t* region, int region_size)
+static inline bool is_addr_in_region(void *addr, uint8_t *region, int region_size)
 {
-    const void* start = (void*) region;
-    const void* end = (void*) (region + region_size);
+    const void *start = (void *) region;
+    const void *end = (void *) (region + region_size);
     return addr >= start && addr < end;
 }
 
@@ -44,24 +43,24 @@ TEST_CASE("test variables presence in core dump sections", "[espcoredump]")
     section_start = (uint32_t)&_coredump_dram_start;
     section_size = (uint8_t *)&_coredump_dram_end - (uint8_t *)&_coredump_dram_start;
     TEST_ASSERT(section_size > 0);
-    TEST_ASSERT(is_addr_in_region(&var_dram, (uint8_t*) section_start, section_size));
+    TEST_ASSERT(is_addr_in_region(&var_dram, (uint8_t *) section_start, section_size));
 #if IRAM_8BIT_ACCESSIBLE
     /* Check IRAM coredump section */
     section_start = (uint32_t)&_coredump_iram_start;
     section_size = (uint8_t *)&_coredump_iram_end - (uint8_t *)&_coredump_iram_start;
     TEST_ASSERT(section_size > 0);
-    TEST_ASSERT(is_addr_in_region(&var_iram, (uint8_t*) section_start, section_size));
+    TEST_ASSERT(is_addr_in_region(&var_iram, (uint8_t *) section_start, section_size));
 #endif
 #if SOC_RTC_MEM_SUPPORTED
     /* Check RTC coredump section */
     section_start = (uint32_t)&_coredump_rtc_start;
     section_size = (uint8_t *)&_coredump_rtc_end - (uint8_t *)&_coredump_rtc_start;
     TEST_ASSERT(section_size > 0);
-    TEST_ASSERT(is_addr_in_region(&var_rtc, (uint8_t*) section_start, section_size));
+    TEST_ASSERT(is_addr_in_region(&var_rtc, (uint8_t *) section_start, section_size));
     /* Check RTC Fast coredump section */
     section_start = (uint32_t)&_coredump_rtc_fast_start;
     section_size = (uint8_t *)&_coredump_rtc_fast_end - (uint8_t *)&_coredump_rtc_fast_start;
     TEST_ASSERT(section_size > 0);
-    TEST_ASSERT(is_addr_in_region(&var_rtcfast, (uint8_t*) section_start, section_size));
+    TEST_ASSERT(is_addr_in_region(&var_rtcfast, (uint8_t *) section_start, section_size));
 #endif // SOC_RTC_MEM_SUPPORTED
 }

components/espcoredump/test_apps/pytest_coredump.py

@@ -0,0 +1,13 @@
+# SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
+# SPDX-License-Identifier: CC0-1.0
+
+import pytest
+from pytest_embedded import Dut
+
+
+@pytest.mark.generic
+@pytest.mark.esp32
+@pytest.mark.esp32c3
+@pytest.mark.esp32c2
+def test_coredump(dut: Dut) -> None:
+    dut.run_all_single_board_cases()

components/espcoredump/test_apps/sdkconfig.defaults

@@ -0,0 +1 @@
+CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU0=n