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@@ -0,0 +1,392 @@
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+/*
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+ * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
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+ *
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+ * SPDX-License-Identifier: Apache-2.0
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+ */
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+
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+/*******************************************************************************
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+ * NOTICE
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+ * The ll is not public api, don't use in application code.
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+ * See readme.md in hal/include/hal/readme.md
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+ ******************************************************************************/
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+
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+#pragma once
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+
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+#include <stdlib.h>
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+#include "soc/rtc_periph.h"
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+#include "soc/pcr_struct.h"
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+#include "soc/rtc_io_struct.h"
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+#include "soc/lp_aon_struct.h"
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+#include "soc/pmu_struct.h"
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+#include "hal/misc.h"
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+#include "hal/gpio_types.h"
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+#include "soc/io_mux_reg.h"
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+
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+#ifdef __cplusplus
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+extern "C" {
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+#endif
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+
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+#define RTCIO_LL_PIN_FUNC 0
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+
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+#define RTCIO_LL_PIN_MASK_ALL ((1 << SOC_RTCIO_PIN_COUNT) - 1)
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+
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+typedef enum {
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+ RTCIO_FUNC_RTC = 0x0, /*!< The pin controlled by RTC module. */
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+ RTCIO_FUNC_DIGITAL = 0x1, /*!< The pin controlled by DIGITAL module. */
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+} rtcio_ll_func_t;
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+
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+typedef enum {
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+ RTCIO_WAKEUP_DISABLE = 0, /*!< Disable GPIO interrupt */
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+ RTCIO_WAKEUP_LOW_LEVEL = 0x4, /*!< GPIO interrupt type : input low level trigger */
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+ RTCIO_WAKEUP_HIGH_LEVEL = 0x5, /*!< GPIO interrupt type : input high level trigger */
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+} rtcio_ll_wake_type_t;
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+
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+typedef enum {
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+ RTCIO_OUTPUT_NORMAL = 0, /*!< RTCIO output mode is normal. */
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+ RTCIO_OUTPUT_OD = 0x1, /*!< RTCIO output mode is open-drain. */
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+} rtcio_ll_out_mode_t;
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+
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+/**
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+ * @brief Select the rtcio function.
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+ *
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+ * @note The RTC function must be selected before the pad analog function is enabled.
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+ * @note The clock gating 'PCR.iomux_conf.iomux_clk_en' is the gate of both 'lp_io' and 'etm_gpio'
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+ * And it's default to be turned on, so we don't need to operate this clock gate here additionally
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+ *
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+ * @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
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+ * @param func Select pin function.
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+ */
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+static inline void rtcio_ll_function_select(int rtcio_num, rtcio_ll_func_t func)
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+{
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+ if (func == RTCIO_FUNC_RTC) {
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+ // 0: GPIO connected to digital GPIO module. 1: GPIO connected to analog RTC module.
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+ uint32_t sel_mask = HAL_FORCE_READ_U32_REG_FIELD(LP_AON.gpio_mux, gpio_mux_sel);
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+ sel_mask |= BIT(rtcio_num);
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+ HAL_FORCE_MODIFY_U32_REG_FIELD(LP_AON.gpio_mux, gpio_mux_sel, sel_mask);
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+ //0:RTC FUNCTION 1,2,3:Reserved
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+ LP_IO.gpio[rtcio_num].mcu_sel = RTCIO_LL_PIN_FUNC;
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+ } else if (func == RTCIO_FUNC_DIGITAL) {
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+ // Clear the bit to use digital GPIO module
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+ uint32_t sel_mask = HAL_FORCE_READ_U32_REG_FIELD(LP_AON.gpio_mux, gpio_mux_sel);
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+ sel_mask &= ~BIT(rtcio_num);
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+ HAL_FORCE_MODIFY_U32_REG_FIELD(LP_AON.gpio_mux, gpio_mux_sel, sel_mask);
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+ }
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+}
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+
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+/**
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+ * Enable rtcio output.
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+ *
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+ * @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
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+ */
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+static inline void rtcio_ll_output_enable(int rtcio_num)
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+{
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+ HAL_FORCE_MODIFY_U32_REG_FIELD(LP_IO.out_enable_w1ts, enable_w1ts, BIT(rtcio_num));
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+}
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+
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+/**
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+ * Disable rtcio output.
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+ *
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+ * @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
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+ */
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+static inline void rtcio_ll_output_disable(int rtcio_num)
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+{
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+ HAL_FORCE_MODIFY_U32_REG_FIELD(LP_IO.out_enable_w1tc, enable_w1tc, BIT(rtcio_num));
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+}
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+
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+/**
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+ * Set RTCIO output level.
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+ *
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+ * @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
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+ * @param level 0: output low; ~0: output high.
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+ */
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+static inline void rtcio_ll_set_level(int rtcio_num, uint32_t level)
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+{
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+ if (level) {
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+ HAL_FORCE_MODIFY_U32_REG_FIELD(LP_IO.out_data_w1ts, out_data_w1ts, BIT(rtcio_num));
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+ } else {
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+ HAL_FORCE_MODIFY_U32_REG_FIELD(LP_IO.out_data_w1tc, out_data_w1tc, BIT(rtcio_num));
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+ }
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+}
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+
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+/**
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+ * Enable rtcio input.
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+ *
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+ * @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
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+ */
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+static inline void rtcio_ll_input_enable(int rtcio_num)
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+{
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+ LP_IO.gpio[rtcio_num].fun_ie = 1;
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+}
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+
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+/**
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+ * Disable rtcio input.
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+ *
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+ * @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
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+ */
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+static inline void rtcio_ll_input_disable(int rtcio_num)
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+{
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+ LP_IO.gpio[rtcio_num].fun_ie = 0;
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+}
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+
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+/**
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+ * Get RTCIO input level.
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+ *
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+ * @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
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+ * @return 0: input low; ~0: input high.
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+ */
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+static inline uint32_t rtcio_ll_get_level(int rtcio_num)
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+{
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+ return (uint32_t)(LP_IO.in.in_data_next >> rtcio_num) & 0x1;
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+}
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+
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+/**
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+ * @brief Set RTC GPIO pad drive capability
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+ *
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+ * @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
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+ * @param strength Drive capability of the pad. Range: 0 ~ 3.
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+ */
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+static inline void rtcio_ll_set_drive_capability(int rtcio_num, uint32_t strength)
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+{
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+ LP_IO.gpio[rtcio_num].fun_drv = strength;
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+}
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+
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+/**
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+ * @brief Get RTC GPIO pad drive capability.
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+ *
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+ * @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
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+ * @return Drive capability of the pad. Range: 0 ~ 3.
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+ */
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+static inline uint32_t rtcio_ll_get_drive_capability(int rtcio_num)
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+{
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+ return LP_IO.gpio[rtcio_num].fun_drv;
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+}
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+
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+/**
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+ * @brief Set RTC GPIO pad output mode.
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+ *
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+ * @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
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+ * @return mode Output mode.
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+ */
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+static inline void rtcio_ll_output_mode_set(int rtcio_num, rtcio_ll_out_mode_t mode)
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+{
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+ LP_IO.pin[rtcio_num].pad_driver = mode;
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+}
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+
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+/**
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+ * RTC GPIO pullup enable.
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+ *
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+ * @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
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+ */
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+static inline void rtcio_ll_pullup_enable(int rtcio_num)
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+{
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+ /* Enable internal weak pull-up */
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+ LP_IO.gpio[rtcio_num].fun_wpu = 1;
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+}
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+
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+/**
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+ * RTC GPIO pullup disable.
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+ *
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+ * @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
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+ */
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+static inline void rtcio_ll_pullup_disable(int rtcio_num)
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+{
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+ /* Disable internal weak pull-up */
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+ LP_IO.gpio[rtcio_num].fun_wpu = 0;
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+}
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+
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+/**
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+ * RTC GPIO pulldown enable.
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+ *
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+ * @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
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+ */
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+static inline void rtcio_ll_pulldown_enable(int rtcio_num)
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+{
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+ /* Enable internal weak pull-down */
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+ LP_IO.gpio[rtcio_num].fun_wpd = 1;
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+}
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+
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+/**
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+ * RTC GPIO pulldown disable.
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+ *
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+ * @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
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+ */
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+static inline void rtcio_ll_pulldown_disable(int rtcio_num)
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+{
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+ /* Enable internal weak pull-down */
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+ LP_IO.gpio[rtcio_num].fun_wpd = 0;
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+}
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+
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+/**
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+ * Enable force hold function for an RTC IO pad.
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+ *
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+ * Enabling HOLD function will cause the pad to lock current status, such as,
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+ * input/output enable, input/output value, function, drive strength values.
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+ * This function is useful when going into light or deep sleep mode to prevent
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+ * the pin configuration from changing.
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+ *
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+ * @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
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+ */
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+static inline void rtcio_ll_force_hold_enable(int rtcio_num)
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+{
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+ LP_AON.gpio_hold0.gpio_hold0 |= BIT(rtcio_num);
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+}
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+
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+/**
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+ * Disable hold function on an RTC IO pad
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+ *
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+ * @note If disable the pad hold, the status of pad maybe changed in sleep mode.
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+ * @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
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+ */
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+static inline void rtcio_ll_force_hold_disable(int rtcio_num)
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+{
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+ LP_AON.gpio_hold0.gpio_hold0 &= ~BIT(rtcio_num);
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+}
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+
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+/**
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+ * @brief Enable all LP IO pads hold function during Deep-sleep
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+ */
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+static inline void rtcio_ll_deep_sleep_hold_en_all(void)
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+{
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+ PMU.imm_pad_hold_all.tie_high_lp_pad_hold_all = 1;
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+}
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+
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+/**
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+ * @brief Disable all LP IO pads hold function during Deep-sleep
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+ */
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+static inline void rtcio_ll_deep_sleep_hold_dis_all(void)
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+{
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+ PMU.imm_pad_hold_all.tie_low_lp_pad_hold_all = 1;
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+}
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+
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+/**
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+ * Enable force hold function for all RTC IO pads
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+ *
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+ * Enabling HOLD function will cause the pad to lock current status, such as,
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+ * input/output enable, input/output value, function, drive strength values.
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+ * This function is useful when going into light or deep sleep mode to prevent
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+ * the pin configuration from changing.
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+ */
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+static inline void rtcio_ll_force_hold_all(void)
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+{
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+ // No such a 'hold_all' bit on C6, use bit hold instead
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+ LP_AON.gpio_hold0.gpio_hold0 |= RTCIO_LL_PIN_MASK_ALL;
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+}
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+
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+/**
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+ * Disable hold function fon all RTC IO pads
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+ *
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+ * @note If disable the pad hold, the status of pad maybe changed in sleep mode.
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+ */
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+static inline void rtcio_ll_force_unhold_all(void)
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+{
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+ // No such a 'hold_all' bit on C6, use bit hold instead
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+ LP_AON.gpio_hold0.gpio_hold0 &= ~RTCIO_LL_PIN_MASK_ALL;
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+}
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+
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+/**
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+ * Enable wakeup function and set wakeup type from light sleep or deep sleep for rtcio.
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+ *
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+ * @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
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+ * @param type Wakeup on high level or low level.
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+ */
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+static inline void rtcio_ll_wakeup_enable(int rtcio_num, rtcio_ll_wake_type_t type)
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+{
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+ LP_IO.pin[rtcio_num].wakeup_enable = 0x1;
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+ LP_IO.pin[rtcio_num].int_type = type;
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+}
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+
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+/**
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+ * Disable wakeup function from light sleep or deep sleep for rtcio.
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+ *
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+ * @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
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+ */
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+static inline void rtcio_ll_wakeup_disable(int rtcio_num)
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+{
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+ LP_IO.pin[rtcio_num].wakeup_enable = 0;
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+ LP_IO.pin[rtcio_num].int_type = RTCIO_WAKEUP_DISABLE;
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+}
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+
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+/**
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+ * Enable rtc io output in deep sleep.
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+ *
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+ * @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
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+ */
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+static inline void rtcio_ll_enable_output_in_sleep(gpio_num_t gpio_num)
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+{
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+ LP_IO.gpio[gpio_num].mcu_oe = 1;
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+}
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+
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+/**
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+ * Disable rtc io output in deep sleep.
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+ *
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+ * @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
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+ */
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+static inline void rtcio_ll_disable_output_in_sleep(gpio_num_t gpio_num)
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+{
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+ LP_IO.gpio[gpio_num].mcu_oe = 0;
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+}
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+
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+/**
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+ * Enable rtc io input in deep sleep.
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+ *
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+ * @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
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+ */
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+static inline void rtcio_ll_enable_input_in_sleep(gpio_num_t gpio_num)
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+{
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+ LP_IO.gpio[gpio_num].mcu_ie = 1;
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+}
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+
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+/**
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+ * Disable rtc io input in deep sleep.
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+ *
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+ * @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
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+ */
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+static inline void rtcio_ll_disable_input_in_sleep(gpio_num_t gpio_num)
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+{
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+ LP_IO.gpio[gpio_num].mcu_ie = 0;
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+}
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+
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+/**
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+ * Enable rtc io keep another setting in deep sleep.
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+ *
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+ * @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
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+ */
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+static inline void rtcio_ll_enable_sleep_setting(gpio_num_t gpio_num)
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+{
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+ LP_IO.gpio[gpio_num].slp_sel = 1;
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+}
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+
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+/**
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+ * Disable rtc io keep another setting in deep sleep. (Default)
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+ *
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+ * @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
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+ */
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+static inline void rtcio_ll_disable_sleep_setting(gpio_num_t gpio_num)
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+{
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+ LP_IO.gpio[gpio_num].slp_sel = 0;
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+}
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+
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+/**
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+ * Set specific logic level on an RTC IO pin as a wakeup trigger.
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+ *
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+ * @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
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+ * @param level Logic level (0)
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+ */
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+static inline void rtcio_ll_ext0_set_wakeup_pin(int rtcio_num, int level)
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+{
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+ uint32_t wakeup_sel_mask = HAL_FORCE_READ_U32_REG_FIELD(LP_AON.ext_wakeup_cntl, ext_wakeup_sel);
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+ wakeup_sel_mask |= BIT(rtcio_num);
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+ HAL_FORCE_MODIFY_U32_REG_FIELD(LP_AON.ext_wakeup_cntl, ext_wakeup_sel, wakeup_sel_mask);
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+
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+ uint32_t wakeup_level_mask = HAL_FORCE_READ_U32_REG_FIELD(LP_AON.ext_wakeup_cntl, ext_wakeup_lv);
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+ if (level) {
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+ wakeup_level_mask |= BIT(rtcio_num);
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+ } else {
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+ wakeup_level_mask &= ~BIT(rtcio_num);
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+ }
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+ HAL_FORCE_MODIFY_U32_REG_FIELD(LP_AON.ext_wakeup_cntl, ext_wakeup_lv, wakeup_level_mask);
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+}
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+
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+#ifdef __cplusplus
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+}
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+#endif
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Kevin (Lao Kaiyao)