Merge branch 'feature/move_target_kconfig_2' into 'master'

system: move kconfig options out of target component

See merge request espressif/esp-idf!17321

components/app_trace/sys_view/Sample/Config/SEGGER_SYSVIEW_Config_FreeRTOS.c

@@ -128,13 +128,7 @@ gptimer_handle_t s_sv_gptimer;
 
 #if TS_USE_CCOUNT
 // CCOUNT is incremented at CPU frequency
-#if CONFIG_IDF_TARGET_ESP32
-#define SYSVIEW_TIMESTAMP_FREQ  (CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ * 1000000)
-#elif CONFIG_IDF_TARGET_ESP32S2
-#define SYSVIEW_TIMESTAMP_FREQ  (CONFIG_ESP32S2_DEFAULT_CPU_FREQ_MHZ * 1000000)
-#elif CONFIG_IDF_TARGET_ESP32S3
-#define SYSVIEW_TIMESTAMP_FREQ  (CONFIG_ESP32S3_DEFAULT_CPU_FREQ_MHZ * 1000000)
-#endif
+#define SYSVIEW_TIMESTAMP_FREQ  (CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ * 1000000)
 #endif // TS_USE_CCOUNT
 
 // System Frequency.

components/bootloader/Kconfig.projbuild

@@ -218,7 +218,7 @@ menu "Bootloader config"
             source for slow_clk - and ends calling app_main.
             Re-set timeout is needed due to WDT uses a SLOW_CLK clock source. After changing a frequency slow_clk a
             time of WDT needs to re-set for new frequency.
-            slow_clk depends on ESP32_RTC_CLK_SRC (INTERNAL_RC or EXTERNAL_CRYSTAL).
+            slow_clk depends on RTC_CLK_SRC (INTERNAL_RC or EXTERNAL_CRYSTAL).
 
     config BOOTLOADER_WDT_DISABLE_IN_USER_CODE
         bool "Allows RTC watchdog disable in user code"

components/bootloader_support/src/esp32/bootloader_esp32.c

@@ -126,9 +126,9 @@ static void bootloader_reset_mmu(void)
 static esp_err_t bootloader_check_rated_cpu_clock(void)
 {
     int rated_freq = bootloader_clock_get_rated_freq_mhz();
-    if (rated_freq < CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ) {
+    if (rated_freq < CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ) {
         ESP_LOGE(TAG, "Chip CPU frequency rated for %dMHz, configured for %dMHz. Modify CPU frequency in menuconfig",
-                 rated_freq, CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ);
+                 rated_freq, CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ);
         return ESP_FAIL;
     }
     return ESP_OK;

components/bt/controller/esp32/Kconfig.in

@@ -258,7 +258,7 @@ menu "MODEM SLEEP Options"
 
         config BTDM_CTRL_LPCLK_SEL_EXT_32K_XTAL
             bool "External 32kHz crystal"
-            depends on ESP32_RTC_CLK_SRC_EXT_CRYS
+            depends on RTC_CLK_SRC_EXT_CRYS
             help
                 External 32kHz crystal has a nominal frequency of 32.768kHz and provides good frequency
                 stability. If used as Bluetooth low power clock, External 32kHz can support Bluetooth

components/bt/controller/esp32/hli_vectors.S

@@ -1,16 +1,8 @@
-// Copyright 2015-2021 Espressif Systems (Shanghai) CO LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
 
 #include <xtensa/coreasm.h>
@@ -61,7 +53,7 @@ xt_highint4:
     cause timer2 to timeout and trigger a level 5 interrupt.
     */
     rsr.ccount  a0
-    addmi   a0, a0, (CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ*50)
+    addmi   a0, a0, (CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ*50)
     wsr     a0, CCOMPARE2
 
     /* Enable Timer 2 interrupt */

components/bt/controller/esp32c3/Kconfig.in

@@ -356,7 +356,7 @@ menu "MODEM SLEEP Options"
                 other bluetooth low power clock sources.
         config BT_CTRL_LPCLK_SEL_EXT_32K_XTAL
             bool "External 32kHz crystal"
-            depends on ESP32C3_RTC_CLK_SRC_EXT_CRYS
+            depends on RTC_CLK_SRC_EXT_CRYS
             help
                 External 32kHz crystal has a nominal frequency of 32.768kHz and provides good frequency
                 stability. If used as Bluetooth low power clock, External 32kHz can support Bluetooth
@@ -364,7 +364,7 @@ menu "MODEM SLEEP Options"
 
         config BT_CTRL_LPCLK_SEL_RTC_SLOW
             bool "Internal 150kHz RC oscillator"
-            depends on ESP32C3_RTC_CLK_SRC_INT_RC
+            depends on RTC_CLK_SRC_INT_RC
             help
                 Internal 150kHz RC oscillator. The accuracy of this clock is a lot larger than 500ppm which is required
                 in Bluetooth communication, so don't select this option in scenarios such as BLE connection state.

components/bt/controller/esp32s3/Kconfig.in

@@ -373,7 +373,7 @@ menu "MODEM SLEEP Options"
                 other bluetooth low power clock sources.
         config BT_CTRL_LPCLK_SEL_EXT_32K_XTAL
             bool "External 32kHz crystal"
-            depends on ESP32S3_RTC_CLK_SRC_EXT_CRYS
+            depends on RTC_CLK_SRC_EXT_CRYS
             help
                 External 32kHz crystal has a nominal frequency of 32.768kHz and provides good frequency
                 stability. If used as Bluetooth low power clock, External 32kHz can support Bluetooth
@@ -381,7 +381,7 @@ menu "MODEM SLEEP Options"
 
         config BT_CTRL_LPCLK_SEL_RTC_SLOW
             bool "Internal 150kHz RC oscillator"
-            depends on ESP32S3_RTC_CLK_SRC_INT_RC
+            depends on RTC_CLK_SRC_INT_RC
             help
                 Internal 150kHz RC oscillator. The accuracy of this clock is a lot larger than 500ppm which is required
                 in Bluetooth communication, so don't select this option in scenarios such as BLE connection state.

components/driver/esp32/touch_sensor.c

@@ -283,10 +283,10 @@ esp_err_t touch_pad_config(touch_pad_t touch_num, uint16_t threshold)
 
 esp_err_t touch_pad_init(void)
 {
-#ifdef CONFIG_ESP32_RTC_EXT_CRYST_ADDIT_CURRENT_V2
+#ifdef CONFIG_RTC_EXT_CRYST_ADDIT_CURRENT_V2
     ESP_LOGE(TOUCH_TAG, "Touch Pad can't work because it provides current to external XTAL");
     return ESP_ERR_NOT_SUPPORTED;
-#endif // CONFIG_ESP32_RTC_EXT_CRYST_ADDIT_CURRENT_V2
+#endif // CONFIG_RTC_EXT_CRYST_ADDIT_CURRENT_V2
     if (rtc_touch_mux == NULL) {
         rtc_touch_mux = xSemaphoreCreateMutex();
     }

components/driver/test/test_adc.c

@@ -285,20 +285,11 @@ TEST_CASE("test_adc_single", "[adc][ignore][manual]")
 /********************************************************************************
  *      ADC Speed Related Tests
  ********************************************************************************/
-#ifdef CONFIG_IDF_TARGET_ESP32
-#define CPU_FREQ_MHZ                    CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ
-#elif CONFIG_IDF_TARGET_ESP32S2
-#define CPU_FREQ_MHZ                    CONFIG_ESP32S2_DEFAULT_CPU_FREQ_MHZ
-#elif CONFIG_IDF_TARGET_ESP32S3
-#define CPU_FREQ_MHZ                    CONFIG_ESP32S3_DEFAULT_CPU_FREQ_MHZ
-#elif CONFIG_IDF_TARGET_ESP32C3
-#define CPU_FREQ_MHZ                    CONFIG_ESP32C3_DEFAULT_CPU_FREQ_MHZ
-#endif
 
 #define RECORD_TIME_PREPARE() uint32_t __t1, __t2
 #define RECORD_TIME_START()             do {__t1 = esp_cpu_get_ccount();}while(0)
 #define RECORD_TIME_END(p_time)         do{__t2 = esp_cpu_get_ccount(); *p_time = (__t2-__t1);}while(0)
-#define GET_US_BY_CCOUNT(t)             ((double)t/CPU_FREQ_MHZ)
+#define GET_US_BY_CCOUNT(t)             ((double)t/CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ)
 
 
 //ADC Channels
@@ -367,7 +358,7 @@ static IRAM_ATTR NOINLINE_ATTR uint32_t get_cali_time_in_ccount(uint32_t adc_raw
 
 TEST_CASE("test_adc_single_cali_time", "[adc][ignore][manual]")
 {
-    ESP_LOGI(TAG, "CPU FREQ is %dMHz", CPU_FREQ_MHZ);
+    ESP_LOGI(TAG, "CPU FREQ is %dMHz", CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ);
     uint32_t adc1_time_record[4][TIMES_PER_ATTEN] = {};
     uint32_t adc2_time_record[4][TIMES_PER_ATTEN] = {};
     int adc1_raw = 0;

components/driver/test/test_spi_master.c

@@ -1310,17 +1310,7 @@ TEST_CASE_MULTIPLE_DEVICES("SPI Master: FD, DMA, Master Single Direction Test",
 #define RECORD_TIME_PREPARE() uint32_t __t1, __t2
 #define RECORD_TIME_START()   do {__t1 = esp_cpu_get_ccount();}while(0)
 #define RECORD_TIME_END(p_time) do{__t2 = esp_cpu_get_ccount(); *p_time = (__t2-__t1);}while(0)
-#ifdef CONFIG_IDF_TARGET_ESP32
-#define GET_US_BY_CCOUNT(t) ((double)t/CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ)
-#elif CONFIG_IDF_TARGET_ESP32S2
-#define GET_US_BY_CCOUNT(t) ((double)t/CONFIG_ESP32S2_DEFAULT_CPU_FREQ_MHZ)
-#elif CONFIG_IDF_TARGET_ESP32S3
-#define GET_US_BY_CCOUNT(t) ((double)t/CONFIG_ESP32S3_DEFAULT_CPU_FREQ_MHZ)
-#elif CONFIG_IDF_TARGET_ESP32C3
-#define GET_US_BY_CCOUNT(t) ((double)t/CONFIG_ESP32C3_DEFAULT_CPU_FREQ_MHZ)
-#elif CONFIG_IDF_TARGET_ESP32C2
-#define GET_US_BY_CCOUNT(t) ((double)t/CONFIG_ESP32C2_DEFAULT_CPU_FREQ_MHZ)
-#endif
+#define GET_US_BY_CCOUNT(t) ((double)t/CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ)
 
 static void speed_setup(spi_device_handle_t *spi, bool use_dma)
 {

components/esp32/Kconfig

@@ -9,60 +9,10 @@ menu "ESP32-specific"
         default y
         depends on !FREERTOS_UNICORE && ESP32_SPIRAM_SUPPORT
 
-    choice ESP32_REV_MIN
-        prompt "Minimum Supported ESP32 Revision"
-        default ESP32_REV_MIN_0
-        help
-            Minimum revision that ESP-IDF would support.
-            ESP-IDF performs different strategy on different esp32 revision.
-
-        config ESP32_REV_MIN_0
-            bool "Rev 0"
-        config ESP32_REV_MIN_1
-            bool "Rev 1"
-        config ESP32_REV_MIN_2
-            bool "Rev 2"
-        config ESP32_REV_MIN_3
-            bool "Rev 3"
-            select ESP_INT_WDT if ESP32_ECO3_CACHE_LOCK_FIX
-    endchoice
-
-    config ESP32_REV_MIN
-        int
-        default 0 if ESP32_REV_MIN_0
-        default 1 if ESP32_REV_MIN_1
-        default 2 if ESP32_REV_MIN_2
-        default 3 if ESP32_REV_MIN_3
-
     config ESP32_DPORT_WORKAROUND
         bool
         default "y" if !FREERTOS_UNICORE  && ESP32_REV_MIN < 2
 
-    choice ESP32_DEFAULT_CPU_FREQ_MHZ
-        prompt "CPU frequency"
-        default ESP32_DEFAULT_CPU_FREQ_40 if IDF_ENV_FPGA
-        default ESP32_DEFAULT_CPU_FREQ_160
-        help
-            CPU frequency to be set on application startup.
-
-        config ESP32_DEFAULT_CPU_FREQ_40
-            bool "40 MHz"
-            depends on IDF_ENV_FPGA
-        config ESP32_DEFAULT_CPU_FREQ_80
-            bool "80 MHz"
-        config ESP32_DEFAULT_CPU_FREQ_160
-            bool "160 MHz"
-        config ESP32_DEFAULT_CPU_FREQ_240
-            bool "240 MHz"
-    endchoice
-
-    config ESP32_DEFAULT_CPU_FREQ_MHZ
-        int
-        default 40 if ESP32_DEFAULT_CPU_FREQ_40
-        default 80 if ESP32_DEFAULT_CPU_FREQ_80
-        default 160 if ESP32_DEFAULT_CPU_FREQ_160
-        default 240 if ESP32_DEFAULT_CPU_FREQ_240
-
         # Note: to support SPIRAM across multiple chips, check CONFIG_SPIRAM
         # instead
     config ESP32_SPIRAM_SUPPORT
@@ -500,140 +450,6 @@ menu "ESP32-specific"
         default 0x4000 if ESP32_MEMMAP_TRACEMEM && !ESP32_MEMMAP_TRACEMEM_TWOBANKS
         default 0x0
 
-    choice ESP32_TIME_SYSCALL
-        prompt "Timers used for gettimeofday function"
-        default ESP32_TIME_SYSCALL_USE_RTC_HRT
-        help
-            This setting defines which hardware timers are used to
-            implement 'gettimeofday' and 'time' functions in C library.
-
-            - If both high-resolution and RTC timers are used, timekeeping will
-              continue in deep sleep. Time will be reported at 1 microsecond
-              resolution. This is the default, and the recommended option.
-            - If only high-resolution timer is used, gettimeofday will
-              provide time at microsecond resolution.
-              Time will not be preserved when going into deep sleep mode.
-            - If only RTC timer is used, timekeeping will continue in
-              deep sleep, but time will be measured at 6.(6) microsecond
-              resolution. Also the gettimeofday function itself may take
-              longer to run.
-            - If no timers are used, gettimeofday and time functions
-              return -1 and set errno to ENOSYS.
-            - When RTC is used for timekeeping, two RTC_STORE registers are
-              used to keep time in deep sleep mode.
-
-        config ESP32_TIME_SYSCALL_USE_RTC_HRT
-            bool "RTC and high-resolution timer"
-            select ESP_TIME_FUNCS_USE_RTC_TIMER
-            select ESP_TIME_FUNCS_USE_ESP_TIMER
-        config ESP32_TIME_SYSCALL_USE_RTC
-            bool "RTC"
-            select ESP_TIME_FUNCS_USE_RTC_TIMER
-        config ESP32_TIME_SYSCALL_USE_HRT
-            bool "High-resolution timer"
-            select ESP_TIME_FUNCS_USE_ESP_TIMER
-        config ESP32_TIME_SYSCALL_USE_NONE
-            bool "None"
-            select ESP_TIME_FUNCS_USE_NONE
-    endchoice
-
-    choice ESP32_RTC_CLK_SRC
-        prompt "RTC clock source"
-        default ESP32_RTC_CLK_SRC_INT_RC
-        help
-            Choose which clock is used as RTC clock source.
-
-            - "Internal 150kHz oscillator" option provides lowest deep sleep current
-              consumption, and does not require extra external components. However
-              frequency stability with respect to temperature is poor, so time may
-              drift in deep/light sleep modes.
-            - "External 32kHz crystal" provides better frequency stability, at the
-              expense of slightly higher (1uA) deep sleep current consumption.
-            - "External 32kHz oscillator" allows using 32kHz clock generated by an
-              external circuit. In this case, external clock signal must be connected
-              to 32K_XN pin. Amplitude should be <1.2V in case of sine wave signal,
-              and <1V in case of square wave signal. Common mode voltage should be
-              0.1 < Vcm < 0.5Vamp, where Vamp is the signal amplitude.
-              Additionally, 1nF capacitor must be connected between 32K_XP pin and
-              ground. 32K_XP pin can not be used as a GPIO in this case.
-            - "Internal 8.5MHz oscillator divided by 256" option results in higher
-              deep sleep current (by 5uA) but has better frequency stability than
-              the internal 150kHz oscillator. It does not require external components.
-
-        config ESP32_RTC_CLK_SRC_INT_RC
-            bool "Internal 150kHz RC oscillator"
-        config ESP32_RTC_CLK_SRC_EXT_CRYS
-            bool "External 32kHz crystal"
-            select ESP_SYSTEM_RTC_EXT_XTAL
-        config ESP32_RTC_CLK_SRC_EXT_OSC
-            bool "External 32kHz oscillator at 32K_XN pin"
-            select ESP_SYSTEM_RTC_EXT_OSC
-        config ESP32_RTC_CLK_SRC_INT_8MD256
-            bool "Internal 8.5MHz oscillator, divided by 256 (~33kHz)"
-    endchoice
-
-    choice ESP32_RTC_EXT_CRYST_ADDIT_CURRENT_METHOD
-        prompt "Additional current for external 32kHz crystal"
-        depends on ESP32_RTC_CLK_SRC_EXT_CRYS
-        depends on ESP32_REV_MIN <= 1
-        default ESP32_RTC_EXT_CRYST_ADDIT_CURRENT_NONE
-        help
-            With some 32kHz crystal configurations, the X32N and X32P pins may not have enough
-            drive strength to keep the crystal oscillating. Choose the method to provide
-            additional current from touchpad 9 to the external 32kHz crystal. Note that
-            the deep sleep current is slightly high (4-5uA) and the touchpad and the
-            wakeup sources of both touchpad and ULP are not available in method 1 and method 2.
-
-            This problem is fixed in ESP32 ECO 3, so this workaround is not needed. Setting the
-            project configuration to minimum revision ECO3 will disable this option, , allow
-            all wakeup sources, and save some code size.
-
-            - "None" option will not provide additional current to external crystal
-            - "Method 1" option can't ensure 100% to solve the external 32k crystal start failed
-              issue, but the touchpad can work in this method.
-            - "Method 2" option can solve the external 32k issue, but the touchpad can't work
-              in this method.
-
-        config ESP32_RTC_EXT_CRYST_ADDIT_CURRENT_NONE
-            bool "None"
-        config ESP32_RTC_EXT_CRYST_ADDIT_CURRENT
-            bool "Method 1"
-        config ESP32_RTC_EXT_CRYST_ADDIT_CURRENT_V2
-            bool "Method 2"
-    endchoice
-
-    config ESP32_RTC_CLK_CAL_CYCLES
-        int "Number of cycles for RTC_SLOW_CLK calibration"
-        default 3000 if ESP32_RTC_CLK_SRC_EXT_CRYS || ESP32_RTC_CLK_SRC_EXT_OSC || ESP32_RTC_CLK_SRC_INT_8MD256
-        default 1024 if ESP32_RTC_CLK_SRC_INT_RC
-        range 0 27000 if ESP32_RTC_CLK_SRC_EXT_CRYS || ESP32_RTC_CLK_SRC_EXT_OSC || ESP32_RTC_CLK_SRC_INT_8MD256
-        range 0 32766 if ESP32_RTC_CLK_SRC_INT_RC
-        help
-            When the startup code initializes RTC_SLOW_CLK, it can perform
-            calibration by comparing the RTC_SLOW_CLK frequency with main XTAL
-            frequency. This option sets the number of RTC_SLOW_CLK cycles measured
-            by the calibration routine. Higher numbers increase calibration
-            precision, which may be important for applications which spend a lot of
-            time in deep sleep. Lower numbers reduce startup time.
-
-            When this option is set to 0, clock calibration will not be performed at
-            startup, and approximate clock frequencies will be assumed:
-
-            - 150000 Hz if internal RC oscillator is used as clock source. For this use value 1024.
-            - 32768 Hz if the 32k crystal oscillator is used. For this use value 3000 or more.
-              In case more value will help improve the definition of the launch of the crystal.
-              If the crystal could not start, it will be switched to internal RC.
-
-    config ESP32_RTC_XTAL_CAL_RETRY
-        int "Number of attempts to repeat 32k XTAL calibration"
-        default 1
-        depends on ESP32_RTC_CLK_SRC_EXT_CRYS
-        help
-            Number of attempts to repeat 32k XTAL calibration
-            before giving up and switching to the internal RC.
-            Increase this option if the 32k crystal oscillator
-            does not start and switches to internal RC.
-
     config ESP32_DEEP_SLEEP_WAKEUP_DELAY
         int "Extra delay in deep sleep wake stub (in us)"
         default 2000
@@ -694,14 +510,6 @@ menu "ESP32-specific"
 
             (Enabling secure boot also disables the BASIC ROM Console by default.)
 
-    config ESP32_NO_BLOBS
-        bool "No Binary Blobs"
-        depends on !BT_ENABLED
-        default n
-        help
-            If enabled, this disables the linking of binary libraries in the application build. Note
-            that after enabling this Wi-Fi/Bluetooth will not work.
-
     config ESP32_COMPATIBLE_PRE_V2_1_BOOTLOADERS
         bool "App compatible with bootloaders before ESP-IDF v2.1"
         select ESP32_COMPATIBLE_PRE_V3_1_BOOTLOADERS

components/esp32/sdkconfig.rename

@@ -6,17 +6,8 @@ CONFIG_SPIRAM_SUPPORT                                   CONFIG_ESP32_SPIRAM_SUPP
 CONFIG_MEMMAP_TRACEMEM                                  CONFIG_ESP32_MEMMAP_TRACEMEM
 CONFIG_MEMMAP_TRACEMEM_TWOBANKS                         CONFIG_ESP32_MEMMAP_TRACEMEM_TWOBANKS
 CONFIG_TRACEMEM_RESERVE_DRAM                            CONFIG_ESP32_TRACEMEM_RESERVE_DRAM
-CONFIG_ESP32_RTC_EXTERNAL_CRYSTAL_ADDITIONAL_CURRENT    CONFIG_ESP32_RTC_EXT_CRYST_ADDIT_CURRENT
-CONFIG_ESP32_RTC_CLOCK_SOURCE                           CONFIG_ESP32_RTC_CLK_SRC
-CONFIG_ESP32_RTC_CLOCK_SOURCE_INTERNAL_RC               CONFIG_ESP32_RTC_CLK_SRC_INT_RC
-CONFIG_ESP32_RTC_CLOCK_SOURCE_EXTERNAL_CRYSTAL          CONFIG_ESP32_RTC_CLK_SRC_EXT_CRYS
-CONFIG_ESP32_RTC_CLOCK_SOURCE_EXTERNAL_OSC              CONFIG_ESP32_RTC_CLK_SRC_EXT_OSC
-CONFIG_ESP32_RTC_CLOCK_SOURCE_INTERNAL_8MD256           CONFIG_ESP32_RTC_CLK_SRC_INT_8MD256
 CONFIG_DISABLE_BASIC_ROM_CONSOLE                        CONFIG_ESP32_DISABLE_BASIC_ROM_CONSOLE
 CONFIG_COMPATIBLE_PRE_V2_1_BOOTLOADERS                  CONFIG_ESP32_COMPATIBLE_PRE_V2_1_BOOTLOADERS
-CONFIG_ESP32_ULP_COPROC_ENABLED                         CONFIG_ULP_COPROC_ENABLED
-CONFIG_ESP32_ULP_COPROC_RESERVE_MEM                     CONFIG_ULP_COPROC_RESERVE_MEM
-CONFIG_ESP32_TIME_SYSCALL_USE_RTC_FRC1                  CONFIG_ESP32_TIME_SYSCALL_USE_RTC_HRT
-CONFIG_ESP32_TIME_SYSCALL_USE_FRC1                      CONFIG_ESP32_TIME_SYSCALL_USE_HRT
+
 # SPI RAM config
 CONFIG_WIFI_LWIP_ALLOCATION_FROM_SPIRAM_FIRST           CONFIG_SPIRAM_TRY_ALLOCATE_WIFI_LWIP

components/esp32c2/Kconfig

@@ -1,28 +1,6 @@
 menu "ESP32C2-Specific"
     visible if IDF_TARGET_ESP32C2
 
-    choice ESP32C2_DEFAULT_CPU_FREQ_MHZ
-        prompt "CPU frequency"
-        default ESP32C2_DEFAULT_CPU_FREQ_40 if IDF_ENV_FPGA
-        default ESP32C2_DEFAULT_CPU_FREQ_120 if !IDF_ENV_FPGA
-        help
-            CPU frequency to be set on application startup.
-
-        config ESP32C2_DEFAULT_CPU_FREQ_40
-            bool "40 MHz"
-            depends on IDF_ENV_FPGA
-        config ESP32C2_DEFAULT_CPU_FREQ_80
-            bool "80 MHz"
-        config ESP32C2_DEFAULT_CPU_FREQ_120
-            bool "120 MHz"
-    endchoice
-
-    config ESP32C2_DEFAULT_CPU_FREQ_MHZ
-        int
-        default 40 if ESP32C2_DEFAULT_CPU_FREQ_40
-        default 80 if ESP32C2_DEFAULT_CPU_FREQ_80
-        default 120 if ESP32C2_DEFAULT_CPU_FREQ_120
-
     menu "Cache config"
 
         choice ESP32C2_MMU_PAGE_SIZE
@@ -56,105 +34,4 @@ menu "ESP32C2-Specific"
 
     endmenu
 
-
-    config ESP32C2_DEBUG_STUBS_ENABLE
-        bool "OpenOCD debug stubs"
-        default COMPILER_OPTIMIZATION_LEVEL_DEBUG
-        depends on !ESP32C2_TRAX
-        help
-            Debug stubs are used by OpenOCD to execute pre-compiled onboard code which does some useful debugging,
-            e.g. GCOV data dump.
-
-    choice ESP32C2_TIME_SYSCALL
-        prompt "Timers used for gettimeofday function"
-        default ESP32C2_TIME_SYSCALL_USE_RTC_SYSTIMER
-        help
-            This setting defines which hardware timers are used to
-            implement 'gettimeofday' and 'time' functions in C library.
-
-            - If both high-resolution (systimer) and RTC timers are used, timekeeping will
-              continue in deep sleep. Time will be reported at 1 microsecond
-              resolution. This is the default, and the recommended option.
-            - If only high-resolution timer (systimer) is used, gettimeofday will
-              provide time at microsecond resolution.
-              Time will not be preserved when going into deep sleep mode.
-            - If only RTC timer is used, timekeeping will continue in
-              deep sleep, but time will be measured at 6.(6) microsecond
-              resolution. Also the gettimeofday function itself may take
-              longer to run.
-            - If no timers are used, gettimeofday and time functions
-              return -1 and set errno to ENOSYS.
-            - When RTC is used for timekeeping, two RTC_STORE registers are
-              used to keep time in deep sleep mode.
-
-        config ESP32C2_TIME_SYSCALL_USE_RTC_SYSTIMER
-            bool "RTC and high-resolution timer"
-            select ESP_TIME_FUNCS_USE_RTC_TIMER
-            select ESP_TIME_FUNCS_USE_ESP_TIMER
-        config ESP32C2_TIME_SYSCALL_USE_RTC
-            bool "RTC"
-            select ESP_TIME_FUNCS_USE_RTC_TIMER
-        config ESP32C2_TIME_SYSCALL_USE_SYSTIMER
-            bool "High-resolution timer"
-            select ESP_TIME_FUNCS_USE_ESP_TIMER
-        config ESP32C2_TIME_SYSCALL_USE_NONE
-            bool "None"
-            select ESP_TIME_FUNCS_USE_NONE
-    endchoice
-
-    choice ESP32C2_RTC_CLK_SRC
-        prompt "RTC clock source"
-        default ESP32C2_RTC_CLK_SRC_INT_RC
-        help
-            Choose which clock is used as RTC clock source.
-
-        config ESP32C2_RTC_CLK_SRC_INT_RC
-            bool "Internal 150kHz RC oscillator"
-        config ESP32C2_RTC_CLK_SRC_EXT_OSC
-            bool "External 32kHz oscillator at 32K_XP pin"
-        config ESP32C2_RTC_CLK_SRC_INT_8MD256
-            bool "Internal 8MHz oscillator, divided by 256 (~32kHz)"
-    endchoice
-
-    config ESP32C2_RTC_CLK_CAL_CYCLES
-        int "Number of cycles for RTC_SLOW_CLK calibration"
-        default 3000 if ESP32C2_RTC_CLK_SRC_EXT_OSC || ESP32C2_RTC_CLK_SRC_INT_8MD256
-        default 1024 if ESP32C2_RTC_CLK_SRC_INT_RC
-        range 0 27000 if ESP32C2_RTC_CLK_SRC_EXT_OSC || ESP32C2_RTC_CLK_SRC_INT_8MD256
-        range 0 32766 if ESP32C2_RTC_CLK_SRC_INT_RC
-        help
-            When the startup code initializes RTC_SLOW_CLK, it can perform
-            calibration by comparing the RTC_SLOW_CLK frequency with main XTAL
-            frequency. This option sets the number of RTC_SLOW_CLK cycles measured
-            by the calibration routine. Higher numbers increase calibration
-            precision, which may be important for applications which spend a lot of
-            time in deep sleep. Lower numbers reduce startup time.
-
-            When this option is set to 0, clock calibration will not be performed at
-            startup, and approximate clock frequencies will be assumed:
-
-            - 150000 Hz if internal RC oscillator is used as clock source. For this use value 1024.
-            - 32768 Hz if the 32k crystal oscillator is used. For this use value 3000 or more.
-              In case more value will help improve the definition of the launch of the crystal.
-              If the crystal could not start, it will be switched to internal RC.
-
-    config ESP32C2_LIGHTSLEEP_GPIO_RESET_WORKAROUND # IDF-3904
-        bool "light sleep GPIO reset workaround"
-        default y
-        select PM_SLP_DISABLE_GPIO if FREERTOS_USE_TICKLESS_IDLE
-        help
-            ESP32C2 will reset at wake-up if GPIO is received a small electrostatic pulse during
-            light sleep, with specific condition
-
-            - GPIO needs to be configured as input-mode only
-            - The pin receives a small electrostatic pulse, and reset occurs when the pulse
-              voltage is higher than 6 V
-
-            For GPIO set to input mode only, it is not a good practice to leave it open/floating,
-            The hardware design needs to controlled it with determined supply or ground voltage
-            is necessary.
-
-            This option provides a software workaround for this issue. Configure to isolate all
-            GPIO pins in sleep state.
-
 endmenu  # ESP32C2-Specific

components/esp32c3/Kconfig

@@ -1,131 +0,0 @@
-menu "ESP32C3-Specific"
-    visible if IDF_TARGET_ESP32C3
-
-    choice ESP32C3_DEFAULT_CPU_FREQ_MHZ
-        prompt "CPU frequency"
-        default ESP32C3_DEFAULT_CPU_FREQ_40 if IDF_ENV_FPGA
-        default ESP32C3_DEFAULT_CPU_FREQ_160 if !IDF_ENV_FPGA
-        help
-            CPU frequency to be set on application startup.
-
-        config ESP32C3_DEFAULT_CPU_FREQ_40
-            bool "40 MHz"
-            depends on IDF_ENV_FPGA
-        config ESP32C3_DEFAULT_CPU_FREQ_80
-            bool "80 MHz"
-        config ESP32C3_DEFAULT_CPU_FREQ_160
-            bool "160 MHz"
-    endchoice
-
-    config ESP32C3_DEFAULT_CPU_FREQ_MHZ
-        int
-        default 40 if ESP32C3_DEFAULT_CPU_FREQ_40
-        default 80 if ESP32C3_DEFAULT_CPU_FREQ_80
-        default 160 if ESP32C3_DEFAULT_CPU_FREQ_160
-
-    choice ESP32C3_REV_MIN
-        prompt "Minimum Supported ESP32-C3 Revision"
-        default ESP32C3_REV_MIN_3
-        help
-            Minimum revision that ESP-IDF would support.
-
-            Only supporting higher chip revisions can reduce binary size.
-
-        config ESP32C3_REV_MIN_0
-            bool "Rev 0"
-        config ESP32C3_REV_MIN_1
-            bool "Rev 1"
-        config ESP32C3_REV_MIN_2
-            bool "Rev 2"
-        config ESP32C3_REV_MIN_3
-            bool "Rev 3"
-        config ESP32C3_REV_MIN_4
-            bool "Rev 4"
-    endchoice
-
-    config ESP32C3_REV_MIN
-        int
-        default 0 if ESP32C3_REV_MIN_0
-        default 1 if ESP32C3_REV_MIN_1
-        default 2 if ESP32C3_REV_MIN_2
-        default 3 if ESP32C3_REV_MIN_3
-        default 4 if ESP32C3_REV_MIN_4
-
-    choice ESP32C3_TIME_SYSCALL
-        prompt "Timers used for gettimeofday function"
-        default ESP32C3_TIME_SYSCALL_USE_RTC_SYSTIMER
-        help
-            This setting defines which hardware timers are used to
-            implement 'gettimeofday' and 'time' functions in C library.
-
-            - If both high-resolution (systimer) and RTC timers are used, timekeeping will
-              continue in deep sleep. Time will be reported at 1 microsecond
-              resolution. This is the default, and the recommended option.
-            - If only high-resolution timer (systimer) is used, gettimeofday will
-              provide time at microsecond resolution.
-              Time will not be preserved when going into deep sleep mode.
-            - If only RTC timer is used, timekeeping will continue in
-              deep sleep, but time will be measured at 6.(6) microsecond
-              resolution. Also the gettimeofday function itself may take
-              longer to run.
-            - If no timers are used, gettimeofday and time functions
-              return -1 and set errno to ENOSYS.
-            - When RTC is used for timekeeping, two RTC_STORE registers are
-              used to keep time in deep sleep mode.
-
-        config ESP32C3_TIME_SYSCALL_USE_RTC_SYSTIMER
-            bool "RTC and high-resolution timer"
-            select ESP_TIME_FUNCS_USE_RTC_TIMER
-            select ESP_TIME_FUNCS_USE_ESP_TIMER
-        config ESP32C3_TIME_SYSCALL_USE_RTC
-            bool "RTC"
-            select ESP_TIME_FUNCS_USE_RTC_TIMER
-        config ESP32C3_TIME_SYSCALL_USE_SYSTIMER
-            bool "High-resolution timer"
-            select ESP_TIME_FUNCS_USE_ESP_TIMER
-        config ESP32C3_TIME_SYSCALL_USE_NONE
-            bool "None"
-            select ESP_TIME_FUNCS_USE_NONE
-    endchoice
-
-    choice ESP32C3_RTC_CLK_SRC
-        prompt "RTC clock source"
-        default ESP32C3_RTC_CLK_SRC_INT_RC
-        help
-            Choose which clock is used as RTC clock source.
-
-        config ESP32C3_RTC_CLK_SRC_INT_RC
-            bool "Internal 150kHz RC oscillator"
-        config ESP32C3_RTC_CLK_SRC_EXT_CRYS
-            bool "External 32kHz crystal"
-            select ESP_SYSTEM_RTC_EXT_XTAL
-        config ESP32C3_RTC_CLK_SRC_EXT_OSC
-            bool "External 32kHz oscillator at 32K_XP pin"
-            select ESP_SYSTEM_RTC_EXT_OSC
-        config ESP32C3_RTC_CLK_SRC_INT_8MD256
-            bool "Internal 8MHz oscillator, divided by 256 (~32kHz)"
-    endchoice
-
-    config ESP32C3_RTC_CLK_CAL_CYCLES
-        int "Number of cycles for RTC_SLOW_CLK calibration"
-        default 3000 if ESP32C3_RTC_CLK_SRC_EXT_CRYS || ESP32C3_RTC_CLK_SRC_EXT_OSC || ESP32C3_RTC_CLK_SRC_INT_8MD256
-        default 1024 if ESP32C3_RTC_CLK_SRC_INT_RC
-        range 0 27000 if ESP32C3_RTC_CLK_SRC_EXT_CRYS || ESP32C3_RTC_CLK_SRC_EXT_OSC || ESP32C3_RTC_CLK_SRC_INT_8MD256
-        range 0 32766 if ESP32C3_RTC_CLK_SRC_INT_RC
-        help
-            When the startup code initializes RTC_SLOW_CLK, it can perform
-            calibration by comparing the RTC_SLOW_CLK frequency with main XTAL
-            frequency. This option sets the number of RTC_SLOW_CLK cycles measured
-            by the calibration routine. Higher numbers increase calibration
-            precision, which may be important for applications which spend a lot of
-            time in deep sleep. Lower numbers reduce startup time.
-
-            When this option is set to 0, clock calibration will not be performed at
-            startup, and approximate clock frequencies will be assumed:
-
-            - 150000 Hz if internal RC oscillator is used as clock source. For this use value 1024.
-            - 32768 Hz if the 32k crystal oscillator is used. For this use value 3000 or more.
-              In case more value will help improve the definition of the launch of the crystal.
-              If the crystal could not start, it will be switched to internal RC.
-
-endmenu  # ESP32C3-Specific

components/esp32h2/Kconfig

@@ -1,143 +0,0 @@
-menu "ESP32H2-Specific"
-    visible if IDF_TARGET_ESP32H2
-
-    choice ESP32H2_DEFAULT_CPU_FREQ_MHZ
-        prompt "CPU frequency"
-        default ESP32H2_DEFAULT_CPU_FREQ_64 if IDF_ENV_FPGA
-        default ESP32H2_DEFAULT_CPU_FREQ_96 if !IDF_ENV_FPGA
-        help
-            CPU frequency to be set on application startup.
-
-        config ESP32H2_DEFAULT_CPU_FREQ_16
-            bool "16 MHz"
-            depends on IDF_ENV_FPGA     #ESP32H2-TODO: IDF-3786
-        config ESP32H2_DEFAULT_CPU_FREQ_32
-            bool "32 MHz"
-            depends on IDF_ENV_FPGA     #ESP32H2-TODO: IDF-3786
-        config ESP32H2_DEFAULT_CPU_FREQ_64
-            bool "64 MHz"
-            depends on IDF_ENV_FPGA     #ESP32H2-TODO: IDF-3786
-        config ESP32H2_DEFAULT_CPU_FREQ_96
-            bool "96 MHz"
-            depends on !IDF_ENV_FPGA
-    endchoice
-
-    config ESP32H2_DEFAULT_CPU_FREQ_MHZ
-        int
-        default 16 if ESP32H2_DEFAULT_CPU_FREQ_16
-        default 32 if ESP32H2_DEFAULT_CPU_FREQ_32
-        default 64 if ESP32H2_DEFAULT_CPU_FREQ_64
-        default 96 if ESP32H2_DEFAULT_CPU_FREQ_96
-
-    choice ESP32H2_REV_MIN
-        prompt "Minimum Supported ESP32-H2 Revision"
-        default ESP32H2_REV_MIN_0
-        help
-            Minimum revision that ESP-IDF would support.
-
-            Only supporting higher chip revisions can reduce binary size.
-
-        config ESP32H2_REV_MIN_0
-            bool "Rev 0"
-    endchoice
-
-    config ESP32H2_REV_MIN
-        int
-        default 0 if ESP32H2_REV_MIN_0
-
-    choice ESP32H2_TIME_SYSCALL
-        prompt "Timers used for gettimeofday function"
-        default ESP32H2_TIME_SYSCALL_USE_RTC_SYSTIMER
-        help
-            This setting defines which hardware timers are used to
-            implement 'gettimeofday' and 'time' functions in C library.
-
-            - If both high-resolution (systimer) and RTC timers are used, timekeeping will
-              continue in deep sleep. Time will be reported at 1 microsecond
-              resolution. This is the default, and the recommended option.
-            - If only high-resolution timer (systimer) is used, gettimeofday will
-              provide time at microsecond resolution.
-              Time will not be preserved when going into deep sleep mode.
-            - If only RTC timer is used, timekeeping will continue in
-              deep sleep, but time will be measured at 6.(6) microsecond
-              resolution. Also the gettimeofday function itself may take
-              longer to run.
-            - If no timers are used, gettimeofday and time functions
-              return -1 and set errno to ENOSYS.
-            - When RTC is used for timekeeping, two RTC_STORE registers are
-              used to keep time in deep sleep mode.
-
-        config ESP32H2_TIME_SYSCALL_USE_RTC_SYSTIMER
-            bool "RTC and high-resolution timer"
-            select ESP_TIME_FUNCS_USE_RTC_TIMER
-            select ESP_TIME_FUNCS_USE_ESP_TIMER
-        config ESP32H2_TIME_SYSCALL_USE_RTC
-            bool "RTC"
-            select ESP_TIME_FUNCS_USE_RTC_TIMER
-        config ESP32H2_TIME_SYSCALL_USE_SYSTIMER
-            bool "High-resolution timer"
-            select ESP_TIME_FUNCS_USE_ESP_TIMER
-        config ESP32H2_TIME_SYSCALL_USE_NONE
-            bool "None"
-            select ESP_TIME_FUNCS_USE_NONE
-    endchoice
-
-    choice ESP32H2_RTC_CLK_SRC
-        prompt "RTC clock source"
-        default ESP32H2_RTC_CLK_SRC_INT_RC
-        help
-            Choose which clock is used as RTC clock source.
-
-        config ESP32H2_RTC_CLK_SRC_INT_RC
-            bool "Internal 150kHz RC oscillator"
-        config ESP32H2_RTC_CLK_SRC_EXT_CRYS
-            bool "External 32.768kHz crystal"
-            select ESP_SYSTEM_RTC_EXT_XTAL
-        config ESP32H2_RTC_CLK_SRC_EXT_OSC
-            bool "External 32kHz oscillator at 32K_XP pin"
-            select ESP_SYSTEM_RTC_EXT_OSC
-        config ESP32H2_RTC_CLK_SRC_INT_8MD256
-            bool "Internal 8MHz oscillator, divided by 256 (~32kHz)"
-    endchoice
-
-    config ESP32H2_RTC_CLK_CAL_CYCLES
-        int "Number of cycles for RTC_SLOW_CLK calibration"
-        default 3000 if ESP32H2_RTC_CLK_SRC_EXT_CRYS || ESP32H2_RTC_CLK_SRC_EXT_OSC || ESP32H2_RTC_CLK_SRC_INT_8MD256
-        default 576 if ESP32H2_RTC_CLK_SRC_INT_RC
-        range 0 125000
-        help
-            When the startup code initializes RTC_SLOW_CLK, it can perform
-            calibration by comparing the RTC_SLOW_CLK frequency with main XTAL
-            frequency. This option sets the number of RTC_SLOW_CLK cycles measured
-            by the calibration routine. Higher numbers increase calibration
-            precision, which may be important for applications which spend a lot of
-            time in deep sleep. Lower numbers reduce startup time.
-
-            When this option is set to 0, clock calibration will not be performed at
-            startup, and approximate clock frequencies will be assumed:
-
-            - 150000 Hz if internal RC oscillator is used as clock source. For this use value 1024.
-            - 32768 Hz if the 32k crystal oscillator is used. For this use value 3000 or more.
-              In case more value will help improve the definition of the launch of the crystal.
-              If the crystal could not start, it will be switched to internal RC.
-
-    config ESP32H2_LIGHTSLEEP_GPIO_RESET_WORKAROUND
-        bool "light sleep GPIO reset workaround"
-        default y
-        select PM_SLP_DISABLE_GPIO if FREERTOS_USE_TICKLESS_IDLE
-        help
-            ESP32H2 will reset at wake-up if GPIO is received a small electrostatic pulse during
-            light sleep, with specific condition
-
-            - GPIO needs to be configured as input-mode only
-            - The pin receives a small electrostatic pulse, and reset occurs when the pulse
-              voltage is higher than 6 V
-
-            For GPIO set to input mode only, it is not a good practice to leave it open/floating,
-            The hardware design needs to controlled it with determined supply or ground voltage
-            is necessary.
-
-            This option provides a software workaround for this issue. Configure to isolate all
-            GPIO pins in sleep state.
-
-endmenu  # ESP32H2-Specific

components/esp32s2/Kconfig

@@ -4,31 +4,6 @@ menu "ESP32S2-specific"
     # not working so we just hide all items here
     visible if IDF_TARGET_ESP32S2
 
-    choice ESP32S2_DEFAULT_CPU_FREQ_MHZ
-        prompt "CPU frequency"
-        default ESP32S2_DEFAULT_CPU_FREQ_160 if !IDF_ENV_FPGA
-        default ESP32S2_DEFAULT_CPU_FREQ_FPGA if IDF_ENV_FPGA
-        help
-            CPU frequency to be set on application startup.
-
-        config ESP32S2_DEFAULT_CPU_FREQ_FPGA
-            depends on IDF_ENV_FPGA
-            bool "FPGA"
-        config ESP32S2_DEFAULT_CPU_FREQ_80
-            bool "80 MHz"
-        config ESP32S2_DEFAULT_CPU_FREQ_160
-            bool "160 MHz"
-        config ESP32S2_DEFAULT_CPU_FREQ_240
-            bool "240 MHz"
-    endchoice
-
-    config ESP32S2_DEFAULT_CPU_FREQ_MHZ
-        int
-        default 40 if IDF_ENV_FPGA
-        default 80 if ESP32S2_DEFAULT_CPU_FREQ_80
-        default 160 if ESP32S2_DEFAULT_CPU_FREQ_160
-        default 240 if ESP32S2_DEFAULT_CPU_FREQ_240
-
     menu "Cache config"
 
         choice ESP32S2_INSTRUCTION_CACHE_SIZE
@@ -230,117 +205,6 @@ menu "ESP32S2-specific"
         default 0x4000 if ESP32S2_MEMMAP_TRACEMEM && !ESP32S2_MEMMAP_TRACEMEM_TWOBANKS
         default 0x0
 
-    choice ESP32S2_TIME_SYSCALL
-        prompt "Timers used for gettimeofday function"
-        default ESP32S2_TIME_SYSCALL_USE_RTC_SYSTIMER
-        help
-            This setting defines which hardware timers are used to
-            implement 'gettimeofday' and 'time' functions in C library.
-
-            - If both high-resolution and RTC timers are used, timekeeping will
-              continue in deep sleep. Time will be reported at 1 microsecond
-              resolution. This is the default, and the recommended option.
-            - If only high-resolution timer is used, gettimeofday will
-              provide time at microsecond resolution.
-              Time will not be preserved when going into deep sleep mode.
-            - If only RTC timer is used, timekeeping will continue in
-              deep sleep, but time will be measured at 6.(6) microsecond
-              resolution. Also the gettimeofday function itself may take
-              longer to run.
-            - If no timers are used, gettimeofday and time functions
-              return -1 and set errno to ENOSYS.
-            - When RTC is used for timekeeping, two RTC_STORE registers are
-              used to keep time in deep sleep mode.
-
-        config ESP32S2_TIME_SYSCALL_USE_RTC_SYSTIMER
-            bool "RTC and high-resolution timer"
-            select ESP_TIME_FUNCS_USE_RTC_TIMER
-            select ESP_TIME_FUNCS_USE_ESP_TIMER
-        config ESP32S2_TIME_SYSCALL_USE_RTC
-            bool "RTC"
-            select ESP_TIME_FUNCS_USE_RTC_TIMER
-        config ESP32S2_TIME_SYSCALL_USE_SYSTIMER
-            bool "High-resolution timer"
-            select ESP_TIME_FUNCS_USE_ESP_TIMER
-        config ESP32S2_TIME_SYSCALL_USE_NONE
-            bool "None"
-            select ESP_TIME_FUNCS_USE_NONE
-    endchoice
-
-    choice ESP32S2_RTC_CLK_SRC
-        prompt "RTC clock source"
-        default ESP32S2_RTC_CLK_SRC_INT_RC
-        help
-            Choose which clock is used as RTC clock source.
-
-            - "Internal 90kHz oscillator" option provides lowest deep sleep current
-              consumption, and does not require extra external components. However
-              frequency stability with respect to temperature is poor, so time may
-              drift in deep/light sleep modes.
-            - "External 32kHz crystal" provides better frequency stability, at the
-              expense of slightly higher (1uA) deep sleep current consumption.
-            - "External 32kHz oscillator" allows using 32kHz clock generated by an
-              external circuit. In this case, external clock signal must be connected
-              to 32K_XN pin. Amplitude should be <1.2V in case of sine wave signal,
-              and <1V in case of square wave signal. Common mode voltage should be
-              0.1 < Vcm < 0.5Vamp, where Vamp is the signal amplitude.
-              Additionally, 1nF capacitor must be connected between 32K_XP pin and
-              ground. 32K_XP pin can not be used as a GPIO in this case.
-            - "Internal 8MHz oscillator divided by 256" option results in higher
-              deep sleep current (by 5uA) but has better frequency stability than
-              the internal 90kHz oscillator. It does not require external components.
-
-        config ESP32S2_RTC_CLK_SRC_INT_RC
-            bool "Internal 90kHz RC oscillator"
-        config ESP32S2_RTC_CLK_SRC_EXT_CRYS
-            bool "External 32kHz crystal"
-            select ESP_SYSTEM_RTC_EXT_XTAL
-        config ESP32S2_RTC_CLK_SRC_EXT_OSC
-            bool "External 32kHz oscillator at 32K_XN pin"
-            select ESP_SYSTEM_RTC_EXT_OSC
-        config ESP32S2_RTC_CLK_SRC_INT_8MD256
-            bool "Internal 8MHz oscillator, divided by 256 (~32kHz)"
-    endchoice
-
-    config ESP32S2_RTC_CLK_CAL_CYCLES
-        int "Number of cycles for RTC_SLOW_CLK calibration"
-        default 3000 if ESP32S2_RTC_CLK_SRC_EXT_CRYS || ESP32S2_RTC_CLK_SRC_EXT_OSC || ESP32S2_RTC_CLK_SRC_INT_8MD256
-        default 576 if ESP32S2_RTC_CLK_SRC_INT_RC
-        range 0 125000
-        help
-            When the startup code initializes RTC_SLOW_CLK, it can perform
-            calibration by comparing the RTC_SLOW_CLK frequency with main XTAL
-            frequency. This option sets the number of RTC_SLOW_CLK cycles measured
-            by the calibration routine. Higher numbers increase calibration
-            precision, which may be important for applications which spend a lot of
-            time in deep sleep. Lower numbers reduce startup time.
-
-            When this option is set to 0, clock calibration will not be performed at
-            startup, and approximate clock frequencies will be assumed:
-
-            - 90000 Hz if internal RC oscillator is used as clock source. For this use value 1024.
-            - 32768 Hz if the 32k crystal oscillator is used. For this use value 3000 or more.
-              In case more value will help improve the definition of the launch of the crystal.
-              If the crystal could not start, it will be switched to internal RC.
-
-    config ESP32S2_RTC_XTAL_CAL_RETRY
-        int "Number of attempts to repeat 32k XTAL calibration"
-        default 3
-        depends on ESP32S2_RTC_CLK_SRC_EXT_CRYS
-        help
-            Number of attempts to repeat 32k XTAL calibration
-            before giving up and switching to the internal RC.
-            Increase this option if the 32k crystal oscillator
-            does not start and switches to internal RC.
-
-    config ESP32S2_NO_BLOBS
-        bool "No Binary Blobs"
-        depends on !BT_ENABLED
-        default n
-        help
-            If enabled, this disables the linking of binary libraries in the application build. Note
-            that after enabling this Wi-Fi/Bluetooth will not work.
-
     config ESP32S2_KEEP_USB_ALIVE
         bool "Keep USB peripheral enabled at start up" if !ESP_CONSOLE_USB_CDC
         default y if ESP_CONSOLE_USB_CDC

components/esp32s3/Kconfig

@@ -1,31 +1,6 @@
 menu "ESP32S3-Specific"
     visible if IDF_TARGET_ESP32S3
 
-    choice ESP32S3_DEFAULT_CPU_FREQ_MHZ
-        prompt "CPU frequency"
-        default ESP32S3_DEFAULT_CPU_FREQ_40 if IDF_ENV_FPGA
-        default ESP32S3_DEFAULT_CPU_FREQ_160 if !IDF_ENV_FPGA
-        help
-            CPU frequency to be set on application startup.
-
-        config ESP32S3_DEFAULT_CPU_FREQ_40
-            bool "40 MHz"
-            depends on IDF_ENV_FPGA
-        config ESP32S3_DEFAULT_CPU_FREQ_80
-            bool "80 MHz"
-        config ESP32S3_DEFAULT_CPU_FREQ_160
-            bool "160 MHz"
-        config ESP32S3_DEFAULT_CPU_FREQ_240
-            bool "240 MHz"
-    endchoice
-
-    config ESP32S3_DEFAULT_CPU_FREQ_MHZ
-        int
-        default 40 if ESP32S3_DEFAULT_CPU_FREQ_40
-        default 80 if ESP32S3_DEFAULT_CPU_FREQ_80
-        default 160 if ESP32S3_DEFAULT_CPU_FREQ_160
-        default 240 if ESP32S3_DEFAULT_CPU_FREQ_240
-
     menu "Cache config"
 
         choice ESP32S3_INSTRUCTION_CACHE_SIZE
@@ -309,82 +284,7 @@ menu "ESP32S3-Specific"
         default 0x8000 if ESP32S3_MEMMAP_TRACEMEM && ESP32S3_MEMMAP_TRACEMEM_TWOBANKS
         default 0x4000 if ESP32S3_MEMMAP_TRACEMEM && !ESP32S3_MEMMAP_TRACEMEM_TWOBANKS
         default 0x0
-    choice ESP32S3_TIME_SYSCALL
-        prompt "Timers used for gettimeofday function"
-        default ESP32S3_TIME_SYSCALL_USE_RTC_SYSTIMER
-        help
-            This setting defines which hardware timers are used to
-            implement 'gettimeofday' and 'time' functions in C library.
-
-            - If both high-resolution and RTC timers are used, timekeeping will
-              continue in deep sleep. Time will be reported at 1 microsecond
-              resolution. This is the default, and the recommended option.
-            - If only high-resolution timer is used, gettimeofday will
-              provide time at microsecond resolution.
-              Time will not be preserved when going into deep sleep mode.
-            - If only RTC timer is used, timekeeping will continue in
-              deep sleep, but time will be measured at 6.(6) microsecond
-              resolution. Also the gettimeofday function itself may take
-              longer to run.
-            - If no timers are used, gettimeofday and time functions
-              return -1 and set errno to ENOSYS.
-            - When RTC is used for timekeeping, two RTC_STORE registers are
-              used to keep time in deep sleep mode.
-
-        config ESP32S3_TIME_SYSCALL_USE_RTC_SYSTIMER
-            bool "RTC and high-resolution timer"
-            select ESP_TIME_FUNCS_USE_RTC_TIMER
-            select ESP_TIME_FUNCS_USE_ESP_TIMER
-        config ESP32S3_TIME_SYSCALL_USE_RTC
-            bool "RTC"
-            select ESP_TIME_FUNCS_USE_RTC_TIMER
-        config ESP32S3_TIME_SYSCALL_USE_SYSTIMER
-            bool "High-resolution timer"
-            select ESP_TIME_FUNCS_USE_ESP_TIMER
-        config ESP32S3_TIME_SYSCALL_USE_NONE
-            bool "None"
-            select ESP_TIME_FUNCS_USE_NONE
-    endchoice
-
-    choice ESP32S3_RTC_CLK_SRC
-        prompt "RTC clock source"
-        default ESP32S3_RTC_CLK_SRC_INT_RC
-        help
-            Choose which clock is used as RTC clock source.
-
-        config ESP32S3_RTC_CLK_SRC_INT_RC
-            bool "Internal 150kHz RC oscillator"
-        config ESP32S3_RTC_CLK_SRC_EXT_CRYS
-            bool "External 32kHz crystal"
-            select ESP_SYSTEM_RTC_EXT_XTAL
-        config ESP32S3_RTC_CLK_SRC_EXT_OSC
-            bool "External 32kHz oscillator at 32K_XP pin"
-            select ESP_SYSTEM_RTC_EXT_OSC
-        config ESP32S3_RTC_CLK_SRC_INT_8MD256
-            bool "Internal 8MHz oscillator, divided by 256 (~32kHz)"
-    endchoice
-
-    config ESP32S3_RTC_CLK_CAL_CYCLES
-        int "Number of cycles for RTC_SLOW_CLK calibration"
-        default 3000 if ESP32S3_RTC_CLK_SRC_EXT_CRYS || ESP32S3_RTC_CLK_SRC_EXT_OSC || ESP32S3_RTC_CLK_SRC_INT_8MD256
-        default 1024 if ESP32S3_RTC_CLK_SRC_INT_RC
-        range 0 27000 if ESP32S3_RTC_CLK_SRC_EXT_CRYS || ESP32S3_RTC_CLK_SRC_EXT_OSC || ESP32S3_RTC_CLK_SRC_INT_8MD256
-        range 0 32766 if ESP32S3_RTC_CLK_SRC_INT_RC
-        help
-            When the startup code initializes RTC_SLOW_CLK, it can perform
-            calibration by comparing the RTC_SLOW_CLK frequency with main XTAL
-            frequency. This option sets the number of RTC_SLOW_CLK cycles measured
-            by the calibration routine. Higher numbers increase calibration
-            precision, which may be important for applications which spend a lot of
-            time in deep sleep. Lower numbers reduce startup time.
 
-            When this option is set to 0, clock calibration will not be performed at
-            startup, and approximate clock frequencies will be assumed:
-
-            - 150000 Hz if internal RC oscillator is used as clock source. For this use value 1024.
-            - 32768 Hz if the 32k crystal oscillator is used. For this use value 3000 or more.
-              In case more value will help improve the definition of the launch of the crystal.
-              If the crystal could not start, it will be switched to internal RC.
 
     config ESP32S3_DEEP_SLEEP_WAKEUP_DELAY
         int "Extra delay in deep sleep wake stub (in us)"
@@ -404,14 +304,6 @@ menu "ESP32S3-Specific"
             If you are seeing "flash read err, 1000" message printed to the
             console after deep sleep reset, try increasing this value.
 
-    config ESP32S3_NO_BLOBS
-        bool "No Binary Blobs"
-        depends on !BT_ENABLED
-        default n
-        help
-            If enabled, this disables the linking of binary libraries in the application build. Note
-            that after enabling this Wi-Fi/Bluetooth will not work.
-
     config ESP32S3_RTCDATA_IN_FAST_MEM
         bool "Place RTC_DATA_ATTR and RTC_RODATA_ATTR variables into RTC fast memory segment"
         default n

components/esp32s3/sdkconfig.rename

@@ -1,5 +0,0 @@
-# sdkconfig replacement configurations for deprecated options formatted as
-# CONFIG_DEPRECATED_OPTION CONFIG_NEW_OPTION
-
-CONFIG_ESP32S3_TIME_SYSCALL_USE_RTC_FRC1            CONFIG_ESP32S3_TIME_SYSCALL_USE_RTC_SYSTIMER
-CONFIG_ESP32S3_TIME_SYSCALL_USE_FRC1                CONFIG_ESP32S3_TIME_SYSCALL_USE_SYSTIMER

components/esp_hw_support/Kconfig

@@ -36,10 +36,10 @@ menu "Hardware Settings"
 
         config ESP_SLEEP_GPIO_RESET_WORKAROUND
             bool "light sleep GPIO reset workaround"
-            default y if IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32S3
+            default y if IDF_TARGET_ESP32C2 || IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32S3
             select PM_SLP_DISABLE_GPIO if FREERTOS_USE_TICKLESS_IDLE
             help
-                esp32c3 and esp32s3 will reset at wake-up if GPIO is received a small electrostatic
+                esp32c2, esp32c3 and esp32s3 will reset at wake-up if GPIO is received a small electrostatic
                 pulse during light sleep, with specific condition
 
                 - GPIO needs to be configured as input-mode only
@@ -72,6 +72,8 @@ menu "Hardware Settings"
     endmenu
 
     menu "RTC Clock Config"
+        orsource "./port/$IDF_TARGET/Kconfig.rtc"
+
         # This is used for configure the RTC clock.
         config RTC_CLOCK_BBPLL_POWER_ON_WITH_USB
             bool "Keep BBPLL clock always work"
@@ -94,4 +96,8 @@ menu "Hardware Settings"
                 Place peripheral control functions (e.g. periph_module_reset) into IRAM,
                 so that these functions can be IRAM-safe and able to be called in the other IRAM interrupt context.
     endmenu
+
+    # Insert chip-specific HW config
+    orsource "./port/$IDF_TARGET/Kconfig.hw_support"
+
 endmenu

components/esp_hw_support/include/esp_sleep.h

@@ -107,7 +107,7 @@ esp_err_t esp_sleep_disable_wakeup_source(esp_sleep_source_t source);
  *       ext0 wakeup source is used.
  * @return
  *      - ESP_OK on success
- *      - ESP_ERR_NOT_SUPPORTED if additional current by touch (CONFIG_ESP32_RTC_EXT_CRYST_ADDIT_CURRENT) is enabled.
+ *      - ESP_ERR_NOT_SUPPORTED if additional current by touch (CONFIG_RTC_EXT_CRYST_ADDIT_CURRENT) is enabled.
  *      - ESP_ERR_INVALID_STATE if ULP co-processor is not enabled or if wakeup triggers conflict
  */
 esp_err_t esp_sleep_enable_ulp_wakeup(void);
@@ -138,7 +138,7 @@ esp_err_t esp_sleep_enable_timer_wakeup(uint64_t time_in_us);
  *
  * @return
  *      - ESP_OK on success
- *      - ESP_ERR_NOT_SUPPORTED if additional current by touch (CONFIG_ESP32_RTC_EXT_CRYST_ADDIT_CURRENT) is enabled.
+ *      - ESP_ERR_NOT_SUPPORTED if additional current by touch (CONFIG_RTC_EXT_CRYST_ADDIT_CURRENT) is enabled.
  *      - ESP_ERR_INVALID_STATE if wakeup triggers conflict
  */
 esp_err_t esp_sleep_enable_touchpad_wakeup(void);

components/esp_hw_support/port/esp32/Kconfig.hw_support

@@ -0,0 +1,24 @@
+choice ESP32_REV_MIN
+    prompt "Minimum Supported ESP32 Revision"
+    default ESP32_REV_MIN_0
+    help
+        Minimum revision that ESP-IDF would support.
+        ESP-IDF performs different strategy on different esp32 revision.
+
+    config ESP32_REV_MIN_0
+        bool "Rev 0"
+    config ESP32_REV_MIN_1
+        bool "Rev 1"
+    config ESP32_REV_MIN_2
+        bool "Rev 2"
+    config ESP32_REV_MIN_3
+        bool "Rev 3"
+        select ESP_INT_WDT if ESP32_ECO3_CACHE_LOCK_FIX
+endchoice
+
+config ESP32_REV_MIN
+    int
+    default 0 if ESP32_REV_MIN_0
+    default 1 if ESP32_REV_MIN_1
+    default 2 if ESP32_REV_MIN_2
+    default 3 if ESP32_REV_MIN_3

components/esp_hw_support/port/esp32/Kconfig.rtc

@@ -0,0 +1,96 @@
+choice RTC_CLK_SRC
+    prompt "RTC clock source"
+    default RTC_CLK_SRC_INT_RC
+    help
+        Choose which clock is used as RTC clock source.
+
+        - "Internal 150kHz oscillator" option provides lowest deep sleep current
+            consumption, and does not require extra external components. However
+            frequency stability with respect to temperature is poor, so time may
+            drift in deep/light sleep modes.
+        - "External 32kHz crystal" provides better frequency stability, at the
+            expense of slightly higher (1uA) deep sleep current consumption.
+        - "External 32kHz oscillator" allows using 32kHz clock generated by an
+            external circuit. In this case, external clock signal must be connected
+            to 32K_XN pin. Amplitude should be <1.2V in case of sine wave signal,
+            and <1V in case of square wave signal. Common mode voltage should be
+            0.1 < Vcm < 0.5Vamp, where Vamp is the signal amplitude.
+            Additionally, 1nF capacitor must be connected between 32K_XP pin and
+            ground. 32K_XP pin can not be used as a GPIO in this case.
+        - "Internal 8.5MHz oscillator divided by 256" option results in higher
+            deep sleep current (by 5uA) but has better frequency stability than
+            the internal 150kHz oscillator. It does not require external components.
+
+    config RTC_CLK_SRC_INT_RC
+        bool "Internal 150kHz RC oscillator"
+    config RTC_CLK_SRC_EXT_CRYS
+        bool "External 32kHz crystal"
+        select ESP_SYSTEM_RTC_EXT_XTAL
+    config RTC_CLK_SRC_EXT_OSC
+        bool "External 32kHz oscillator at 32K_XN pin"
+        select ESP_SYSTEM_RTC_EXT_OSC
+    config RTC_CLK_SRC_INT_8MD256
+        bool "Internal 8.5MHz oscillator, divided by 256 (~33kHz)"
+endchoice
+
+choice RTC_EXT_CRYST_ADDIT_CURRENT_METHOD
+    prompt "Additional current for external 32kHz crystal"
+    depends on RTC_CLK_SRC_EXT_CRYS
+    depends on ESP32_REV_MIN <= 1
+    default RTC_EXT_CRYST_ADDIT_CURRENT_NONE
+    help
+        With some 32kHz crystal configurations, the X32N and X32P pins may not have enough
+        drive strength to keep the crystal oscillating. Choose the method to provide
+        additional current from touchpad 9 to the external 32kHz crystal. Note that
+        the deep sleep current is slightly high (4-5uA) and the touchpad and the
+        wakeup sources of both touchpad and ULP are not available in method 1 and method 2.
+
+        This problem is fixed in ESP32 ECO 3, so this workaround is not needed. Setting the
+        project configuration to minimum revision ECO3 will disable this option, , allow
+        all wakeup sources, and save some code size.
+
+        - "None" option will not provide additional current to external crystal
+        - "Method 1" option can't ensure 100% to solve the external 32k crystal start failed
+            issue, but the touchpad can work in this method.
+        - "Method 2" option can solve the external 32k issue, but the touchpad can't work
+            in this method.
+
+    config RTC_EXT_CRYST_ADDIT_CURRENT_NONE
+        bool "None"
+    config RTC_EXT_CRYST_ADDIT_CURRENT
+        bool "Method 1"
+    config RTC_EXT_CRYST_ADDIT_CURRENT_V2
+        bool "Method 2"
+endchoice
+
+config RTC_CLK_CAL_CYCLES
+    int "Number of cycles for RTC_SLOW_CLK calibration"
+    default 3000 if RTC_CLK_SRC_EXT_CRYS || RTC_CLK_SRC_EXT_OSC || RTC_CLK_SRC_INT_8MD256
+    default 1024 if RTC_CLK_SRC_INT_RC
+    range 0 27000 if RTC_CLK_SRC_EXT_CRYS || RTC_CLK_SRC_EXT_OSC || RTC_CLK_SRC_INT_8MD256
+    range 0 32766 if RTC_CLK_SRC_INT_RC
+    help
+        When the startup code initializes RTC_SLOW_CLK, it can perform
+        calibration by comparing the RTC_SLOW_CLK frequency with main XTAL
+        frequency. This option sets the number of RTC_SLOW_CLK cycles measured
+        by the calibration routine. Higher numbers increase calibration
+        precision, which may be important for applications which spend a lot of
+        time in deep sleep. Lower numbers reduce startup time.
+
+        When this option is set to 0, clock calibration will not be performed at
+        startup, and approximate clock frequencies will be assumed:
+
+        - 150000 Hz if internal RC oscillator is used as clock source. For this use value 1024.
+        - 32768 Hz if the 32k crystal oscillator is used. For this use value 3000 or more.
+            In case more value will help improve the definition of the launch of the crystal.
+            If the crystal could not start, it will be switched to internal RC.
+
+config RTC_XTAL_CAL_RETRY
+    int "Number of attempts to repeat 32k XTAL calibration"
+    default 1
+    depends on RTC_CLK_SRC_EXT_CRYS
+    help
+        Number of attempts to repeat 32k XTAL calibration
+        before giving up and switching to the internal RC.
+        Increase this option if the 32k crystal oscillator
+        does not start and switches to internal RC.

components/esp_hw_support/port/esp32/rtc_clk.c

@@ -126,7 +126,7 @@ static void rtc_clk_32k_enable_common(int dac, int dres, int dbias)
     REG_SET_FIELD(RTC_IO_XTAL_32K_PAD_REG, RTC_IO_DRES_XTAL_32K, dres);
     REG_SET_FIELD(RTC_IO_XTAL_32K_PAD_REG, RTC_IO_DBIAS_XTAL_32K, dbias);
 
-#ifdef CONFIG_ESP32_RTC_EXT_CRYST_ADDIT_CURRENT
+#ifdef CONFIG_RTC_EXT_CRYST_ADDIT_CURRENT
     uint8_t chip_ver = efuse_hal_get_chip_revision();
     // version0 and version1 need provide additional current to external XTAL.
     if(chip_ver == 0 || chip_ver == 1) {
@@ -142,7 +142,7 @@ static void rtc_clk_32k_enable_common(int dac, int dres, int dbias)
         So the Touch DAC start to drive some current from VDD to TOUCH8(which is also XTAL-N)*/
         SET_PERI_REG_MASK(RTC_IO_TOUCH_PAD9_REG, RTC_IO_TOUCH_PAD9_XPD_M);
     }
-#elif defined CONFIG_ESP32_RTC_EXT_CRYST_ADDIT_CURRENT_V2
+#elif defined CONFIG_RTC_EXT_CRYST_ADDIT_CURRENT_V2
     uint8_t chip_ver = efuse_hal_get_chip_revision();
     if(chip_ver == 0 || chip_ver == 1) {
         /* TOUCH sensor can provide additional current to external XTAL.
@@ -176,13 +176,13 @@ void rtc_clk_32k_enable(bool enable)
         CLEAR_PERI_REG_MASK(RTC_IO_XTAL_32K_PAD_REG, RTC_IO_XPD_XTAL_32K_M);
         CLEAR_PERI_REG_MASK(RTC_IO_XTAL_32K_PAD_REG, RTC_IO_X32N_MUX_SEL | RTC_IO_X32P_MUX_SEL);
 
-#ifdef CONFIG_ESP32_RTC_EXT_CRYST_ADDIT_CURRENT
+#ifdef CONFIG_RTC_EXT_CRYST_ADDIT_CURRENT
         uint8_t chip_ver = efuse_hal_get_chip_revision();
         if(chip_ver == 0 || chip_ver == 1) {
             /* Power down TOUCH */
             CLEAR_PERI_REG_MASK(RTC_IO_TOUCH_PAD9_REG, RTC_IO_TOUCH_PAD9_XPD_M);
         }
-#elif defined CONFIG_ESP32_RTC_EXT_CRYST_ADDIT_CURRENT_V2
+#elif defined CONFIG_RTC_EXT_CRYST_ADDIT_CURRENT_V2
         uint8_t chip_ver = efuse_hal_get_chip_revision();
         if(chip_ver == 0 || chip_ver == 1) {
             /* Power down TOUCH */
@@ -826,7 +826,7 @@ void rtc_clk_apb_freq_update(uint32_t apb_freq)
 uint32_t rtc_clk_apb_freq_get(void)
 {
 #if CONFIG_IDF_ENV_FPGA
-    return CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ * MHZ;
+    return CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ * MHZ;
 #endif // CONFIG_IDF_ENV_FPGA
     uint32_t freq_hz = reg_val_to_clk_val(READ_PERI_REG(RTC_APB_FREQ_REG)) << 12;
     // round to the nearest MHz

components/esp_hw_support/port/esp32c2/Kconfig.rtc

@@ -0,0 +1,35 @@
+choice RTC_CLK_SRC
+    prompt "RTC clock source"
+    default RTC_CLK_SRC_INT_RC
+    help
+        Choose which clock is used as RTC clock source.
+
+    config RTC_CLK_SRC_INT_RC
+        bool "Internal 150kHz RC oscillator"
+    config RTC_CLK_SRC_EXT_OSC
+        bool "External 32kHz oscillator at 32K_XP pin"
+    config RTC_CLK_SRC_INT_8MD256
+        bool "Internal 8MHz oscillator, divided by 256 (~32kHz)"
+endchoice
+
+config RTC_CLK_CAL_CYCLES
+    int "Number of cycles for RTC_SLOW_CLK calibration"
+    default 3000 if RTC_CLK_SRC_EXT_OSC || RTC_CLK_SRC_INT_8MD256
+    default 1024 if RTC_CLK_SRC_INT_RC
+    range 0 27000 if RTC_CLK_SRC_EXT_OSC || RTC_CLK_SRC_INT_8MD256
+    range 0 32766 if RTC_CLK_SRC_INT_RC
+    help
+        When the startup code initializes RTC_SLOW_CLK, it can perform
+        calibration by comparing the RTC_SLOW_CLK frequency with main XTAL
+        frequency. This option sets the number of RTC_SLOW_CLK cycles measured
+        by the calibration routine. Higher numbers increase calibration
+        precision, which may be important for applications which spend a lot of
+        time in deep sleep. Lower numbers reduce startup time.
+
+        When this option is set to 0, clock calibration will not be performed at
+        startup, and approximate clock frequencies will be assumed:
+
+        - 150000 Hz if internal RC oscillator is used as clock source. For this use value 1024.
+        - 32768 Hz if the 32k crystal oscillator is used. For this use value 3000 or more.
+            In case more value will help improve the definition of the launch of the crystal.
+            If the crystal could not start, it will be switched to internal RC.

components/esp_hw_support/port/esp32c3/Kconfig.hw_support

@@ -0,0 +1,27 @@
+choice ESP32C3_REV_MIN
+    prompt "Minimum Supported ESP32-C3 Revision"
+    default ESP32C3_REV_MIN_3
+    help
+        Minimum revision that ESP-IDF would support.
+
+        Only supporting higher chip revisions can reduce binary size.
+
+    config ESP32C3_REV_MIN_0
+        bool "Rev 0"
+    config ESP32C3_REV_MIN_1
+        bool "Rev 1"
+    config ESP32C3_REV_MIN_2
+        bool "Rev 2"
+    config ESP32C3_REV_MIN_3
+        bool "Rev 3"
+    config ESP32C3_REV_MIN_4
+        bool "Rev 4"
+endchoice
+
+config ESP32C3_REV_MIN
+    int
+    default 0 if ESP32C3_REV_MIN_0
+    default 1 if ESP32C3_REV_MIN_1
+    default 2 if ESP32C3_REV_MIN_2
+    default 3 if ESP32C3_REV_MIN_3
+    default 4 if ESP32C3_REV_MIN_4

components/esp_hw_support/port/esp32c3/Kconfig.rtc

@@ -0,0 +1,39 @@
+choice RTC_CLK_SRC
+    prompt "RTC clock source"
+    default RTC_CLK_SRC_INT_RC
+    help
+        Choose which clock is used as RTC clock source.
+
+    config RTC_CLK_SRC_INT_RC
+        bool "Internal 150kHz RC oscillator"
+    config RTC_CLK_SRC_EXT_CRYS
+        bool "External 32kHz crystal"
+        select ESP_SYSTEM_RTC_EXT_XTAL
+    config RTC_CLK_SRC_EXT_OSC
+        bool "External 32kHz oscillator at 32K_XP pin"
+        select ESP_SYSTEM_RTC_EXT_OSC
+    config RTC_CLK_SRC_INT_8MD256
+        bool "Internal 8MHz oscillator, divided by 256 (~32kHz)"
+endchoice
+
+config RTC_CLK_CAL_CYCLES
+    int "Number of cycles for RTC_SLOW_CLK calibration"
+    default 3000 if RTC_CLK_SRC_EXT_CRYS || RTC_CLK_SRC_EXT_OSC || RTC_CLK_SRC_INT_8MD256
+    default 1024 if RTC_CLK_SRC_INT_RC
+    range 0 27000 if RTC_CLK_SRC_EXT_CRYS || RTC_CLK_SRC_EXT_OSC || RTC_CLK_SRC_INT_8MD256
+    range 0 32766 if RTC_CLK_SRC_INT_RC
+    help
+        When the startup code initializes RTC_SLOW_CLK, it can perform
+        calibration by comparing the RTC_SLOW_CLK frequency with main XTAL
+        frequency. This option sets the number of RTC_SLOW_CLK cycles measured
+        by the calibration routine. Higher numbers increase calibration
+        precision, which may be important for applications which spend a lot of
+        time in deep sleep. Lower numbers reduce startup time.
+
+        When this option is set to 0, clock calibration will not be performed at
+        startup, and approximate clock frequencies will be assumed:
+
+        - 150000 Hz if internal RC oscillator is used as clock source. For this use value 1024.
+        - 32768 Hz if the 32k crystal oscillator is used. For this use value 3000 or more.
+            In case more value will help improve the definition of the launch of the crystal.
+            If the crystal could not start, it will be switched to internal RC.

components/esp_hw_support/port/esp32h2/Kconfig.rtc

@@ -0,0 +1,38 @@
+choice RTC_CLK_SRC
+    prompt "RTC clock source"
+    default RTC_CLK_SRC_INT_RC
+    help
+        Choose which clock is used as RTC clock source.
+
+    config RTC_CLK_SRC_INT_RC
+        bool "Internal 150kHz RC oscillator"
+    config RTC_CLK_SRC_EXT_CRYS
+        bool "External 32.768kHz crystal"
+        select ESP_SYSTEM_RTC_EXT_XTAL
+    config RTC_CLK_SRC_EXT_OSC
+        bool "External 32kHz oscillator at 32K_XP pin"
+        select ESP_SYSTEM_RTC_EXT_OSC
+    config RTC_CLK_SRC_INT_8MD256
+        bool "Internal 8MHz oscillator, divided by 256 (~32kHz)"
+endchoice
+
+config RTC_CLK_CAL_CYCLES
+    int "Number of cycles for RTC_SLOW_CLK calibration"
+    default 3000 if RTC_CLK_SRC_EXT_CRYS || RTC_CLK_SRC_EXT_OSC || RTC_CLK_SRC_INT_8MD256
+    default 576 if RTC_CLK_SRC_INT_RC
+    range 0 125000
+    help
+        When the startup code initializes RTC_SLOW_CLK, it can perform
+        calibration by comparing the RTC_SLOW_CLK frequency with main XTAL
+        frequency. This option sets the number of RTC_SLOW_CLK cycles measured
+        by the calibration routine. Higher numbers increase calibration
+        precision, which may be important for applications which spend a lot of
+        time in deep sleep. Lower numbers reduce startup time.
+
+        When this option is set to 0, clock calibration will not be performed at
+        startup, and approximate clock frequencies will be assumed:
+
+        - 150000 Hz if internal RC oscillator is used as clock source. For this use value 1024.
+        - 32768 Hz if the 32k crystal oscillator is used. For this use value 3000 or more.
+            In case more value will help improve the definition of the launch of the crystal.
+            If the crystal could not start, it will be switched to internal RC.

components/esp_hw_support/port/esp32s2/Kconfig.rtc

@@ -0,0 +1,65 @@
+choice RTC_CLK_SRC
+    prompt "RTC clock source"
+    default RTC_CLK_SRC_INT_RC
+    help
+        Choose which clock is used as RTC clock source.
+
+        - "Internal 90kHz oscillator" option provides lowest deep sleep current
+            consumption, and does not require extra external components. However
+            frequency stability with respect to temperature is poor, so time may
+            drift in deep/light sleep modes.
+        - "External 32kHz crystal" provides better frequency stability, at the
+            expense of slightly higher (1uA) deep sleep current consumption.
+        - "External 32kHz oscillator" allows using 32kHz clock generated by an
+            external circuit. In this case, external clock signal must be connected
+            to 32K_XN pin. Amplitude should be <1.2V in case of sine wave signal,
+            and <1V in case of square wave signal. Common mode voltage should be
+            0.1 < Vcm < 0.5Vamp, where Vamp is the signal amplitude.
+            Additionally, 1nF capacitor must be connected between 32K_XP pin and
+            ground. 32K_XP pin can not be used as a GPIO in this case.
+        - "Internal 8MHz oscillator divided by 256" option results in higher
+            deep sleep current (by 5uA) but has better frequency stability than
+            the internal 90kHz oscillator. It does not require external components.
+
+    config RTC_CLK_SRC_INT_RC
+        bool "Internal 90kHz RC oscillator"
+    config RTC_CLK_SRC_EXT_CRYS
+        bool "External 32kHz crystal"
+        select ESP_SYSTEM_RTC_EXT_XTAL
+    config RTC_CLK_SRC_EXT_OSC
+        bool "External 32kHz oscillator at 32K_XN pin"
+        select ESP_SYSTEM_RTC_EXT_OSC
+    config RTC_CLK_SRC_INT_8MD256
+        bool "Internal 8MHz oscillator, divided by 256 (~32kHz)"
+endchoice
+
+config RTC_CLK_CAL_CYCLES
+    int "Number of cycles for RTC_SLOW_CLK calibration"
+    default 3000 if RTC_CLK_SRC_EXT_CRYS || RTC_CLK_SRC_EXT_OSC || RTC_CLK_SRC_INT_8MD256
+    default 576 if RTC_CLK_SRC_INT_RC
+    range 0 125000
+    help
+        When the startup code initializes RTC_SLOW_CLK, it can perform
+        calibration by comparing the RTC_SLOW_CLK frequency with main XTAL
+        frequency. This option sets the number of RTC_SLOW_CLK cycles measured
+        by the calibration routine. Higher numbers increase calibration
+        precision, which may be important for applications which spend a lot of
+        time in deep sleep. Lower numbers reduce startup time.
+
+        When this option is set to 0, clock calibration will not be performed at
+        startup, and approximate clock frequencies will be assumed:
+
+        - 90000 Hz if internal RC oscillator is used as clock source. For this use value 1024.
+        - 32768 Hz if the 32k crystal oscillator is used. For this use value 3000 or more.
+            In case more value will help improve the definition of the launch of the crystal.
+            If the crystal could not start, it will be switched to internal RC.
+
+config RTC_XTAL_CAL_RETRY
+    int "Number of attempts to repeat 32k XTAL calibration"
+    default 3
+    depends on RTC_CLK_SRC_EXT_CRYS
+    help
+        Number of attempts to repeat 32k XTAL calibration
+        before giving up and switching to the internal RC.
+        Increase this option if the 32k crystal oscillator
+        does not start and switches to internal RC.

components/esp_hw_support/port/esp32s3/Kconfig.rtc

@@ -0,0 +1,39 @@
+choice RTC_CLK_SRC
+    prompt "RTC clock source"
+    default RTC_CLK_SRC_INT_RC
+    help
+        Choose which clock is used as RTC clock source.
+
+    config RTC_CLK_SRC_INT_RC
+        bool "Internal 150kHz RC oscillator"
+    config RTC_CLK_SRC_EXT_CRYS
+        bool "External 32kHz crystal"
+        select ESP_SYSTEM_RTC_EXT_XTAL
+    config RTC_CLK_SRC_EXT_OSC
+        bool "External 32kHz oscillator at 32K_XP pin"
+        select ESP_SYSTEM_RTC_EXT_OSC
+    config RTC_CLK_SRC_INT_8MD256
+        bool "Internal 8MHz oscillator, divided by 256 (~32kHz)"
+endchoice
+
+config RTC_CLK_CAL_CYCLES
+    int "Number of cycles for RTC_SLOW_CLK calibration"
+    default 3000 if RTC_CLK_SRC_EXT_CRYS || RTC_CLK_SRC_EXT_OSC || RTC_CLK_SRC_INT_8MD256
+    default 1024 if RTC_CLK_SRC_INT_RC
+    range 0 27000 if RTC_CLK_SRC_EXT_CRYS || RTC_CLK_SRC_EXT_OSC || RTC_CLK_SRC_INT_8MD256
+    range 0 32766 if RTC_CLK_SRC_INT_RC
+    help
+        When the startup code initializes RTC_SLOW_CLK, it can perform
+        calibration by comparing the RTC_SLOW_CLK frequency with main XTAL
+        frequency. This option sets the number of RTC_SLOW_CLK cycles measured
+        by the calibration routine. Higher numbers increase calibration
+        precision, which may be important for applications which spend a lot of
+        time in deep sleep. Lower numbers reduce startup time.
+
+        When this option is set to 0, clock calibration will not be performed at
+        startup, and approximate clock frequencies will be assumed:
+
+        - 150000 Hz if internal RC oscillator is used as clock source. For this use value 1024.
+        - 32768 Hz if the 32k crystal oscillator is used. For this use value 3000 or more.
+            In case more value will help improve the definition of the launch of the crystal.
+            If the crystal could not start, it will be switched to internal RC.

components/esp_hw_support/sdkconfig.rename.esp32

@@ -0,0 +1,18 @@
+# sdkconfig replacement configurations for deprecated options formatted as
+# CONFIG_DEPRECATED_OPTION CONFIG_NEW_OPTION
+
+CONFIG_ESP32_RTC_CLK_SRC_INT_RC                         CONFIG_RTC_CLK_SRC_INT_RC
+CONFIG_ESP32_RTC_CLK_SRC_EXT_CRYS                       CONFIG_RTC_CLK_SRC_EXT_CRYS
+CONFIG_ESP32_RTC_CLK_SRC_EXT_OSC                        CONFIG_RTC_CLK_SRC_EXT_OSC
+CONFIG_ESP32_RTC_CLK_SRC_INT_8MD256                     CONFIG_RTC_CLK_SRC_INT_8MD256
+CONFIG_ESP32_RTC_EXT_CRYST_ADDIT_CURRENT_NONE           CONFIG_RTC_EXT_CRYST_ADDIT_CURRENT_NONE
+CONFIG_ESP32_RTC_EXT_CRYST_ADDIT_CURRENT                CONFIG_RTC_EXT_CRYST_ADDIT_CURRENT
+CONFIG_ESP32_RTC_EXT_CRYST_ADDIT_CURRENT_V2             CONFIG_RTC_EXT_CRYST_ADDIT_CURRENT_V2
+CONFIG_ESP32_RTC_CLK_CAL_CYCLES                         CONFIG_RTC_CLK_CAL_CYCLES
+CONFIG_ESP32_RTC_XTAL_CAL_RETRY                         CONFIG_RTC_XTAL_CAL_RETRY
+
+CONFIG_ESP32_RTC_EXTERNAL_CRYSTAL_ADDITIONAL_CURRENT    CONFIG_RTC_EXT_CRYST_ADDIT_CURRENT
+CONFIG_ESP32_RTC_CLOCK_SOURCE_INTERNAL_RC               CONFIG_RTC_CLK_SRC_INT_RC
+CONFIG_ESP32_RTC_CLOCK_SOURCE_EXTERNAL_CRYSTAL          CONFIG_RTC_CLK_SRC_EXT_CRYS
+CONFIG_ESP32_RTC_CLOCK_SOURCE_EXTERNAL_OSC              CONFIG_RTC_CLK_SRC_EXT_OSC
+CONFIG_ESP32_RTC_CLOCK_SOURCE_INTERNAL_8MD256           CONFIG_RTC_CLK_SRC_INT_8MD256

components/esp_hw_support/sdkconfig.rename.esp32c3

@@ -1 +1,9 @@
+# sdkconfig replacement configurations for deprecated options formatted as
+# CONFIG_DEPRECATED_OPTION CONFIG_NEW_OPTION
+
 CONFIG_ESP32C3_LIGHTSLEEP_GPIO_RESET_WORKAROUND         CONFIG_ESP_SLEEP_GPIO_RESET_WORKAROUND
+CONFIG_ESP32C3_RTC_CLK_SRC_INT_RC                       CONFIG_RTC_CLK_SRC_INT_RC
+CONFIG_ESP32C3_RTC_CLK_SRC_EXT_CRYS                     CONFIG_RTC_CLK_SRC_EXT_CRYS
+CONFIG_ESP32C3_RTC_CLK_SRC_EXT_OSC                      CONFIG_RTC_CLK_SRC_EXT_OSC
+CONFIG_ESP32C3_RTC_CLK_SRC_INT_8MD256                   CONFIG_RTC_CLK_SRC_INT_8MD256
+CONFIG_ESP32C3_RTC_CLK_CAL_CYCLES                       CONFIG_RTC_CLK_CAL_CYCLES

components/esp_hw_support/sdkconfig.rename.esp32h2

@@ -0,0 +1,8 @@
+# sdkconfig replacement configurations for deprecated options formatted as
+# CONFIG_DEPRECATED_OPTION CONFIG_NEW_OPTION
+
+CONFIG_ESP32H2_RTC_CLK_SRC_INT_RC                         CONFIG_RTC_CLK_SRC_INT_RC
+CONFIG_ESP32H2_RTC_CLK_SRC_EXT_CRYS                       CONFIG_RTC_CLK_SRC_EXT_CRYS
+CONFIG_ESP32H2_RTC_CLK_SRC_EXT_OSC                        CONFIG_RTC_CLK_SRC_EXT_OSC
+CONFIG_ESP32H2_RTC_CLK_SRC_INT_8MD256                     CONFIG_RTC_CLK_SRC_INT_8MD256
+CONFIG_ESP32H2_RTC_CLK_CAL_CYCLES                         CONFIG_RTC_CLK_CAL_CYCLES

components/esp_hw_support/sdkconfig.rename.esp32s2

@@ -0,0 +1,9 @@
+# sdkconfig replacement configurations for deprecated options formatted as
+# CONFIG_DEPRECATED_OPTION CONFIG_NEW_OPTION
+
+CONFIG_ESP32S2_RTC_CLK_SRC_INT_RC                         CONFIG_RTC_CLK_SRC_INT_RC
+CONFIG_ESP32S2_RTC_CLK_SRC_EXT_CRYS                       CONFIG_RTC_CLK_SRC_EXT_CRYS
+CONFIG_ESP32S2_RTC_CLK_SRC_EXT_OSC                        CONFIG_RTC_CLK_SRC_EXT_OSC
+CONFIG_ESP32S2_RTC_CLK_SRC_INT_8MD256                     CONFIG_RTC_CLK_SRC_INT_8MD256
+CONFIG_ESP32S2_RTC_CLK_CAL_CYCLES                         CONFIG_RTC_CLK_CAL_CYCLES
+CONFIG_ESP32S2_RTC_XTAL_CAL_RETRY                         CONFIG_RTC_XTAL_CAL_RETRY

components/esp_hw_support/sdkconfig.rename.esp32s3

@@ -0,0 +1,9 @@
+# sdkconfig replacement configurations for deprecated options formatted as
+# CONFIG_DEPRECATED_OPTION CONFIG_NEW_OPTION
+
+CONFIG_ESP32S3_RTC_CLK_SRC_INT_RC                         CONFIG_RTC_CLK_SRC_INT_RC
+CONFIG_ESP32S3_RTC_CLK_SRC_EXT_CRYS                       CONFIG_RTC_CLK_SRC_EXT_CRYS
+CONFIG_ESP32S3_RTC_CLK_SRC_EXT_OSC                        CONFIG_RTC_CLK_SRC_EXT_OSC
+CONFIG_ESP32S3_RTC_CLK_SRC_INT_8MD256                     CONFIG_RTC_CLK_SRC_INT_8MD256
+CONFIG_ESP32S3_RTC_CLK_CAL_CYCLES                         CONFIG_RTC_CLK_CAL_CYCLES
+CONFIG_ESP32S3_RTC_XTAL_CAL_RETRY                         CONFIG_RTC_XTAL_CAL_RETRY

components/esp_hw_support/sleep_modes.c

@@ -86,36 +86,30 @@
 #define RTC_CLK_SRC_CAL_CYCLES      (10)
 
 #ifdef CONFIG_IDF_TARGET_ESP32
-#define DEFAULT_CPU_FREQ_MHZ                CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ
 #define DEFAULT_SLEEP_OUT_OVERHEAD_US       (212)
 #define DEFAULT_HARDWARE_OUT_OVERHEAD_US    (60)
 #elif CONFIG_IDF_TARGET_ESP32S2
-#define DEFAULT_CPU_FREQ_MHZ                CONFIG_ESP32S2_DEFAULT_CPU_FREQ_MHZ
 #define DEFAULT_SLEEP_OUT_OVERHEAD_US       (147)
 #define DEFAULT_HARDWARE_OUT_OVERHEAD_US    (28)
 #elif CONFIG_IDF_TARGET_ESP32S3
-#define DEFAULT_CPU_FREQ_MHZ                CONFIG_ESP32S3_DEFAULT_CPU_FREQ_MHZ
 #define DEFAULT_SLEEP_OUT_OVERHEAD_US       (382)
 #define DEFAULT_HARDWARE_OUT_OVERHEAD_US    (133)
 #elif CONFIG_IDF_TARGET_ESP32C3
-#define DEFAULT_CPU_FREQ_MHZ                CONFIG_ESP32C3_DEFAULT_CPU_FREQ_MHZ
 #define DEFAULT_SLEEP_OUT_OVERHEAD_US       (105)
 #define DEFAULT_HARDWARE_OUT_OVERHEAD_US    (37)
 #elif CONFIG_IDF_TARGET_ESP32H2
-#define DEFAULT_CPU_FREQ_MHZ                CONFIG_ESP32H2_DEFAULT_CPU_FREQ_MHZ
 #define DEFAULT_SLEEP_OUT_OVERHEAD_US       (105)
 #define DEFAULT_HARDWARE_OUT_OVERHEAD_US    (37)
 #elif CONFIG_IDF_TARGET_ESP32C2
-#define DEFAULT_CPU_FREQ_MHZ                CONFIG_ESP32C2_DEFAULT_CPU_FREQ_MHZ
 #define DEFAULT_SLEEP_OUT_OVERHEAD_US       (105)
 #define DEFAULT_HARDWARE_OUT_OVERHEAD_US    (37)
 #endif
 
 #define LIGHT_SLEEP_TIME_OVERHEAD_US        DEFAULT_HARDWARE_OUT_OVERHEAD_US
 #ifdef CONFIG_ESP_SYSTEM_RTC_EXT_XTAL
-#define DEEP_SLEEP_TIME_OVERHEAD_US         (650 + 100 * 240 / DEFAULT_CPU_FREQ_MHZ)
+#define DEEP_SLEEP_TIME_OVERHEAD_US         (650 + 100 * 240 / CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ)
 #else
-#define DEEP_SLEEP_TIME_OVERHEAD_US         (250 + 100 * 240 / DEFAULT_CPU_FREQ_MHZ)
+#define DEEP_SLEEP_TIME_OVERHEAD_US         (250 + 100 * 240 / CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ)
 #endif
 
 #if defined(CONFIG_IDF_TARGET_ESP32) && defined(CONFIG_ESP32_DEEP_SLEEP_WAKEUP_DELAY)
@@ -636,7 +630,7 @@ esp_err_t esp_light_sleep_start(void)
 #ifdef CONFIG_ESP_SYSTEM_RTC_EXT_XTAL
     uint64_t time_per_us = 1000000ULL;
     s_config.rtc_clk_cal_period = (time_per_us << RTC_CLK_CAL_FRACT) / rtc_clk_slow_freq_get_hz();
-#elif defined(CONFIG_ESP32S2_RTC_CLK_SRC_INT_RC)
+#elif CONFIG_RTC_CLK_SRC_INT_RC && CONFIG_IDF_TARGET_ESP32S2
     s_config.rtc_clk_cal_period = rtc_clk_cal_cycling(RTC_CAL_RTC_MUX, RTC_CLK_SRC_CAL_CYCLES);
     esp_clk_slowclk_cal_set(s_config.rtc_clk_cal_period);
 #else
@@ -806,7 +800,7 @@ esp_err_t esp_sleep_enable_ulp_wakeup(void)
 #endif // CONFIG_ULP_COPROC_ENABLED
 
 #if CONFIG_IDF_TARGET_ESP32
-#if ((defined CONFIG_ESP32_RTC_EXT_CRYST_ADDIT_CURRENT) || (defined CONFIG_ESP32_RTC_EXT_CRYST_ADDIT_CURRENT_V2))
+#if ((defined CONFIG_RTC_EXT_CRYST_ADDIT_CURRENT) || (defined CONFIG_RTC_EXT_CRYST_ADDIT_CURRENT_V2))
     ESP_LOGE(TAG, "Failed to enable wakeup when provide current to external 32kHz crystal");
     return ESP_ERR_NOT_SUPPORTED;
 #endif
@@ -867,7 +861,7 @@ static void touch_wakeup_prepare(void)
 
 esp_err_t esp_sleep_enable_touchpad_wakeup(void)
 {
-#if ((defined CONFIG_ESP32_RTC_EXT_CRYST_ADDIT_CURRENT) || (defined CONFIG_ESP32_RTC_EXT_CRYST_ADDIT_CURRENT_V2))
+#if ((defined CONFIG_RTC_EXT_CRYST_ADDIT_CURRENT) || (defined CONFIG_RTC_EXT_CRYST_ADDIT_CURRENT_V2))
     ESP_LOGE(TAG, "Failed to enable wakeup when provide current to external 32kHz crystal");
     return ESP_ERR_NOT_SUPPORTED;
 #endif
@@ -1299,7 +1293,7 @@ static uint32_t get_power_down_flags(void)
         pd_flags |= RTC_SLEEP_PD_VDDSDIO;
     }
 
-#if ((defined CONFIG_ESP32_RTC_CLK_SRC_EXT_CRYS) && (defined CONFIG_ESP32_RTC_EXT_CRYST_ADDIT_CURRENT))
+#if ((defined CONFIG_RTC_CLK_SRC_EXT_CRYS) && (defined CONFIG_RTC_EXT_CRYST_ADDIT_CURRENT))
     if ((s_config.wakeup_triggers & (RTC_TOUCH_TRIG_EN | RTC_ULP_TRIG_EN)) == 0) {
         // If enabled EXT1 only and enable the additional current by touch, should be keep RTC_PERIPH power on.
         pd_flags &= ~RTC_SLEEP_PD_RTC_PERIPH;

components/esp_hw_support/test/test_rtc_clk.c

@@ -176,7 +176,7 @@ TEST_CASE("Test fast switching between PLL and XTAL", "[rtc_clk]")
 #if !IDF_CI_BUILD || !CONFIG_SPIRAM_BANKSWITCH_ENABLE
 
 #define COUNT_TEST      3
-#define TIMEOUT_TEST_MS (5 + CONFIG_ESP32_RTC_CLK_CAL_CYCLES / 16)
+#define TIMEOUT_TEST_MS (5 + CONFIG_RTC_CLK_CAL_CYCLES / 16)
 
 void stop_rtc_external_quartz(void){
     const uint8_t pin_32 = 32;
@@ -202,18 +202,18 @@ static void start_freq(rtc_slow_freq_t required_src_freq, uint32_t start_delay_m
     uint32_t end_time;
     rtc_slow_freq_t selected_src_freq;
     stop_rtc_external_quartz();
-#ifdef CONFIG_ESP32_RTC_CLK_SRC_EXT_CRYS
+#ifdef CONFIG_RTC_CLK_SRC_EXT_CRYS
     uint32_t bootstrap_cycles = CONFIG_ESP_SYSTEM_RTC_EXT_XTAL_BOOTSTRAP_CYCLES;
     printf("Test is started. Kconfig settings:\n External 32K crystal is selected,\n Oscillation cycles = %d,\n Calibration cycles = %d.\n",
             bootstrap_cycles,
-            CONFIG_ESP32_RTC_CLK_CAL_CYCLES);
+            CONFIG_RTC_CLK_CAL_CYCLES);
 #else
     uint32_t bootstrap_cycles = 5;
     printf("Test is started. Kconfig settings:\n Internal RC is selected,\n Oscillation cycles = %d,\n Calibration cycles = %d.\n",
             bootstrap_cycles,
-            CONFIG_ESP32_RTC_CLK_CAL_CYCLES);
-#endif // CONFIG_ESP32_RTC_CLK_SRC_EXT_CRYS
-    if (start_delay_ms == 0 && CONFIG_ESP32_RTC_CLK_CAL_CYCLES < 1500){
+            CONFIG_RTC_CLK_CAL_CYCLES);
+#endif // CONFIG_RTC_CLK_SRC_EXT_CRYS
+    if (start_delay_ms == 0 && CONFIG_RTC_CLK_CAL_CYCLES < 1500){
         start_delay_ms = 50;
         printf("Recommended increase Number of cycles for RTC_SLOW_CLK calibration to 3000!\n");
     }
@@ -263,18 +263,18 @@ TEST_CASE("Test starting external RTC quartz", "[rtc_clk][test_env=UT_T1_32kXTAL
     uint32_t start_time;
     uint32_t end_time;
     stop_rtc_external_quartz();
-#ifdef CONFIG_ESP32_RTC_CLK_SRC_EXT_CRYS
+#ifdef CONFIG_RTC_CLK_SRC_EXT_CRYS
     uint32_t bootstrap_cycles = CONFIG_ESP_SYSTEM_RTC_EXT_XTAL_BOOTSTRAP_CYCLES;
     printf("Test is started. Kconfig settings:\n External 32K crystal is selected,\n Oscillation cycles = %d,\n Calibration cycles = %d.\n",
             bootstrap_cycles,
-            CONFIG_ESP32_RTC_CLK_CAL_CYCLES);
+            CONFIG_RTC_CLK_CAL_CYCLES);
 #else
     uint32_t bootstrap_cycles = 5;
     printf("Test is started. Kconfig settings:\n Internal RC is selected,\n Oscillation cycles = %d,\n Calibration cycles = %d.\n",
             bootstrap_cycles,
-            CONFIG_ESP32_RTC_CLK_CAL_CYCLES);
-#endif // CONFIG_ESP32_RTC_CLK_SRC_EXT_CRYS
-    if (CONFIG_ESP32_RTC_CLK_CAL_CYCLES < 1500){
+            CONFIG_RTC_CLK_CAL_CYCLES);
+#endif // CONFIG_RTC_CLK_SRC_EXT_CRYS
+    if (CONFIG_RTC_CLK_CAL_CYCLES < 1500){
         printf("Recommended increase Number of cycles for RTC_SLOW_CLK calibration to 3000!\n");
     }
     while(i < COUNT_TEST){

components/esp_pm/pm_impl.c

@@ -79,24 +79,18 @@
 #if CONFIG_IDF_TARGET_ESP32
 /* Minimal divider at which REF_CLK_FREQ can be obtained */
 #define REF_CLK_DIV_MIN 10
-#define DEFAULT_CPU_FREQ CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ
 #elif CONFIG_IDF_TARGET_ESP32S2
 /* Minimal divider at which REF_CLK_FREQ can be obtained */
 #define REF_CLK_DIV_MIN 2
-#define DEFAULT_CPU_FREQ CONFIG_ESP32S2_DEFAULT_CPU_FREQ_MHZ
 #elif CONFIG_IDF_TARGET_ESP32S3
 /* Minimal divider at which REF_CLK_FREQ can be obtained */
 #define REF_CLK_DIV_MIN 2
-#define DEFAULT_CPU_FREQ CONFIG_ESP32S3_DEFAULT_CPU_FREQ_MHZ
 #elif CONFIG_IDF_TARGET_ESP32C3
 #define REF_CLK_DIV_MIN 2
-#define DEFAULT_CPU_FREQ CONFIG_ESP32C3_DEFAULT_CPU_FREQ_MHZ
 #elif CONFIG_IDF_TARGET_ESP32H2
 #define REF_CLK_DIV_MIN 2
-#define DEFAULT_CPU_FREQ CONFIG_ESP32H2_DEFAULT_CPU_FREQ_MHZ
 #elif CONFIG_IDF_TARGET_ESP32C2
 #define REF_CLK_DIV_MIN 2
-#define DEFAULT_CPU_FREQ CONFIG_ESP32C2_DEFAULT_CPU_FREQ_MHZ
 #endif
 
 #ifdef CONFIG_PM_PROFILING
@@ -760,7 +754,7 @@ void esp_pm_impl_init(void)
      * This will be modified later by a call to esp_pm_configure.
      */
     rtc_cpu_freq_config_t default_config;
-    if (!rtc_clk_cpu_freq_mhz_to_config(DEFAULT_CPU_FREQ, &default_config)) {
+    if (!rtc_clk_cpu_freq_mhz_to_config(CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ, &default_config)) {
         assert(false && "unsupported frequency");
     }
     for (size_t i = 0; i < PM_MODE_COUNT; ++i) {
@@ -782,7 +776,7 @@ void esp_pm_impl_init(void)
 #elif CONFIG_IDF_TARGET_ESP32C2
     esp_pm_config_esp32c2_t cfg = {
 #endif
-        .max_freq_mhz = DEFAULT_CPU_FREQ,
+        .max_freq_mhz = CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ,
         .min_freq_mhz = xtal_freq_mhz,
     };
 

components/esp_system/Kconfig

@@ -1,5 +1,7 @@
 
 menu "ESP System Settings"
+    # Insert chip-specific cpu config
+    rsource "./port/soc/$IDF_TARGET/Kconfig.cpu"
 
     choice ESP_SYSTEM_PANIC
         prompt "Panic handler behaviour"
@@ -48,7 +50,7 @@ menu "ESP System Settings"
 
     config ESP_SYSTEM_RTC_EXT_XTAL
         # This is a High Layer Kconfig option, invisible, can be selected by other Kconfig option
-        # e.g. It will be selected on when ESP32_RTC_CLK_SRC_EXT_CRYS is on
+        # e.g. It will be selected on when RTC_CLK_SRC_EXT_CRYS is on
         bool
         default n
 

components/esp_system/port/soc/esp32/Kconfig.cpu

@@ -0,0 +1,24 @@
+choice ESP_DEFAULT_CPU_FREQ_MHZ
+    prompt "CPU frequency"
+    default ESP_DEFAULT_CPU_FREQ_MHZ_40 if IDF_ENV_FPGA
+    default ESP_DEFAULT_CPU_FREQ_MHZ_160
+    help
+        CPU frequency to be set on application startup.
+
+    config ESP_DEFAULT_CPU_FREQ_MHZ_40
+        bool "40 MHz"
+        depends on IDF_ENV_FPGA
+    config ESP_DEFAULT_CPU_FREQ_MHZ_80
+        bool "80 MHz"
+    config ESP_DEFAULT_CPU_FREQ_MHZ_160
+        bool "160 MHz"
+    config ESP_DEFAULT_CPU_FREQ_MHZ_240
+        bool "240 MHz"
+endchoice
+
+config ESP_DEFAULT_CPU_FREQ_MHZ
+    int
+    default 40 if ESP_DEFAULT_CPU_FREQ_MHZ_40
+    default 80 if ESP_DEFAULT_CPU_FREQ_MHZ_80
+    default 160 if ESP_DEFAULT_CPU_FREQ_MHZ_160
+    default 240 if ESP_DEFAULT_CPU_FREQ_MHZ_240

components/esp_system/port/soc/esp32/clk.c

@@ -29,10 +29,10 @@ static const char* TAG = "clk";
  * Larger values increase startup delay. Smaller values may cause false positive
  * detection (i.e. oscillator runs for a few cycles and then stops).
  */
-#define SLOW_CLK_CAL_CYCLES     CONFIG_ESP32_RTC_CLK_CAL_CYCLES
+#define SLOW_CLK_CAL_CYCLES     CONFIG_RTC_CLK_CAL_CYCLES
 
-#ifdef CONFIG_ESP32_RTC_XTAL_CAL_RETRY
-#define RTC_XTAL_CAL_RETRY CONFIG_ESP32_RTC_XTAL_CAL_RETRY
+#ifdef CONFIG_RTC_XTAL_CAL_RETRY
+#define RTC_XTAL_CAL_RETRY CONFIG_RTC_XTAL_CAL_RETRY
 #else
 #define RTC_XTAL_CAL_RETRY 1
 #endif
@@ -149,11 +149,11 @@ static void select_rtc_slow_clk(slow_clk_sel_t slow_clk)
     wdt_hal_write_protect_enable(&rtc_wdt_ctx);
 #endif
 
-#if defined(CONFIG_ESP32_RTC_CLK_SRC_EXT_CRYS)
+#if defined(CONFIG_RTC_CLK_SRC_EXT_CRYS)
     select_rtc_slow_clk(SLOW_CLK_32K_XTAL);
-#elif defined(CONFIG_ESP32_RTC_CLK_SRC_EXT_OSC)
+#elif defined(CONFIG_RTC_CLK_SRC_EXT_OSC)
     select_rtc_slow_clk(SLOW_CLK_32K_EXT_OSC);
-#elif defined(CONFIG_ESP32_RTC_CLK_SRC_INT_8MD256)
+#elif defined(CONFIG_RTC_CLK_SRC_INT_8MD256)
     select_rtc_slow_clk(SLOW_CLK_8MD256);
 #else
     select_rtc_slow_clk(RTC_SLOW_FREQ_RTC);
@@ -172,7 +172,7 @@ static void select_rtc_slow_clk(slow_clk_sel_t slow_clk)
     rtc_cpu_freq_config_t new_config;
     rtc_clk_cpu_freq_get_config(&old_config);
     const uint32_t old_freq_mhz = old_config.freq_mhz;
-    const uint32_t new_freq_mhz = CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ;
+    const uint32_t new_freq_mhz = CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ;
 
     bool res = rtc_clk_cpu_freq_mhz_to_config(new_freq_mhz, &new_config);
     assert(res);

components/esp_system/port/soc/esp32/highint_hdl.S

@@ -1,16 +1,8 @@
-// Copyright 2015-2017 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
 
 #include <xtensa/coreasm.h>
@@ -315,7 +307,7 @@ xt_highintx:
     wsr     a2, depc                        /* temp storage */
 
     rsr.ccount  a2
-    addmi   a2, a2, (CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ*50)
+    addmi   a2, a2, (CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ*50)
     wsr     a2, CCOMPARE2
 
     /* Enable Integration Mode */

components/esp_system/port/soc/esp32c2/Kconfig.cpu

@@ -0,0 +1,21 @@
+choice ESP_DEFAULT_CPU_FREQ_MHZ
+    prompt "CPU frequency"
+    default ESP_DEFAULT_CPU_FREQ_MHZ_40 if IDF_ENV_FPGA
+    default ESP_DEFAULT_CPU_FREQ_MHZ_120
+    help
+        CPU frequency to be set on application startup.
+
+    config ESP_DEFAULT_CPU_FREQ_MHZ_40
+        bool "40 MHz"
+        depends on IDF_ENV_FPGA
+    config ESP_DEFAULT_CPU_FREQ_MHZ_80
+        bool "80 MHz"
+    config ESP_DEFAULT_CPU_FREQ_MHZ_120
+        bool "120 MHz"
+endchoice
+
+config ESP_DEFAULT_CPU_FREQ_MHZ
+    int
+    default 40 if ESP_DEFAULT_CPU_FREQ_MHZ_40
+    default 80 if ESP_DEFAULT_CPU_FREQ_MHZ_80
+    default 120 if ESP_DEFAULT_CPU_FREQ_MHZ_120

components/esp_system/port/soc/esp32c2/clk.c

@@ -32,7 +32,7 @@
  * Larger values increase startup delay. Smaller values may cause false positive
  * detection (i.e. oscillator runs for a few cycles and then stops).
  */
-#define SLOW_CLK_CAL_CYCLES     CONFIG_ESP32C2_RTC_CLK_CAL_CYCLES
+#define SLOW_CLK_CAL_CYCLES     CONFIG_RTC_CLK_CAL_CYCLES
 
 #define MHZ (1000000)
 
@@ -93,9 +93,9 @@ static const char *TAG = "clk";
     wdt_hal_write_protect_enable(&rtc_wdt_ctx);
 #endif
 
-#if defined(CONFIG_ESP32C2_RTC_CLK_SRC_EXT_OSC)
+#if defined(CONFIG_RTC_CLK_SRC_EXT_OSC)
     select_rtc_slow_clk(SLOW_CLK_32K_EXT_OSC);
-#elif defined(CONFIG_ESP32C2_RTC_CLK_SRC_INT_8MD256)
+#elif defined(CONFIG_RTC_CLK_SRC_INT_8MD256)
     select_rtc_slow_clk(SLOW_CLK_8MD256);
 #else
     select_rtc_slow_clk(RTC_SLOW_FREQ_RTC);
@@ -113,7 +113,7 @@ static const char *TAG = "clk";
     rtc_cpu_freq_config_t old_config, new_config;
     rtc_clk_cpu_freq_get_config(&old_config);
     const uint32_t old_freq_mhz = old_config.freq_mhz;
-    const uint32_t new_freq_mhz = CONFIG_ESP32C2_DEFAULT_CPU_FREQ_MHZ;
+    const uint32_t new_freq_mhz = CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ;
 
     bool res = rtc_clk_cpu_freq_mhz_to_config(new_freq_mhz, &new_config);
     assert(res);

components/esp_system/port/soc/esp32c3/Kconfig.cpu

@@ -0,0 +1,21 @@
+choice ESP_DEFAULT_CPU_FREQ_MHZ
+    prompt "CPU frequency"
+    default ESP_DEFAULT_CPU_FREQ_MHZ_40 if IDF_ENV_FPGA
+    default ESP_DEFAULT_CPU_FREQ_MHZ_160
+    help
+        CPU frequency to be set on application startup.
+
+    config ESP_DEFAULT_CPU_FREQ_MHZ_40
+        bool "40 MHz"
+        depends on IDF_ENV_FPGA
+    config ESP_DEFAULT_CPU_FREQ_MHZ_80
+        bool "80 MHz"
+    config ESP_DEFAULT_CPU_FREQ_MHZ_160
+        bool "160 MHz"
+endchoice
+
+config ESP_DEFAULT_CPU_FREQ_MHZ
+    int
+    default 40 if ESP_DEFAULT_CPU_FREQ_MHZ_40
+    default 80 if ESP_DEFAULT_CPU_FREQ_MHZ_80
+    default 160 if ESP_DEFAULT_CPU_FREQ_MHZ_160

components/esp_system/port/soc/esp32c3/clk.c

@@ -33,7 +33,7 @@
  * Larger values increase startup delay. Smaller values may cause false positive
  * detection (i.e. oscillator runs for a few cycles and then stops).
  */
-#define SLOW_CLK_CAL_CYCLES     CONFIG_ESP32C3_RTC_CLK_CAL_CYCLES
+#define SLOW_CLK_CAL_CYCLES     CONFIG_RTC_CLK_CAL_CYCLES
 
 #define MHZ (1000000)
 
@@ -94,11 +94,11 @@ static const char *TAG = "clk";
     wdt_hal_write_protect_enable(&rtc_wdt_ctx);
 #endif
 
-#if defined(CONFIG_ESP32C3_RTC_CLK_SRC_EXT_CRYS)
+#if defined(CONFIG_RTC_CLK_SRC_EXT_CRYS)
     select_rtc_slow_clk(SLOW_CLK_32K_XTAL);
-#elif defined(CONFIG_ESP32C3_RTC_CLK_SRC_EXT_OSC)
+#elif defined(CONFIG_RTC_CLK_SRC_EXT_OSC)
     select_rtc_slow_clk(SLOW_CLK_32K_EXT_OSC);
-#elif defined(CONFIG_ESP32C3_RTC_CLK_SRC_INT_8MD256)
+#elif defined(CONFIG_RTC_CLK_SRC_INT_8MD256)
     select_rtc_slow_clk(SLOW_CLK_8MD256);
 #else
     select_rtc_slow_clk(RTC_SLOW_FREQ_RTC);
@@ -116,7 +116,7 @@ static const char *TAG = "clk";
     rtc_cpu_freq_config_t old_config, new_config;
     rtc_clk_cpu_freq_get_config(&old_config);
     const uint32_t old_freq_mhz = old_config.freq_mhz;
-    const uint32_t new_freq_mhz = CONFIG_ESP32C3_DEFAULT_CPU_FREQ_MHZ;
+    const uint32_t new_freq_mhz = CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ;
 
     bool res = rtc_clk_cpu_freq_mhz_to_config(new_freq_mhz, &new_config);
     assert(res);

components/esp_system/port/soc/esp32h2/Kconfig.cpu

@@ -0,0 +1,27 @@
+choice ESP_DEFAULT_CPU_FREQ_MHZ
+    prompt "CPU frequency"
+    default ESP_DEFAULT_CPU_FREQ_MHZ_64 if IDF_ENV_FPGA
+    default ESP_DEFAULT_CPU_FREQ_MHZ_96 if !IDF_ENV_FPGA
+    help
+        CPU frequency to be set on application startup.
+
+    config ESP_DEFAULT_CPU_FREQ_MHZ_16
+        bool "16 MHz"
+        depends on IDF_ENV_FPGA     #ESP32H2-TODO: IDF-3786
+    config ESP_DEFAULT_CPU_FREQ_MHZ_32
+        bool "32 MHz"
+        depends on IDF_ENV_FPGA     #ESP32H2-TODO: IDF-3786
+    config ESP_DEFAULT_CPU_FREQ_MHZ_64
+        bool "64 MHz"
+        depends on IDF_ENV_FPGA     #ESP32H2-TODO: IDF-3786
+    config ESP_DEFAULT_CPU_FREQ_MHZ_96
+        bool "96 MHz"
+        depends on !IDF_ENV_FPGA
+endchoice
+
+config ESP_DEFAULT_CPU_FREQ_MHZ
+    int
+    default 16 if ESP_DEFAULT_CPU_FREQ_MHZ_16
+    default 32 if ESP_DEFAULT_CPU_FREQ_MHZ_32
+    default 64 if ESP_DEFAULT_CPU_FREQ_MHZ_64
+    default 96 if ESP_DEFAULT_CPU_FREQ_MHZ_96

components/esp_system/port/soc/esp32h2/clk.c

@@ -33,7 +33,7 @@
  * Larger values increase startup delay. Smaller values may cause false positive
  * detection (i.e. oscillator runs for a few cycles and then stops).
  */
-#define SLOW_CLK_CAL_CYCLES     CONFIG_ESP32H2_RTC_CLK_CAL_CYCLES
+#define SLOW_CLK_CAL_CYCLES     CONFIG_RTC_CLK_CAL_CYCLES
 
 #define MHZ (1000000)
 
@@ -92,11 +92,11 @@ static const char *TAG = "clk";
     wdt_hal_write_protect_enable(&rtc_wdt_ctx);
 #endif
 
-#if defined(CONFIG_ESP32H2_RTC_CLK_SRC_EXT_CRYS)
+#if defined(CONFIG_RTC_CLK_SRC_EXT_CRYS)
     select_rtc_slow_clk(SLOW_CLK_32K_XTAL);
-#elif defined(CONFIG_ESP32H2_RTC_CLK_SRC_EXT_OSC)
+#elif defined(CONFIG_RTC_CLK_SRC_EXT_OSC)
     select_rtc_slow_clk(SLOW_CLK_32K_EXT_OSC);
-#elif defined(CONFIG_ESP32H2_RTC_CLK_SRC_INT_8MD256)
+#elif defined(CONFIG_RTC_CLK_SRC_INT_8MD256)
     select_rtc_slow_clk(SLOW_CLK_8MD256);
 #else
     select_rtc_slow_clk(RTC_SLOW_FREQ_RTC);
@@ -114,7 +114,7 @@ static const char *TAG = "clk";
     rtc_cpu_freq_config_t old_config, new_config;
     rtc_clk_cpu_freq_get_config(&old_config);
     const uint32_t old_freq_mhz = old_config.freq_mhz;
-    const uint32_t new_freq_mhz = CONFIG_ESP32H2_DEFAULT_CPU_FREQ_MHZ;
+    const uint32_t new_freq_mhz = CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ;
 
     bool res = rtc_clk_cpu_freq_mhz_to_config(new_freq_mhz, &new_config);
     assert(res);

components/esp_system/port/soc/esp32s2/Kconfig.cpu

@@ -0,0 +1,24 @@
+choice ESP_DEFAULT_CPU_FREQ_MHZ
+    prompt "CPU frequency"
+    default ESP_DEFAULT_CPU_FREQ_MHZ_40 if IDF_ENV_FPGA
+    default ESP_DEFAULT_CPU_FREQ_MHZ_160
+    help
+        CPU frequency to be set on application startup.
+
+    config ESP_DEFAULT_CPU_FREQ_MHZ_40
+        bool "40 MHz"
+        depends on IDF_ENV_FPGA
+    config ESP_DEFAULT_CPU_FREQ_MHZ_80
+        bool "80 MHz"
+    config ESP_DEFAULT_CPU_FREQ_MHZ_160
+        bool "160 MHz"
+    config ESP_DEFAULT_CPU_FREQ_MHZ_240
+        bool "240 MHz"
+endchoice
+
+config ESP_DEFAULT_CPU_FREQ_MHZ
+    int
+    default 40 if ESP_DEFAULT_CPU_FREQ_MHZ_40
+    default 80 if ESP_DEFAULT_CPU_FREQ_MHZ_80
+    default 160 if ESP_DEFAULT_CPU_FREQ_MHZ_160
+    default 240 if ESP_DEFAULT_CPU_FREQ_MHZ_240

components/esp_system/port/soc/esp32s2/clk.c

@@ -34,10 +34,10 @@ static const char *TAG = "clk";
  * Larger values increase startup delay. Smaller values may cause false positive
  * detection (i.e. oscillator runs for a few cycles and then stops).
  */
-#define SLOW_CLK_CAL_CYCLES     CONFIG_ESP32S2_RTC_CLK_CAL_CYCLES
+#define SLOW_CLK_CAL_CYCLES     CONFIG_RTC_CLK_CAL_CYCLES
 
-#ifdef CONFIG_ESP32S2_RTC_XTAL_CAL_RETRY
-#define RTC_XTAL_CAL_RETRY CONFIG_ESP32S2_RTC_XTAL_CAL_RETRY
+#ifdef CONFIG_RTC_XTAL_CAL_RETRY
+#define RTC_XTAL_CAL_RETRY CONFIG_RTC_XTAL_CAL_RETRY
 #else
 #define RTC_XTAL_CAL_RETRY 1
 #endif
@@ -91,11 +91,11 @@ static void select_rtc_slow_clk(slow_clk_sel_t slow_clk);
     wdt_hal_write_protect_enable(&rtc_wdt_ctx);
 #endif
 
-#if defined(CONFIG_ESP32S2_RTC_CLK_SRC_EXT_CRYS)
+#if defined(CONFIG_RTC_CLK_SRC_EXT_CRYS)
     select_rtc_slow_clk(SLOW_CLK_32K_XTAL);
-#elif defined(CONFIG_ESP32S2_RTC_CLK_SRC_EXT_OSC)
+#elif defined(CONFIG_RTC_CLK_SRC_EXT_OSC)
     select_rtc_slow_clk(SLOW_CLK_32K_EXT_OSC);
-#elif defined(CONFIG_ESP32S2_RTC_CLK_SRC_INT_8MD256)
+#elif defined(CONFIG_RTC_CLK_SRC_INT_8MD256)
     select_rtc_slow_clk(SLOW_CLK_8MD256);
 #else
     select_rtc_slow_clk(RTC_SLOW_FREQ_RTC);
@@ -113,7 +113,7 @@ static void select_rtc_slow_clk(slow_clk_sel_t slow_clk);
     rtc_cpu_freq_config_t old_config, new_config;
     rtc_clk_cpu_freq_get_config(&old_config);
     const uint32_t old_freq_mhz = old_config.freq_mhz;
-    const uint32_t new_freq_mhz = CONFIG_ESP32S2_DEFAULT_CPU_FREQ_MHZ;
+    const uint32_t new_freq_mhz = CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ;
 
     bool res = rtc_clk_cpu_freq_mhz_to_config(new_freq_mhz, &new_config);
     assert(res);

components/esp_system/port/soc/esp32s3/Kconfig.cpu

@@ -0,0 +1,24 @@
+choice ESP_DEFAULT_CPU_FREQ_MHZ
+    prompt "CPU frequency"
+    default ESP_DEFAULT_CPU_FREQ_MHZ_40 if IDF_ENV_FPGA
+    default ESP_DEFAULT_CPU_FREQ_MHZ_160
+    help
+        CPU frequency to be set on application startup.
+
+    config ESP_DEFAULT_CPU_FREQ_MHZ_40
+        bool "40 MHz"
+        depends on IDF_ENV_FPGA
+    config ESP_DEFAULT_CPU_FREQ_MHZ_80
+        bool "80 MHz"
+    config ESP_DEFAULT_CPU_FREQ_MHZ_160
+        bool "160 MHz"
+    config ESP_DEFAULT_CPU_FREQ_MHZ_240
+        bool "240 MHz"
+endchoice
+
+config ESP_DEFAULT_CPU_FREQ_MHZ
+    int
+    default 40 if ESP_DEFAULT_CPU_FREQ_MHZ_40
+    default 80 if ESP_DEFAULT_CPU_FREQ_MHZ_80
+    default 160 if ESP_DEFAULT_CPU_FREQ_MHZ_160
+    default 240 if ESP_DEFAULT_CPU_FREQ_MHZ_240

components/esp_system/port/soc/esp32s3/clk.c

@@ -33,7 +33,7 @@ static const char *TAG = "clk";
  * Larger values increase startup delay. Smaller values may cause false positive
  * detection (i.e. oscillator runs for a few cycles and then stops).
  */
-#define SLOW_CLK_CAL_CYCLES     CONFIG_ESP32S3_RTC_CLK_CAL_CYCLES
+#define SLOW_CLK_CAL_CYCLES     CONFIG_RTC_CLK_CAL_CYCLES
 
 #define RTC_XTAL_CAL_RETRY 1
 
@@ -90,11 +90,11 @@ static void select_rtc_slow_clk(slow_clk_sel_t slow_clk);
     wdt_hal_write_protect_enable(&rtc_wdt_ctx);
 #endif
 
-#if defined(CONFIG_ESP32S3_RTC_CLK_SRC_EXT_CRYS)
+#if defined(CONFIG_RTC_CLK_SRC_EXT_CRYS)
     select_rtc_slow_clk(SLOW_CLK_32K_XTAL);
-#elif defined(CONFIG_ESP32S3_RTC_CLK_SRC_EXT_OSC)
+#elif defined(CONFIG_RTC_CLK_SRC_EXT_OSC)
     select_rtc_slow_clk(SLOW_CLK_32K_EXT_OSC);
-#elif defined(CONFIG_ESP32S3_RTC_CLK_SRC_INT_8MD256)
+#elif defined(CONFIG_RTC_CLK_SRC_INT_8MD256)
     select_rtc_slow_clk(SLOW_CLK_8MD256);
 #else
     select_rtc_slow_clk(RTC_SLOW_FREQ_RTC);
@@ -112,7 +112,7 @@ static void select_rtc_slow_clk(slow_clk_sel_t slow_clk);
     rtc_cpu_freq_config_t old_config, new_config;
     rtc_clk_cpu_freq_get_config(&old_config);
     const uint32_t old_freq_mhz = old_config.freq_mhz;
-    const uint32_t new_freq_mhz = CONFIG_ESP32S3_DEFAULT_CPU_FREQ_MHZ;
+    const uint32_t new_freq_mhz = CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ;
 
     bool res = rtc_clk_cpu_freq_mhz_to_config(new_freq_mhz, &new_config);
     assert(res);

components/esp_system/sdkconfig.rename.esp32

@@ -8,6 +8,7 @@ CONFIG_ESP32_PANIC_SILENT_REBOOT                        CONFIG_ESP_SYSTEM_PANIC_
 CONFIG_ESP32_PANIC_GDBSTUB                              CONFIG_ESP_SYSTEM_PANIC_GDBSTUB
 CONFIG_ESP32_ALLOW_RTC_FAST_MEM_AS_HEAP                 CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP
 CONFIG_ESP32_DEBUG_OCDAWARE                             CONFIG_ESP_DEBUG_OCDAWARE
+CONFIG_ESP32_NO_BLOBS                                   CONFIG_APP_NO_BLOBS
 
 CONFIG_ESP32_BROWNOUT_DET                               CONFIG_ESP_BROWNOUT_DET
 CONFIG_ESP32_BROWNOUT_DET_LVL_SEL                       CONFIG_ESP_BROWNOUT_DET_LVL_SEL
@@ -20,3 +21,9 @@ CONFIG_ESP32_BROWNOUT_DET_LVL_SEL_5                     CONFIG_ESP_BROWNOUT_DET_
 CONFIG_ESP32_BROWNOUT_DET_LVL_SEL_6                     CONFIG_ESP_BROWNOUT_DET_LVL_SEL_6
 CONFIG_ESP32_BROWNOUT_DET_LVL_SEL_7                     CONFIG_ESP_BROWNOUT_DET_LVL_SEL_7
 CONFIG_ESP32_BROWNOUT_DET_LVL                           CONFIG_ESP_BROWNOUT_DET_LVL
+
+CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ                       CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ
+CONFIG_ESP32_DEFAULT_CPU_FREQ_40                        CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_40
+CONFIG_ESP32_DEFAULT_CPU_FREQ_80                        CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_80
+CONFIG_ESP32_DEFAULT_CPU_FREQ_160                       CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_160
+CONFIG_ESP32_DEFAULT_CPU_FREQ_240                       CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_240

components/esp_system/sdkconfig.rename.esp32c3

@@ -17,3 +17,8 @@ CONFIG_ESP32C3_BROWNOUT_DET_LVL_SEL_5                   CONFIG_ESP_BROWNOUT_DET_
 CONFIG_ESP32C3_BROWNOUT_DET_LVL_SEL_6                   CONFIG_ESP_BROWNOUT_DET_LVL_SEL_6
 CONFIG_ESP32C3_BROWNOUT_DET_LVL_SEL_7                   CONFIG_ESP_BROWNOUT_DET_LVL_SEL_7
 CONFIG_ESP32C3_BROWNOUT_DET_LVL                         CONFIG_ESP_BROWNOUT_DET_LVL
+
+CONFIG_ESP32C3_DEFAULT_CPU_FREQ_MHZ                     CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ
+CONFIG_ESP32C3_DEFAULT_CPU_FREQ_40                      CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_40
+CONFIG_ESP32C3_DEFAULT_CPU_FREQ_80                      CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_80
+CONFIG_ESP32C3_DEFAULT_CPU_FREQ_160                     CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_160

components/esp_system/sdkconfig.rename.esp32h2

@@ -3,3 +3,9 @@
 
 CONFIG_ESP32H2_MEMPROT_FEATURE                          CONFIG_ESP_SYSTEM_MEMPROT_FEATURE
 CONFIG_ESP32H2_MEMPROT_FEATURE_LOCK                     CONFIG_ESP_SYSTEM_MEMPROT_FEATURE_LOCK
+
+CONFIG_ESP32H2_DEFAULT_CPU_FREQ_MHZ                     CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ
+CONFIG_ESP32H2_DEFAULT_CPU_FREQ_16                      CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_16
+CONFIG_ESP32H2_DEFAULT_CPU_FREQ_32                      CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_32
+CONFIG_ESP32H2_DEFAULT_CPU_FREQ_64                      CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_64
+CONFIG_ESP32H2_DEFAULT_CPU_FREQ_96                      CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_96

components/esp_system/sdkconfig.rename.esp32s2

@@ -10,6 +10,7 @@ CONFIG_ESP32S2_MEMPROT_FEATURE                          CONFIG_ESP_SYSTEM_MEMPRO
 CONFIG_ESP32S2_MEMPROT_FEATURE_LOCK                     CONFIG_ESP_SYSTEM_MEMPROT_FEATURE_LOCK
 CONFIG_ESP32S2_ALLOW_RTC_FAST_MEM_AS_HEAP               CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP
 CONFIG_ESP32S2_DEBUG_OCDAWARE                           CONFIG_ESP_DEBUG_OCDAWARE
+CONFIG_ESP32S2_NO_BLOBS                                 CONFIG_APP_NO_BLOBS
 
 CONFIG_ESP32S2_BROWNOUT_DET                             CONFIG_ESP_BROWNOUT_DET
 CONFIG_ESP32S2_BROWNOUT_DET                             CONFIG_ESP_BROWNOUT_DET
@@ -23,3 +24,9 @@ CONFIG_ESP32S2_BROWNOUT_DET_LVL_SEL_5                   CONFIG_ESP_BROWNOUT_DET_
 CONFIG_ESP32S2_BROWNOUT_DET_LVL_SEL_6                   CONFIG_ESP_BROWNOUT_DET_LVL_SEL_6
 CONFIG_ESP32S2_BROWNOUT_DET_LVL_SEL_7                   CONFIG_ESP_BROWNOUT_DET_LVL_SEL_7
 CONFIG_ESP32S2_BROWNOUT_DET_LVL                         CONFIG_ESP_BROWNOUT_DET_LVL
+
+CONFIG_ESP32S2_DEFAULT_CPU_FREQ_MHZ                     CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ
+CONFIG_ESP32S2_DEFAULT_CPU_FREQ_40                      CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_40
+CONFIG_ESP32S2_DEFAULT_CPU_FREQ_80                      CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_80
+CONFIG_ESP32S2_DEFAULT_CPU_FREQ_160                     CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_160
+CONFIG_ESP32S2_DEFAULT_CPU_FREQ_240                     CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_240

components/esp_system/sdkconfig.rename.esp32s3

@@ -15,3 +15,9 @@ CONFIG_ESP32S3_BROWNOUT_DET_LVL_SEL_5                   CONFIG_ESP_BROWNOUT_DET_
 CONFIG_ESP32S3_BROWNOUT_DET_LVL_SEL_6                   CONFIG_ESP_BROWNOUT_DET_LVL_SEL_6
 CONFIG_ESP32S3_BROWNOUT_DET_LVL_SEL_7                   CONFIG_ESP_BROWNOUT_DET_LVL_SEL_7
 CONFIG_ESP32S3_BROWNOUT_DET_LVL                         CONFIG_ESP_BROWNOUT_DET_LVL
+
+CONFIG_ESP32S3_DEFAULT_CPU_FREQ_MHZ                     CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ
+CONFIG_ESP32S3_DEFAULT_CPU_FREQ_40                      CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_40
+CONFIG_ESP32S3_DEFAULT_CPU_FREQ_80                      CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_80
+CONFIG_ESP32S3_DEFAULT_CPU_FREQ_160                     CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_160
+CONFIG_ESP32S3_DEFAULT_CPU_FREQ_240                     CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_240

components/freertos/FreeRTOS-Kernel-SMP/portable/xtensa/include/freertos/FreeRTOSConfig_smp.h

@@ -128,7 +128,7 @@ This file get's pulled into assembly sources. Therefore, some includes need to b
 #define configUSE_PREEMPTION                            1
 #define configUSE_TASK_PREEMPTION_DISABLE               1
 #define configUSE_TICKLESS_IDLE                         0
-#define configCPU_CLOCK_HZ                              (CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ * 1000000)
+#define configCPU_CLOCK_HZ                              (CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ * 1000000)
 #define configTICK_RATE_HZ                              CONFIG_FREERTOS_HZ
 #define configMAX_PRIORITIES                            ( 25 )  //This has impact on speed of search for highest priority
 #define configMINIMAL_STACK_SIZE                        ( 768 + configSTACK_OVERHEAD_TOTAL )

components/freertos/FreeRTOS-Kernel/portable/port_common.c

@@ -68,7 +68,7 @@ void esp_startup_start_app_common(void)
 
     esp_crosscore_int_init();
 
-#if CONFIG_ESP_SYSTEM_GDBSTUB_RUNTIME && !CONFIG_IDF_TARGET_ESP8684
+#if CONFIG_ESP_SYSTEM_GDBSTUB_RUNTIME && !CONFIG_IDF_TARGET_ESP32C2
     esp_gdbstub_init();
 #endif // CONFIG_ESP_SYSTEM_GDBSTUB_RUNTIME
 

components/freertos/Kconfig

@@ -383,7 +383,7 @@ menu "FreeRTOS"
             help
                 CPU Clock will be used as the clock source for the generation of run
                 time stats. The CPU Clock has a frequency dependent on
-                ESP32_DEFAULT_CPU_FREQ_MHZ and Dynamic Frequency Scaling (DFS).
+                ESP_DEFAULT_CPU_FREQ_MHZ and Dynamic Frequency Scaling (DFS).
                 Therefore the CPU Clock frequency can fluctuate between 80 to 240MHz.
                 Run time stats generated using the CPU Clock represents the number of
                 CPU cycles each task is allocated and DOES NOT reflect the amount of

components/freertos/esp_additions/include/freertos/FreeRTOSConfig.h

@@ -100,7 +100,7 @@ This file get's pulled into assembly sources. Therefore, some includes need to b
 #if configUSE_TICKLESS_IDLE
 #define configEXPECTED_IDLE_TIME_BEFORE_SLEEP           CONFIG_FREERTOS_IDLE_TIME_BEFORE_SLEEP
 #endif //configUSE_TICKLESS_IDLE
-#define configCPU_CLOCK_HZ                              (CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ * 1000000)
+#define configCPU_CLOCK_HZ                              (CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ * 1000000)
 #define configTICK_RATE_HZ                              CONFIG_FREERTOS_HZ
 #define configMAX_PRIORITIES                            ( 25 )  //This has impact on speed of search for highest priority
 #define configMINIMAL_STACK_SIZE                        ( 768 + configSTACK_OVERHEAD_TOTAL )

components/mdns/test_afl_fuzz_host/sdkconfig.h

@@ -60,20 +60,20 @@
 #define CONFIG_ESP32_REV_MIN_0 1
 #define CONFIG_ESP32_REV_MIN 0
 #define CONFIG_ESP32_DPORT_WORKAROUND 1
-#define CONFIG_ESP32_DEFAULT_CPU_FREQ_160 1
-#define CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ 160
+#define CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_160 1
+#define CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ 160
 #define CONFIG_ESP32_TRACEMEM_RESERVE_DRAM 0x0
 #define CONFIG_ESP32_UNIVERSAL_MAC_ADDRESSES_FOUR 1
 #define CONFIG_ESP32_UNIVERSAL_MAC_ADDRESSES 4
-#define CONFIG_ESP32_ULP_COPROC_RESERVE_MEM 0
+#define CONFIG_ULP_COPROC_RESERVE_MEM 0
 #define CONFIG_ESP_DEBUG_OCDAWARE 1
 #define CONFIG_ESP_BROWNOUT_DET 1
 #define CONFIG_ESP_BROWNOUT_DET_LVL_SEL_0 1
 #define CONFIG_ESP_BROWNOUT_DET_LVL 0
 #define CONFIG_ESP32_REDUCE_PHY_TX_POWER 1
-#define CONFIG_ESP32_TIME_SYSCALL_USE_RTC_HRT 1
-#define CONFIG_ESP32_RTC_CLK_SRC_INT_RC 1
-#define CONFIG_ESP32_RTC_CLK_CAL_CYCLES 1024
+#define CONFIG_NEWLIB_TIME_SYSCALL_USE_RTC_HRT 1
+#define CONFIG_RTC_CLK_SRC_INT_RC 1
+#define CONFIG_RTC_CLK_CAL_CYCLES 1024
 #define CONFIG_ESP32_DEEP_SLEEP_WAKEUP_DELAY 2000
 #define CONFIG_ESP32_XTAL_FREQ_40 1
 #define CONFIG_ESP32_XTAL_FREQ 40
@@ -357,7 +357,6 @@
 #define CONFIG_ESP32_PTHREAD_TASK_NAME_DEFAULT CONFIG_PTHREAD_TASK_NAME_DEFAULT
 #define CONFIG_ESP32_PTHREAD_TASK_PRIO_DEFAULT CONFIG_PTHREAD_TASK_PRIO_DEFAULT
 #define CONFIG_ESP32_PTHREAD_TASK_STACK_SIZE_DEFAULT CONFIG_PTHREAD_TASK_STACK_SIZE_DEFAULT
-#define CONFIG_ESP32_RTC_CLOCK_SOURCE_INTERNAL_RC CONFIG_ESP32_RTC_CLK_SRC_INT_RC
 #define CONFIG_ESP_GRATUITOUS_ARP CONFIG_LWIP_ESP_GRATUITOUS_ARP
 #define CONFIG_FLASHMODE_DIO CONFIG_ESPTOOLPY_FLASHMODE_DIO
 #define CONFIG_FOUR_UNIVERSAL_MAC_ADDRESS CONFIG_ESP32_UNIVERSAL_MAC_ADDRESSES_FOUR

components/newlib/Kconfig

@@ -69,4 +69,42 @@ menu "Newlib"
             If you need 64-bit integer formatting support or C99 features, keep this
             option disabled.
 
+    choice NEWLIB_TIME_SYSCALL
+        prompt "Timers used for gettimeofday function"
+        default NEWLIB_TIME_SYSCALL_USE_RTC_HRT
+        help
+            This setting defines which hardware timers are used to
+            implement 'gettimeofday' and 'time' functions in C library.
+
+            - If both high-resolution (systimer for all targets except ESP32)
+                and RTC timers are used, timekeeping will continue in deep sleep.
+                Time will be reported at 1 microsecond resolution.
+                This is the default, and the recommended option.
+            - If only high-resolution timer (systimer) is used, gettimeofday will
+                provide time at microsecond resolution.
+                Time will not be preserved when going into deep sleep mode.
+            - If only RTC timer is used, timekeeping will continue in
+                deep sleep, but time will be measured at 6.(6) microsecond
+                resolution. Also the gettimeofday function itself may take
+                longer to run.
+            - If no timers are used, gettimeofday and time functions
+                return -1 and set errno to ENOSYS.
+            - When RTC is used for timekeeping, two RTC_STORE registers are
+                used to keep time in deep sleep mode.
+
+        config NEWLIB_TIME_SYSCALL_USE_RTC_HRT
+            bool "RTC and high-resolution timer"
+            select ESP_TIME_FUNCS_USE_RTC_TIMER
+            select ESP_TIME_FUNCS_USE_ESP_TIMER
+        config NEWLIB_TIME_SYSCALL_USE_RTC
+            bool "RTC"
+            select ESP_TIME_FUNCS_USE_RTC_TIMER
+        config NEWLIB_TIME_SYSCALL_USE_HRT
+            bool "High-resolution timer"
+            select ESP_TIME_FUNCS_USE_ESP_TIMER
+        config NEWLIB_TIME_SYSCALL_USE_NONE
+            bool "None"
+            select ESP_TIME_FUNCS_USE_NONE
+    endchoice
+
 endmenu # Newlib

components/newlib/sdkconfig.rename.esp32

@@ -0,0 +1,9 @@
+# sdkconfig replacement configurations for deprecated options formatted as
+# CONFIG_DEPRECATED_OPTION CONFIG_NEW_OPTION
+
+CONFIG_ESP32_TIME_SYSCALL_USE_RTC_HRT       CONFIG_NEWLIB_TIME_SYSCALL_USE_RTC_HRT
+CONFIG_ESP32_TIME_SYSCALL_USE_RTC           CONFIG_NEWLIB_TIME_SYSCALL_USE_RTC
+CONFIG_ESP32_TIME_SYSCALL_USE_HRT           CONFIG_NEWLIB_TIME_SYSCALL_USE_HRT
+CONFIG_ESP32_TIME_SYSCALL_USE_NONE          CONFIG_NEWLIB_TIME_SYSCALL_USE_NONE
+CONFIG_ESP32_TIME_SYSCALL_USE_RTC_FRC1      CONFIG_NEWLIB_TIME_SYSCALL_USE_RTC_HRT
+CONFIG_ESP32_TIME_SYSCALL_USE_FRC1          CONFIG_NEWLIB_TIME_SYSCALL_USE_HRT

components/newlib/sdkconfig.rename.esp32c3

@@ -0,0 +1,7 @@
+# sdkconfig replacement configurations for deprecated options formatted as
+# CONFIG_DEPRECATED_OPTION CONFIG_NEW_OPTION
+
+CONFIG_ESP32C3_TIME_SYSCALL_USE_RTC_SYSTIMER    CONFIG_NEWLIB_TIME_SYSCALL_USE_RTC_HRT
+CONFIG_ESP32C3_TIME_SYSCALL_USE_RTC             CONFIG_NEWLIB_TIME_SYSCALL_USE_RTC
+CONFIG_ESP32C3_TIME_SYSCALL_USE_SYSTIMER        CONFIG_NEWLIB_TIME_SYSCALL_USE_HRT
+CONFIG_ESP32C3_TIME_SYSCALL_USE_NONE            CONFIG_NEWLIB_TIME_SYSCALL_USE_NONE

components/newlib/sdkconfig.rename.esp32h2

@@ -0,0 +1,7 @@
+# sdkconfig replacement configurations for deprecated options formatted as
+# CONFIG_DEPRECATED_OPTION CONFIG_NEW_OPTION
+
+CONFIG_ESP32H2_TIME_SYSCALL_USE_RTC_SYSTIMER    CONFIG_NEWLIB_TIME_SYSCALL_USE_RTC_HRT
+CONFIG_ESP32H2_TIME_SYSCALL_USE_RTC             CONFIG_NEWLIB_TIME_SYSCALL_USE_RTC
+CONFIG_ESP32H2_TIME_SYSCALL_USE_SYSTIMER        CONFIG_NEWLIB_TIME_SYSCALL_USE_HRT
+CONFIG_ESP32H2_TIME_SYSCALL_USE_NONE            CONFIG_NEWLIB_TIME_SYSCALL_USE_NONE

components/newlib/sdkconfig.rename.esp32s2

@@ -0,0 +1,9 @@
+# sdkconfig replacement configurations for deprecated options formatted as
+# CONFIG_DEPRECATED_OPTION CONFIG_NEW_OPTION
+
+CONFIG_ESP32S2_TIME_SYSCALL_USE_RTC_SYSTIMER    CONFIG_NEWLIB_TIME_SYSCALL_USE_RTC_HRT
+CONFIG_ESP32S2_TIME_SYSCALL_USE_RTC             CONFIG_NEWLIB_TIME_SYSCALL_USE_RTC
+CONFIG_ESP32S2_TIME_SYSCALL_USE_SYSTIMER        CONFIG_NEWLIB_TIME_SYSCALL_USE_HRT
+CONFIG_ESP32S2_TIME_SYSCALL_USE_NONE            CONFIG_NEWLIB_TIME_SYSCALL_USE_NONE
+CONFIG_ESP32S2_TIME_SYSCALL_USE_RTC_FRC1        CONFIG_NEWLIB_TIME_SYSCALL_USE_RTC_HRT
+CONFIG_ESP32S2_TIME_SYSCALL_USE_FRC1            CONFIG_NEWLIB_TIME_SYSCALL_USE_HRT

components/newlib/sdkconfig.rename.esp32s3

@@ -0,0 +1,9 @@
+# sdkconfig replacement configurations for deprecated options formatted as
+# CONFIG_DEPRECATED_OPTION CONFIG_NEW_OPTION
+
+CONFIG_ESP32S3_TIME_SYSCALL_USE_RTC_SYSTIMER    CONFIG_NEWLIB_TIME_SYSCALL_USE_RTC_HRT
+CONFIG_ESP32S3_TIME_SYSCALL_USE_RTC             CONFIG_NEWLIB_TIME_SYSCALL_USE_RTC
+CONFIG_ESP32S3_TIME_SYSCALL_USE_SYSTIMER        CONFIG_NEWLIB_TIME_SYSCALL_USE_HRT
+CONFIG_ESP32S3_TIME_SYSCALL_USE_NONE            CONFIG_NEWLIB_TIME_SYSCALL_USE_NONE
+CONFIG_ESP32S3_TIME_SYSCALL_USE_RTC_FRC1        CONFIG_NEWLIB_TIME_SYSCALL_USE_RTC_HRT
+CONFIG_ESP32S3_TIME_SYSCALL_USE_FRC1            CONFIG_NEWLIB_TIME_SYSCALL_USE_HRT

components/newlib/test/test_time.c

@@ -26,21 +26,15 @@
 
 #if CONFIG_IDF_TARGET_ESP32
 #include "esp32/rtc.h"
-#define TARGET_DEFAULT_CPU_FREQ_MHZ CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ
 #elif CONFIG_IDF_TARGET_ESP32S2
 #include "esp32s2/rtc.h"
-#define TARGET_DEFAULT_CPU_FREQ_MHZ CONFIG_ESP32S2_DEFAULT_CPU_FREQ_MHZ
 #elif CONFIG_IDF_TARGET_ESP32S3
 #include "esp32s3/rtc.h"
-#define TARGET_DEFAULT_CPU_FREQ_MHZ CONFIG_ESP32S3_DEFAULT_CPU_FREQ_MHZ
 #elif CONFIG_IDF_TARGET_ESP32C3
 #include "esp32c3/rtc.h"
-#define TARGET_DEFAULT_CPU_FREQ_MHZ CONFIG_ESP32C3_DEFAULT_CPU_FREQ_MHZ
 #elif CONFIG_IDF_TARGET_ESP32H2
 #include "esp32h2/rtc.h"
-#define TARGET_DEFAULT_CPU_FREQ_MHZ CONFIG_ESP32H2_DEFAULT_CPU_FREQ_MHZ
 #elif CONFIG_IDF_TARGET_ESP32C2
-#define TARGET_DEFAULT_CPU_FREQ_MHZ CONFIG_ESP32C2_DEFAULT_CPU_FREQ_MHZ
 #endif
 
 #if portNUM_PROCESSORS == 2
@@ -51,7 +45,7 @@ static void time_adc_test_task(void* arg)
     for (int i = 0; i < 200000; ++i) {
         // wait for 20us, reading one of RTC registers
         uint32_t ccount = xthal_get_ccount();
-        while (xthal_get_ccount() - ccount < 20 * TARGET_DEFAULT_CPU_FREQ_MHZ) {
+        while (xthal_get_ccount() - ccount < 20 * CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ) {
             volatile uint32_t val = REG_READ(RTC_CNTL_STATE0_REG);
             (void) val;
         }
@@ -363,7 +357,7 @@ void test_posix_timers_clock (void)
     printf("CONFIG_ESP_TIME_FUNCS_USE_RTC_TIMER    ");
 #endif
 
-#ifdef CONFIG_ESP32_RTC_CLK_SRC_EXT_CRYS
+#ifdef CONFIG_RTC_CLK_SRC_EXT_CRYS
     printf("External (crystal) Frequency = %d Hz\n", rtc_clk_slow_freq_get_hz());
 #else
     printf("Internal Frequency = %d Hz\n", rtc_clk_slow_freq_get_hz());

components/soc/esp32/include/soc/soc.h

@@ -155,7 +155,7 @@
 //Periheral Clock {{
 #define  APB_CLK_FREQ_ROM                            ( 26*1000000 )
 #define  CPU_CLK_FREQ_ROM                            APB_CLK_FREQ_ROM
-#define  CPU_CLK_FREQ                                APB_CLK_FREQ       //this may be incorrect, please refer to ESP32_DEFAULT_CPU_FREQ_MHZ
+#define  CPU_CLK_FREQ                                APB_CLK_FREQ       //this may be incorrect, please refer to ESP_DEFAULT_CPU_FREQ_MHZ
 #define  APB_CLK_FREQ                                ( 80*1000000 )       //unit: Hz
 #define  REF_CLK_FREQ                                ( 1000000 )
 #define  UART_CLK_FREQ                               APB_CLK_FREQ

components/ulp/sdkconfig.rename.esp32

@@ -0,0 +1,5 @@
+# sdkconfig replacement configurations for deprecated options formatted as
+# CONFIG_DEPRECATED_OPTION CONFIG_NEW_OPTION
+
+CONFIG_ESP32_ULP_COPROC_ENABLED                         CONFIG_ULP_COPROC_ENABLED
+CONFIG_ESP32_ULP_COPROC_RESERVE_MEM                     CONFIG_ULP_COPROC_RESERVE_MEM

components/esp32s2/sdkconfig.rename → components/ulp/sdkconfig.rename.esp32s2

@@ -1,9 +1,6 @@
 # sdkconfig replacement configurations for deprecated options formatted as
 # CONFIG_DEPRECATED_OPTION CONFIG_NEW_OPTION
 
-# ESP32-S2 specific
 CONFIG_ESP32S2_ULP_COPROC_ENABLED                   CONFIG_ULP_COPROC_ENABLED
 CONFIG_ESP32S2_ULP_COPROC_RESERVE_MEM               CONFIG_ULP_COPROC_RESERVE_MEM
 CONFIG_ESP32S2_ULP_COPROC_RISCV                     CONFIG_ULP_COPROC_TYPE_RISCV
-CONFIG_ESP32S2_TIME_SYSCALL_USE_RTC_FRC1            CONFIG_ESP32S2_TIME_SYSCALL_USE_RTC_SYSTIMER
-CONFIG_ESP32S2_TIME_SYSCALL_USE_FRC1                CONFIG_ESP32S2_TIME_SYSCALL_USE_SYSTIMER

docs/en/api-guides/performance/speed.rst

@@ -128,9 +128,9 @@ In addition to the overall performance improvements shown above, the following o
    - Minimizing the :ref:`CONFIG_LOG_DEFAULT_LEVEL` and :ref:`CONFIG_BOOTLOADER_LOG_LEVEL` has a large impact on startup time. To enable more logging after the app starts up, set the :ref:`CONFIG_LOG_MAXIMUM_LEVEL` as well and then call :cpp:func:`esp_log_level_set` to restore higher level logs. The :example:`system/startup_time` main function shows how to do this.
    - If using deep sleep, setting :ref:`CONFIG_BOOTLOADER_SKIP_VALIDATE_IN_DEEP_SLEEP` allows a faster wake from sleep. Note that if using Secure Boot this represents a security compromise, as Secure Boot validation will not be performed on wake.
    - Setting :ref:`CONFIG_BOOTLOADER_SKIP_VALIDATE_ON_POWER_ON` will skip verifying the binary on every boot from power-on reset. How much time this saves depends on the binary size and the flash settings. Note that this setting carries some risk if the flash becomes corrupt unexpectedly. Read the help text of the :ref:`config item <CONFIG_BOOTLOADER_SKIP_VALIDATE_ON_POWER_ON>` for an explanation and recommendations if using this option.
-   - It's possible to save a small amount of time during boot by disabling RTC slow clock calibration. To do so, set :ref:`CONFIG_{IDF_TARGET_CFG_PREFIX}_RTC_CLK_CAL_CYCLES` to 0. Any part of the firmware that uses RTC slow clock as a timing source will be less accurate as a result.
+   - It's possible to save a small amount of time during boot by disabling RTC slow clock calibration. To do so, set :ref:`CONFIG_RTC_CLK_CAL_CYCLES` to 0. Any part of the firmware that uses RTC slow clock as a timing source will be less accurate as a result.
 
-The example project :example:`system/startup_time` is pre-configured to optimize startup time. The files :example_file:`system/startup_time/sdkconfig.defaults` and :example_file:`system/startup_time/sdkconfig.defaults.{IDF_TARGET_PATH_NAME}` contain all of these settings. You can append these to the end of your project's own ``sdkconfig`` file to merge the settings, but please read the documentation for each setting first.
+The example project :example:`system/startup_time` is pre-configured to optimize startup time. The file :example_file:`system/startup_time/sdkconfig.defaults` contain all of these settings. You can append these to the end of your project's own ``sdkconfig`` file to merge the settings, but please read the documentation for each setting first.
 
 Task Priorities
 ---------------

docs/en/api-reference/system/power_management.rst

@@ -32,7 +32,7 @@ Dynamic frequency scaling (DFS) and automatic light sleep can be enabled in an a
 - ``light_sleep_enable``: Whether the system should automatically enter light sleep when no locks are acquired (``true``/``false``).
 
 
-  Alternatively, if you enable the option :ref:`CONFIG_PM_DFS_INIT_AUTO` in menuconfig, the maximum CPU frequency will be determined by the :ref:`CONFIG_{IDF_TARGET_CFG_PREFIX}_DEFAULT_CPU_FREQ_MHZ` setting, and the minimum CPU frequency will be locked to the XTAL frequency.
+  Alternatively, if you enable the option :ref:`CONFIG_PM_DFS_INIT_AUTO` in menuconfig, the maximum CPU frequency will be determined by the :ref:`CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ` setting, and the minimum CPU frequency will be locked to the XTAL frequency.
 
 .. note::
 
@@ -72,7 +72,7 @@ Power management locks have acquire/release counters. If the lock has been acqui
 {IDF_TARGET_NAME} Power Management Algorithm
 ---------------------------------------
 
-The table below shows how CPU and APB frequencies will be switched if dynamic frequency scaling is enabled. You can specify the maximum CPU frequency with either :cpp:func:`esp_pm_configure` or :ref:`CONFIG_{IDF_TARGET_CFG_PREFIX}_DEFAULT_CPU_FREQ_MHZ`.
+The table below shows how CPU and APB frequencies will be switched if dynamic frequency scaling is enabled. You can specify the maximum CPU frequency with either :cpp:func:`esp_pm_configure` or :ref:`CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ`.
 
 .. only:: esp32
 

docs/en/api-reference/system/system_time.rst

@@ -22,7 +22,7 @@ The settings for the system time source are as follows:
 - High-resolution timer
 - None
 
-It is recommended to stick to the default setting which provides maximum accuracy. If you want to choose a different timer, configure :ref:`CONFIG_{IDF_TARGET_CFG_PREFIX}_TIME_SYSCALL` in project configuration.
+It is recommended to stick to the default setting which provides maximum accuracy. If you want to choose a different timer, configure :ref:`CONFIG_NEWLIB_TIME_SYSCALL` in project configuration.
 
 
 RTC Clock Source
@@ -38,7 +38,7 @@ The RTC timer has the following clock sources:
 
 - ``Internal 8.5MHz oscillator, divided by 256 (~33kHz)``: Provides better frequency stability than the ``internal {IDF_TARGET_RTC_CLK_FRE} RC oscillator`` at the expense of higher (by 5 uA) deep sleep current consumption. It also does not require external components.
 
-The choice depends on your requirements for system time accuracy and power consumption in sleep modes. To modify the RTC clock source, set :ref:`CONFIG_{IDF_TARGET_CFG_PREFIX}_RTC_CLK_SRC` in project configuration.
+The choice depends on your requirements for system time accuracy and power consumption in sleep modes. To modify the RTC clock source, set :ref:`CONFIG_RTC_CLK_SRC` in project configuration.
 
 More details on wiring requirements for the ``External 32kHz crystal`` and ``External 32kHz oscillator at 32K_XN pin`` sources can be found in Section *Crystal Oscillator* of {IDF_TARGET_HARDWARE_DESIGN_URL}.
 

docs/en/api-reference/system/wdts.rst

@@ -150,7 +150,7 @@ OpenOCD via JTAG.
   Configuration
   @@@@@@@@@@@@@
 
-  When the external 32KHz crystal or oscillator is selected (:ref:`CONFIG_{IDF_TARGET_CFG_PREFIX}_RTC_CLK_SRC`) the XTAL32K watchdog can be enabled via the :ref:`CONFIG_ESP_XT_WDT` configuration
+  When the external 32KHz crystal or oscillator is selected (:ref:`CONFIG_RTC_CLK_SRC`) the XTAL32K watchdog can be enabled via the :ref:`CONFIG_ESP_XT_WDT` configuration
   flag. The timeout is configured by setting :ref:`CONFIG_ESP_XT_WDT_TIMEOUT`. The automatic backup clock functionality is enabled via the ref:`CONFIG_ESP_XT_WDT_BACKUP_CLK_ENABLE` configuration.
 
 Interrupt Watchdog API Reference

docs/zh_CN/api-reference/system/power_management.rst

@@ -27,12 +27,12 @@ ESP-IDF 中集成的电源管理算法可以根据应用程序组件的需求，
 
 通过调用 :cpp:func:`esp_pm_configure` 函数可以在应用程序中启用动态调频 (DFS) 功能和自动 Light-sleep 模式。此函数的参数 :cpp:class:`esp_pm_config_{IDF_TARGET_PATH_NAME}_t` 定义了频率调节的相关设置。在此参数结构中，需要初始化以下三个字段：
 
-- ``max_freq_mhz``：最大 CPU 频率 (MHz)，即获取 ``ESP_PM_CPU_FREQ_MAX`` 锁后所使用的频率。该字段通常设置为 :ref:`CONFIG_{IDF_TARGET_CFG_PREFIX}_DEFAULT_CPU_FREQ_MHZ`。
+- ``max_freq_mhz``：最大 CPU 频率 (MHz)，即获取 ``ESP_PM_CPU_FREQ_MAX`` 锁后所使用的频率。该字段通常设置为 :ref:`CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ`。
 - ``min_freq_mhz``：最小 CPU 频率 (MHz)，即仅获取 ``ESP_PM_APB_FREQ_MAX`` 锁后所使用的频率。该字段可设置为晶振 (XTAL) 频率值，或者 XTAL 频率值除以整数。注意，10 MHz 是生成 1 MHz 的 REF_TICK 默认时钟所需的最小频率。
 - ``light_sleep_enable``：没有获取任何管理锁时，决定系统是否需要自动进入 Light-sleep 状态 (``true``/``false``)。
 
 
-  如果在 menuconfig 中启用了 :ref:`CONFIG_PM_DFS_INIT_AUTO` 选项，最大 CPU 频率将由 :ref:`CONFIG_{IDF_TARGET_CFG_PREFIX}_DEFAULT_CPU_FREQ_MHZ` 设置决定，最小 CPU 频率将锁定为 XTAL 频率。
+  如果在 menuconfig 中启用了 :ref:`CONFIG_PM_DFS_INIT_AUTO` 选项，最大 CPU 频率将由 :ref:`CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ` 设置决定，最小 CPU 频率将锁定为 XTAL 频率。
 
 .. note::
 
@@ -72,7 +72,7 @@ ESP-IDF 中集成的电源管理算法可以根据应用程序组件的需求，
 {IDF_TARGET_NAME} 电源管理算法
 --------------------------------
 
-下表列出了启用动态调频时如何切换 CPU 频率和 APB 频率。您可以使用 :cpp:func:`esp_pm_configure` 或者 :ref:`CONFIG_{IDF_TARGET_CFG_PREFIX}_DEFAULT_CPU_FREQ_MHZ` 指定 CPU 最大频率。
+下表列出了启用动态调频时如何切换 CPU 频率和 APB 频率。您可以使用 :cpp:func:`esp_pm_configure` 或者 :ref:`CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ` 指定 CPU 最大频率。
 
 .. only:: esp32
 

examples/bluetooth/bluedroid/ble/ble_ancs/sdkconfig.defaults.esp32

@@ -1087,18 +1087,18 @@ CONFIG_ESP32_REV_MIN_0=y
 # CONFIG_ESP32_REV_MIN_3 is not set
 CONFIG_ESP32_REV_MIN=0
 CONFIG_ESP32_DPORT_WORKAROUND=y
-# CONFIG_ESP32_DEFAULT_CPU_FREQ_80 is not set
-CONFIG_ESP32_DEFAULT_CPU_FREQ_160=y
-# CONFIG_ESP32_DEFAULT_CPU_FREQ_240 is not set
-CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ=160
+# CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_80 is not set
+CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_160=y
+# CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_240 is not set
+CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ=160
 # CONFIG_ESP32_SPIRAM_SUPPORT is not set
 # CONFIG_ESP32_TRAX is not set
 CONFIG_ESP32_TRACEMEM_RESERVE_DRAM=0x0
 # CONFIG_ESP32_UNIVERSAL_MAC_ADDRESSES_TWO is not set
 CONFIG_ESP32_UNIVERSAL_MAC_ADDRESSES_FOUR=y
 CONFIG_ESP32_UNIVERSAL_MAC_ADDRESSES=4
-# CONFIG_ESP32_ULP_COPROC_ENABLED is not set
-CONFIG_ESP32_ULP_COPROC_RESERVE_MEM=0
+# CONFIG_ULP_COPROC_ENABLED is not set
+CONFIG_ULP_COPROC_RESERVE_MEM=0
 CONFIG_ESP32_DEBUG_OCDAWARE=y
 CONFIG_ESP32_BROWNOUT_DET=y
 CONFIG_ESP32_BROWNOUT_DET_LVL_SEL_0=y
@@ -1111,15 +1111,15 @@ CONFIG_ESP32_BROWNOUT_DET_LVL_SEL_0=y
 # CONFIG_ESP32_BROWNOUT_DET_LVL_SEL_7 is not set
 CONFIG_ESP32_BROWNOUT_DET_LVL=0
 CONFIG_ESP32_REDUCE_PHY_TX_POWER=y
-CONFIG_ESP32_TIME_SYSCALL_USE_RTC_FRC1=y
-# CONFIG_ESP32_TIME_SYSCALL_USE_RTC is not set
-# CONFIG_ESP32_TIME_SYSCALL_USE_FRC1 is not set
-# CONFIG_ESP32_TIME_SYSCALL_USE_NONE is not set
-CONFIG_ESP32_RTC_CLK_SRC_INT_RC=y
-# CONFIG_ESP32_RTC_CLK_SRC_EXT_CRYS is not set
-# CONFIG_ESP32_RTC_CLK_SRC_EXT_OSC is not set
-# CONFIG_ESP32_RTC_CLK_SRC_INT_8MD256 is not set
-CONFIG_ESP32_RTC_CLK_CAL_CYCLES=1024
+CONFIG_NEWLIB_TIME_SYSCALL_USE_RTC_FRC1=y
+# CONFIG_NEWLIB_TIME_SYSCALL_USE_RTC is not set
+# CONFIG_NEWLIB_TIME_SYSCALL_USE_FRC1 is not set
+# CONFIG_NEWLIB_TIME_SYSCALL_USE_NONE is not set
+CONFIG_RTC_CLK_SRC_INT_RC=y
+# CONFIG_RTC_CLK_SRC_EXT_CRYS is not set
+# CONFIG_RTC_CLK_SRC_EXT_OSC is not set
+# CONFIG_RTC_CLK_SRC_INT_8MD256 is not set
+CONFIG_RTC_CLK_CAL_CYCLES=1024
 CONFIG_ESP32_DEEP_SLEEP_WAKEUP_DELAY=2000
 CONFIG_ESP32_XTAL_FREQ_40=y
 # CONFIG_ESP32_XTAL_FREQ_26 is not set
@@ -1655,10 +1655,10 @@ CONFIG_BROWNOUT_DET_LVL_SEL_0=y
 # CONFIG_BROWNOUT_DET_LVL_SEL_7 is not set
 CONFIG_BROWNOUT_DET_LVL=0
 CONFIG_REDUCE_PHY_TX_POWER=y
-CONFIG_ESP32_RTC_CLOCK_SOURCE_INTERNAL_RC=y
-# CONFIG_ESP32_RTC_CLOCK_SOURCE_EXTERNAL_CRYSTAL is not set
-# CONFIG_ESP32_RTC_CLOCK_SOURCE_EXTERNAL_OSC is not set
-# CONFIG_ESP32_RTC_CLOCK_SOURCE_INTERNAL_8MD256 is not set
+CONFIG_RTC_CLOCK_SOURCE_INTERNAL_RC=y
+# CONFIG_RTC_CLOCK_SOURCE_EXTERNAL_CRYSTAL is not set
+# CONFIG_RTC_CLOCK_SOURCE_EXTERNAL_OSC is not set
+# CONFIG_RTC_CLOCK_SOURCE_INTERNAL_8MD256 is not set
 # CONFIG_DISABLE_BASIC_ROM_CONSOLE is not set
 # CONFIG_COMPATIBLE_PRE_V2_1_BOOTLOADERS is not set
 # CONFIG_L2_TO_L3_COPY is not set

examples/bluetooth/bluedroid/ble/ble_ancs/sdkconfig.defaults.esp32c3

@@ -942,15 +942,15 @@ CONFIG_ESP32C3_UNIVERSAL_MAC_ADDRESSES_TWO=y
 CONFIG_ESP32C3_UNIVERSAL_MAC_ADDRESSES=2
 CONFIG_ESP32C3_DEBUG_OCDAWARE=y
 # CONFIG_ESP32C3_DEBUG_STUBS_ENABLE is not set
-CONFIG_ESP32C3_TIME_SYSCALL_USE_RTC_SYSTIMER=y
+CONFIG_ESP32C3_TIME_SYSCALL_USE_RTC_HRT=y
 # CONFIG_ESP32C3_TIME_SYSCALL_USE_RTC is not set
-# CONFIG_ESP32C3_TIME_SYSCALL_USE_SYSTIMER is not set
+# CONFIG_ESP32C3_TIME_SYSCALL_USE_HRT is not set
 # CONFIG_ESP32C3_TIME_SYSCALL_USE_NONE is not set
-CONFIG_ESP32C3_RTC_CLK_SRC_INT_RC=y
-# CONFIG_ESP32C3_RTC_CLK_SRC_EXT_CRYS is not set
-# CONFIG_ESP32C3_RTC_CLK_SRC_EXT_OSC is not set
-# CONFIG_ESP32C3_RTC_CLK_SRC_INT_8MD256 is not set
-CONFIG_ESP32C3_RTC_CLK_CAL_CYCLES=1024
+CONFIG_RTC_CLK_SRC_INT_RC=y
+# CONFIG_RTC_CLK_SRC_EXT_CRYS is not set
+# CONFIG_RTC_CLK_SRC_EXT_OSC is not set
+# CONFIG_RTC_CLK_SRC_INT_8MD256 is not set
+CONFIG_RTC_CLK_CAL_CYCLES=1024
 # end of ESP32C3-Specific
 
 #

examples/bluetooth/bluedroid/ble/ble_ancs/sdkconfig.defaults.esp32s3

@@ -374,11 +374,11 @@ CONFIG_ESP32S3_TIME_SYSCALL_USE_RTC_FRC1=y
 # CONFIG_ESP32S3_TIME_SYSCALL_USE_RTC is not set
 # CONFIG_ESP32S3_TIME_SYSCALL_USE_FRC1 is not set
 # CONFIG_ESP32S3_TIME_SYSCALL_USE_NONE is not set
-CONFIG_ESP32S3_RTC_CLK_SRC_INT_RC=y
-# CONFIG_ESP32S3_RTC_CLK_SRC_EXT_CRYS is not set
-# CONFIG_ESP32S3_RTC_CLK_SRC_EXT_OSC is not set
-# CONFIG_ESP32S3_RTC_CLK_SRC_INT_8MD256 is not set
-CONFIG_ESP32S3_RTC_CLK_CAL_CYCLES=576
+CONFIG_RTC_CLK_SRC_INT_RC=y
+# CONFIG_RTC_CLK_SRC_EXT_CRYS is not set
+# CONFIG_RTC_CLK_SRC_EXT_OSC is not set
+# CONFIG_RTC_CLK_SRC_INT_8MD256 is not set
+CONFIG_RTC_CLK_CAL_CYCLES=576
 # CONFIG_ESP32S3_RTCDATA_IN_FAST_MEM is not set
 # CONFIG_ESP32S3_USE_FIXED_STATIC_RAM_SIZE is not set
 # end of ESP32S3-Specific

examples/bluetooth/bluedroid/ble/ble_compatibility_test/sdkconfig.defaults.esp32

@@ -1091,18 +1091,18 @@ CONFIG_ESP32_REV_MIN_0=y
 # CONFIG_ESP32_REV_MIN_3 is not set
 CONFIG_ESP32_REV_MIN=0
 CONFIG_ESP32_DPORT_WORKAROUND=y
-# CONFIG_ESP32_DEFAULT_CPU_FREQ_80 is not set
-CONFIG_ESP32_DEFAULT_CPU_FREQ_160=y
-# CONFIG_ESP32_DEFAULT_CPU_FREQ_240 is not set
-CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ=160
+# CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_80 is not set
+CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_160=y
+# CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_240 is not set
+CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ=160
 # CONFIG_ESP32_SPIRAM_SUPPORT is not set
 # CONFIG_ESP32_TRAX is not set
 CONFIG_ESP32_TRACEMEM_RESERVE_DRAM=0x0
 # CONFIG_ESP32_UNIVERSAL_MAC_ADDRESSES_TWO is not set
 CONFIG_ESP32_UNIVERSAL_MAC_ADDRESSES_FOUR=y
 CONFIG_ESP32_UNIVERSAL_MAC_ADDRESSES=4
-# CONFIG_ESP32_ULP_COPROC_ENABLED is not set
-CONFIG_ESP32_ULP_COPROC_RESERVE_MEM=0
+# CONFIG_ULP_COPROC_ENABLED is not set
+CONFIG_ULP_COPROC_RESERVE_MEM=0
 CONFIG_ESP32_DEBUG_OCDAWARE=y
 CONFIG_ESP32_BROWNOUT_DET=y
 CONFIG_ESP32_BROWNOUT_DET_LVL_SEL_0=y
@@ -1115,15 +1115,15 @@ CONFIG_ESP32_BROWNOUT_DET_LVL_SEL_0=y
 # CONFIG_ESP32_BROWNOUT_DET_LVL_SEL_7 is not set
 CONFIG_ESP32_BROWNOUT_DET_LVL=0
 CONFIG_ESP32_REDUCE_PHY_TX_POWER=y
-CONFIG_ESP32_TIME_SYSCALL_USE_RTC_FRC1=y
-# CONFIG_ESP32_TIME_SYSCALL_USE_RTC is not set
-# CONFIG_ESP32_TIME_SYSCALL_USE_FRC1 is not set
-# CONFIG_ESP32_TIME_SYSCALL_USE_NONE is not set
-CONFIG_ESP32_RTC_CLK_SRC_INT_RC=y
-# CONFIG_ESP32_RTC_CLK_SRC_EXT_CRYS is not set
-# CONFIG_ESP32_RTC_CLK_SRC_EXT_OSC is not set
-# CONFIG_ESP32_RTC_CLK_SRC_INT_8MD256 is not set
-CONFIG_ESP32_RTC_CLK_CAL_CYCLES=1024
+CONFIG_NEWLIB_TIME_SYSCALL_USE_RTC_FRC1=y
+# CONFIG_NEWLIB_TIME_SYSCALL_USE_RTC is not set
+# CONFIG_NEWLIB_TIME_SYSCALL_USE_FRC1 is not set
+# CONFIG_NEWLIB_TIME_SYSCALL_USE_NONE is not set
+CONFIG_RTC_CLK_SRC_INT_RC=y
+# CONFIG_RTC_CLK_SRC_EXT_CRYS is not set
+# CONFIG_RTC_CLK_SRC_EXT_OSC is not set
+# CONFIG_RTC_CLK_SRC_INT_8MD256 is not set
+CONFIG_RTC_CLK_CAL_CYCLES=1024
 CONFIG_ESP32_DEEP_SLEEP_WAKEUP_DELAY=2000
 CONFIG_ESP32_XTAL_FREQ_40=y
 # CONFIG_ESP32_XTAL_FREQ_26 is not set
@@ -1661,10 +1661,10 @@ CONFIG_BROWNOUT_DET_LVL_SEL_0=y
 # CONFIG_BROWNOUT_DET_LVL_SEL_7 is not set
 CONFIG_BROWNOUT_DET_LVL=0
 CONFIG_REDUCE_PHY_TX_POWER=y
-CONFIG_ESP32_RTC_CLOCK_SOURCE_INTERNAL_RC=y
-# CONFIG_ESP32_RTC_CLOCK_SOURCE_EXTERNAL_CRYSTAL is not set
-# CONFIG_ESP32_RTC_CLOCK_SOURCE_EXTERNAL_OSC is not set
-# CONFIG_ESP32_RTC_CLOCK_SOURCE_INTERNAL_8MD256 is not set
+CONFIG_RTC_CLOCK_SOURCE_INTERNAL_RC=y
+# CONFIG_RTC_CLOCK_SOURCE_EXTERNAL_CRYSTAL is not set
+# CONFIG_RTC_CLOCK_SOURCE_EXTERNAL_OSC is not set
+# CONFIG_RTC_CLOCK_SOURCE_INTERNAL_8MD256 is not set
 # CONFIG_DISABLE_BASIC_ROM_CONSOLE is not set
 # CONFIG_COMPATIBLE_PRE_V2_1_BOOTLOADERS is not set
 # CONFIG_L2_TO_L3_COPY is not set

examples/bluetooth/bluedroid/ble/ble_compatibility_test/sdkconfig.defaults.esp32c3

@@ -942,15 +942,15 @@ CONFIG_ESP32C3_UNIVERSAL_MAC_ADDRESSES_TWO=y
 CONFIG_ESP32C3_UNIVERSAL_MAC_ADDRESSES=2
 CONFIG_ESP32C3_DEBUG_OCDAWARE=y
 # CONFIG_ESP32C3_DEBUG_STUBS_ENABLE is not set
-CONFIG_ESP32C3_TIME_SYSCALL_USE_RTC_SYSTIMER=y
+CONFIG_ESP32C3_TIME_SYSCALL_USE_RTC_HRT=y
 # CONFIG_ESP32C3_TIME_SYSCALL_USE_RTC is not set
-# CONFIG_ESP32C3_TIME_SYSCALL_USE_SYSTIMER is not set
+# CONFIG_ESP32C3_TIME_SYSCALL_USE_HRT is not set
 # CONFIG_ESP32C3_TIME_SYSCALL_USE_NONE is not set
-CONFIG_ESP32C3_RTC_CLK_SRC_INT_RC=y
-# CONFIG_ESP32C3_RTC_CLK_SRC_EXT_CRYS is not set
-# CONFIG_ESP32C3_RTC_CLK_SRC_EXT_OSC is not set
-# CONFIG_ESP32C3_RTC_CLK_SRC_INT_8MD256 is not set
-CONFIG_ESP32C3_RTC_CLK_CAL_CYCLES=1024
+CONFIG_RTC_CLK_SRC_INT_RC=y
+# CONFIG_RTC_CLK_SRC_EXT_CRYS is not set
+# CONFIG_RTC_CLK_SRC_EXT_OSC is not set
+# CONFIG_RTC_CLK_SRC_INT_8MD256 is not set
+CONFIG_RTC_CLK_CAL_CYCLES=1024
 # end of ESP32C3-Specific
 
 #

examples/bluetooth/bluedroid/ble/ble_compatibility_test/sdkconfig.defaults.esp32s3

@@ -374,11 +374,11 @@ CONFIG_ESP32S3_TIME_SYSCALL_USE_RTC_FRC1=y
 # CONFIG_ESP32S3_TIME_SYSCALL_USE_RTC is not set
 # CONFIG_ESP32S3_TIME_SYSCALL_USE_FRC1 is not set
 # CONFIG_ESP32S3_TIME_SYSCALL_USE_NONE is not set
-CONFIG_ESP32S3_RTC_CLK_SRC_INT_RC=y
-# CONFIG_ESP32S3_RTC_CLK_SRC_EXT_CRYS is not set
-# CONFIG_ESP32S3_RTC_CLK_SRC_EXT_OSC is not set
-# CONFIG_ESP32S3_RTC_CLK_SRC_INT_8MD256 is not set
-CONFIG_ESP32S3_RTC_CLK_CAL_CYCLES=576
+CONFIG_RTC_CLK_SRC_INT_RC=y
+# CONFIG_RTC_CLK_SRC_EXT_CRYS is not set
+# CONFIG_RTC_CLK_SRC_EXT_OSC is not set
+# CONFIG_RTC_CLK_SRC_INT_8MD256 is not set
+CONFIG_RTC_CLK_CAL_CYCLES=576
 # CONFIG_ESP32S3_RTCDATA_IN_FAST_MEM is not set
 # CONFIG_ESP32S3_USE_FIXED_STATIC_RAM_SIZE is not set
 # end of ESP32S3-Specific

examples/bluetooth/bluedroid/ble/ble_eddystone/sdkconfig.defaults.esp32c3

@@ -941,15 +941,15 @@ CONFIG_ESP32C3_UNIVERSAL_MAC_ADDRESSES_TWO=y
 CONFIG_ESP32C3_UNIVERSAL_MAC_ADDRESSES=2
 CONFIG_ESP32C3_DEBUG_OCDAWARE=y
 # CONFIG_ESP32C3_DEBUG_STUBS_ENABLE is not set
-CONFIG_ESP32C3_TIME_SYSCALL_USE_RTC_SYSTIMER=y
+CONFIG_ESP32C3_TIME_SYSCALL_USE_RTC_HRT=y
 # CONFIG_ESP32C3_TIME_SYSCALL_USE_RTC is not set
-# CONFIG_ESP32C3_TIME_SYSCALL_USE_SYSTIMER is not set
+# CONFIG_ESP32C3_TIME_SYSCALL_USE_HRT is not set
 # CONFIG_ESP32C3_TIME_SYSCALL_USE_NONE is not set
-CONFIG_ESP32C3_RTC_CLK_SRC_INT_RC=y
-# CONFIG_ESP32C3_RTC_CLK_SRC_EXT_CRYS is not set
-# CONFIG_ESP32C3_RTC_CLK_SRC_EXT_OSC is not set
-# CONFIG_ESP32C3_RTC_CLK_SRC_INT_8MD256 is not set
-CONFIG_ESP32C3_RTC_CLK_CAL_CYCLES=1024
+CONFIG_RTC_CLK_SRC_INT_RC=y
+# CONFIG_RTC_CLK_SRC_EXT_CRYS is not set
+# CONFIG_RTC_CLK_SRC_EXT_OSC is not set
+# CONFIG_RTC_CLK_SRC_INT_8MD256 is not set
+CONFIG_RTC_CLK_CAL_CYCLES=1024
 # end of ESP32C3-Specific
 
 #

examples/bluetooth/bluedroid/ble/ble_eddystone/sdkconfig.defaults.esp32s3

@@ -374,11 +374,11 @@ CONFIG_ESP32S3_TIME_SYSCALL_USE_RTC_FRC1=y
 # CONFIG_ESP32S3_TIME_SYSCALL_USE_RTC is not set
 # CONFIG_ESP32S3_TIME_SYSCALL_USE_FRC1 is not set
 # CONFIG_ESP32S3_TIME_SYSCALL_USE_NONE is not set
-CONFIG_ESP32S3_RTC_CLK_SRC_INT_RC=y
-# CONFIG_ESP32S3_RTC_CLK_SRC_EXT_CRYS is not set
-# CONFIG_ESP32S3_RTC_CLK_SRC_EXT_OSC is not set
-# CONFIG_ESP32S3_RTC_CLK_SRC_INT_8MD256 is not set
-CONFIG_ESP32S3_RTC_CLK_CAL_CYCLES=576
+CONFIG_RTC_CLK_SRC_INT_RC=y
+# CONFIG_RTC_CLK_SRC_EXT_CRYS is not set
+# CONFIG_RTC_CLK_SRC_EXT_OSC is not set
+# CONFIG_RTC_CLK_SRC_INT_8MD256 is not set
+CONFIG_RTC_CLK_CAL_CYCLES=576
 # CONFIG_ESP32S3_RTCDATA_IN_FAST_MEM is not set
 # CONFIG_ESP32S3_USE_FIXED_STATIC_RAM_SIZE is not set
 # end of ESP32S3-Specific

examples/bluetooth/bluedroid/ble/ble_hid_device_demo/sdkconfig.defaults.esp32

@@ -1091,18 +1091,18 @@ CONFIG_ESP32_REV_MIN_0=y
 # CONFIG_ESP32_REV_MIN_3 is not set
 CONFIG_ESP32_REV_MIN=0
 CONFIG_ESP32_DPORT_WORKAROUND=y
-# CONFIG_ESP32_DEFAULT_CPU_FREQ_80 is not set
-CONFIG_ESP32_DEFAULT_CPU_FREQ_160=y
-# CONFIG_ESP32_DEFAULT_CPU_FREQ_240 is not set
-CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ=160
+# CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_80 is not set
+CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_160=y
+# CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_240 is not set
+CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ=160
 # CONFIG_ESP32_SPIRAM_SUPPORT is not set
 # CONFIG_ESP32_TRAX is not set
 CONFIG_ESP32_TRACEMEM_RESERVE_DRAM=0x0
 # CONFIG_ESP32_UNIVERSAL_MAC_ADDRESSES_TWO is not set
 CONFIG_ESP32_UNIVERSAL_MAC_ADDRESSES_FOUR=y
 CONFIG_ESP32_UNIVERSAL_MAC_ADDRESSES=4
-# CONFIG_ESP32_ULP_COPROC_ENABLED is not set
-CONFIG_ESP32_ULP_COPROC_RESERVE_MEM=0
+# CONFIG_ULP_COPROC_ENABLED is not set
+CONFIG_ULP_COPROC_RESERVE_MEM=0
 CONFIG_ESP32_DEBUG_OCDAWARE=y
 CONFIG_ESP32_BROWNOUT_DET=y
 CONFIG_ESP32_BROWNOUT_DET_LVL_SEL_0=y
@@ -1115,15 +1115,15 @@ CONFIG_ESP32_BROWNOUT_DET_LVL_SEL_0=y
 # CONFIG_ESP32_BROWNOUT_DET_LVL_SEL_7 is not set
 CONFIG_ESP32_BROWNOUT_DET_LVL=0
 CONFIG_ESP32_REDUCE_PHY_TX_POWER=y
-CONFIG_ESP32_TIME_SYSCALL_USE_RTC_FRC1=y
-# CONFIG_ESP32_TIME_SYSCALL_USE_RTC is not set
-# CONFIG_ESP32_TIME_SYSCALL_USE_FRC1 is not set
-# CONFIG_ESP32_TIME_SYSCALL_USE_NONE is not set
-CONFIG_ESP32_RTC_CLK_SRC_INT_RC=y
-# CONFIG_ESP32_RTC_CLK_SRC_EXT_CRYS is not set
-# CONFIG_ESP32_RTC_CLK_SRC_EXT_OSC is not set
-# CONFIG_ESP32_RTC_CLK_SRC_INT_8MD256 is not set
-CONFIG_ESP32_RTC_CLK_CAL_CYCLES=1024
+CONFIG_NEWLIB_TIME_SYSCALL_USE_RTC_FRC1=y
+# CONFIG_NEWLIB_TIME_SYSCALL_USE_RTC is not set
+# CONFIG_NEWLIB_TIME_SYSCALL_USE_FRC1 is not set
+# CONFIG_NEWLIB_TIME_SYSCALL_USE_NONE is not set
+CONFIG_RTC_CLK_SRC_INT_RC=y
+# CONFIG_RTC_CLK_SRC_EXT_CRYS is not set
+# CONFIG_RTC_CLK_SRC_EXT_OSC is not set
+# CONFIG_RTC_CLK_SRC_INT_8MD256 is not set
+CONFIG_RTC_CLK_CAL_CYCLES=1024
 CONFIG_ESP32_DEEP_SLEEP_WAKEUP_DELAY=2000
 CONFIG_ESP32_XTAL_FREQ_40=y
 # CONFIG_ESP32_XTAL_FREQ_26 is not set
@@ -1662,10 +1662,10 @@ CONFIG_BROWNOUT_DET_LVL_SEL_0=y
 # CONFIG_BROWNOUT_DET_LVL_SEL_7 is not set
 CONFIG_BROWNOUT_DET_LVL=0
 CONFIG_REDUCE_PHY_TX_POWER=y
-CONFIG_ESP32_RTC_CLOCK_SOURCE_INTERNAL_RC=y
-# CONFIG_ESP32_RTC_CLOCK_SOURCE_EXTERNAL_CRYSTAL is not set
-# CONFIG_ESP32_RTC_CLOCK_SOURCE_EXTERNAL_OSC is not set
-# CONFIG_ESP32_RTC_CLOCK_SOURCE_INTERNAL_8MD256 is not set
+CONFIG_RTC_CLOCK_SOURCE_INTERNAL_RC=y
+# CONFIG_RTC_CLOCK_SOURCE_EXTERNAL_CRYSTAL is not set
+# CONFIG_RTC_CLOCK_SOURCE_EXTERNAL_OSC is not set
+# CONFIG_RTC_CLOCK_SOURCE_INTERNAL_8MD256 is not set
 # CONFIG_DISABLE_BASIC_ROM_CONSOLE is not set
 # CONFIG_COMPATIBLE_PRE_V2_1_BOOTLOADERS is not set
 # CONFIG_L2_TO_L3_COPY is not set

examples/bluetooth/bluedroid/ble/ble_hid_device_demo/sdkconfig.defaults.esp32c3

@@ -941,15 +941,15 @@ CONFIG_ESP32C3_UNIVERSAL_MAC_ADDRESSES_TWO=y
 CONFIG_ESP32C3_UNIVERSAL_MAC_ADDRESSES=2
 CONFIG_ESP32C3_DEBUG_OCDAWARE=y
 # CONFIG_ESP32C3_DEBUG_STUBS_ENABLE is not set
-CONFIG_ESP32C3_TIME_SYSCALL_USE_RTC_SYSTIMER=y
+CONFIG_ESP32C3_TIME_SYSCALL_USE_RTC_HRT=y
 # CONFIG_ESP32C3_TIME_SYSCALL_USE_RTC is not set
-# CONFIG_ESP32C3_TIME_SYSCALL_USE_SYSTIMER is not set
+# CONFIG_ESP32C3_TIME_SYSCALL_USE_HRT is not set
 # CONFIG_ESP32C3_TIME_SYSCALL_USE_NONE is not set
-CONFIG_ESP32C3_RTC_CLK_SRC_INT_RC=y
-# CONFIG_ESP32C3_RTC_CLK_SRC_EXT_CRYS is not set
-# CONFIG_ESP32C3_RTC_CLK_SRC_EXT_OSC is not set
-# CONFIG_ESP32C3_RTC_CLK_SRC_INT_8MD256 is not set
-CONFIG_ESP32C3_RTC_CLK_CAL_CYCLES=1024
+CONFIG_RTC_CLK_SRC_INT_RC=y
+# CONFIG_RTC_CLK_SRC_EXT_CRYS is not set
+# CONFIG_RTC_CLK_SRC_EXT_OSC is not set
+# CONFIG_RTC_CLK_SRC_INT_8MD256 is not set
+CONFIG_RTC_CLK_CAL_CYCLES=1024
 # end of ESP32C3-Specific
 
 #

examples/bluetooth/bluedroid/ble/ble_hid_device_demo/sdkconfig.defaults.esp32s3

@@ -374,11 +374,11 @@ CONFIG_ESP32S3_TIME_SYSCALL_USE_RTC_FRC1=y
 # CONFIG_ESP32S3_TIME_SYSCALL_USE_RTC is not set
 # CONFIG_ESP32S3_TIME_SYSCALL_USE_FRC1 is not set
 # CONFIG_ESP32S3_TIME_SYSCALL_USE_NONE is not set
-CONFIG_ESP32S3_RTC_CLK_SRC_INT_RC=y
-# CONFIG_ESP32S3_RTC_CLK_SRC_EXT_CRYS is not set
-# CONFIG_ESP32S3_RTC_CLK_SRC_EXT_OSC is not set
-# CONFIG_ESP32S3_RTC_CLK_SRC_INT_8MD256 is not set
-CONFIG_ESP32S3_RTC_CLK_CAL_CYCLES=576
+CONFIG_RTC_CLK_SRC_INT_RC=y
+# CONFIG_RTC_CLK_SRC_EXT_CRYS is not set
+# CONFIG_RTC_CLK_SRC_EXT_OSC is not set
+# CONFIG_RTC_CLK_SRC_INT_8MD256 is not set
+CONFIG_RTC_CLK_CAL_CYCLES=576
 # CONFIG_ESP32S3_RTCDATA_IN_FAST_MEM is not set
 # CONFIG_ESP32S3_USE_FIXED_STATIC_RAM_SIZE is not set
 # end of ESP32S3-Specific

examples/bluetooth/bluedroid/ble/ble_ibeacon/sdkconfig.defaults.esp32

@@ -1088,18 +1088,18 @@ CONFIG_ESP32_REV_MIN_0=y
 # CONFIG_ESP32_REV_MIN_3 is not set
 CONFIG_ESP32_REV_MIN=0
 CONFIG_ESP32_DPORT_WORKAROUND=y
-# CONFIG_ESP32_DEFAULT_CPU_FREQ_80 is not set
-CONFIG_ESP32_DEFAULT_CPU_FREQ_160=y
-# CONFIG_ESP32_DEFAULT_CPU_FREQ_240 is not set
-CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ=160
+# CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_80 is not set
+CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_160=y
+# CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_240 is not set
+CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ=160
 # CONFIG_ESP32_SPIRAM_SUPPORT is not set
 # CONFIG_ESP32_TRAX is not set
 CONFIG_ESP32_TRACEMEM_RESERVE_DRAM=0x0
 # CONFIG_ESP32_UNIVERSAL_MAC_ADDRESSES_TWO is not set
 CONFIG_ESP32_UNIVERSAL_MAC_ADDRESSES_FOUR=y
 CONFIG_ESP32_UNIVERSAL_MAC_ADDRESSES=4
-# CONFIG_ESP32_ULP_COPROC_ENABLED is not set
-CONFIG_ESP32_ULP_COPROC_RESERVE_MEM=0
+# CONFIG_ULP_COPROC_ENABLED is not set
+CONFIG_ULP_COPROC_RESERVE_MEM=0
 CONFIG_ESP32_DEBUG_OCDAWARE=y
 CONFIG_ESP32_BROWNOUT_DET=y
 CONFIG_ESP32_BROWNOUT_DET_LVL_SEL_0=y
@@ -1112,15 +1112,15 @@ CONFIG_ESP32_BROWNOUT_DET_LVL_SEL_0=y
 # CONFIG_ESP32_BROWNOUT_DET_LVL_SEL_7 is not set
 CONFIG_ESP32_BROWNOUT_DET_LVL=0
 CONFIG_ESP32_REDUCE_PHY_TX_POWER=y
-CONFIG_ESP32_TIME_SYSCALL_USE_RTC_FRC1=y
-# CONFIG_ESP32_TIME_SYSCALL_USE_RTC is not set
-# CONFIG_ESP32_TIME_SYSCALL_USE_FRC1 is not set
-# CONFIG_ESP32_TIME_SYSCALL_USE_NONE is not set
-CONFIG_ESP32_RTC_CLK_SRC_INT_RC=y
-# CONFIG_ESP32_RTC_CLK_SRC_EXT_CRYS is not set
-# CONFIG_ESP32_RTC_CLK_SRC_EXT_OSC is not set
-# CONFIG_ESP32_RTC_CLK_SRC_INT_8MD256 is not set
-CONFIG_ESP32_RTC_CLK_CAL_CYCLES=1024
+CONFIG_NEWLIB_TIME_SYSCALL_USE_RTC_FRC1=y
+# CONFIG_NEWLIB_TIME_SYSCALL_USE_RTC is not set
+# CONFIG_NEWLIB_TIME_SYSCALL_USE_FRC1 is not set
+# CONFIG_NEWLIB_TIME_SYSCALL_USE_NONE is not set
+CONFIG_RTC_CLK_SRC_INT_RC=y
+# CONFIG_RTC_CLK_SRC_EXT_CRYS is not set
+# CONFIG_RTC_CLK_SRC_EXT_OSC is not set
+# CONFIG_RTC_CLK_SRC_INT_8MD256 is not set
+CONFIG_RTC_CLK_CAL_CYCLES=1024
 CONFIG_ESP32_DEEP_SLEEP_WAKEUP_DELAY=2000
 CONFIG_ESP32_XTAL_FREQ_40=y
 # CONFIG_ESP32_XTAL_FREQ_26 is not set
@@ -1662,10 +1662,10 @@ CONFIG_BROWNOUT_DET_LVL_SEL_0=y
 # CONFIG_BROWNOUT_DET_LVL_SEL_7 is not set
 CONFIG_BROWNOUT_DET_LVL=0
 CONFIG_REDUCE_PHY_TX_POWER=y
-CONFIG_ESP32_RTC_CLOCK_SOURCE_INTERNAL_RC=y
-# CONFIG_ESP32_RTC_CLOCK_SOURCE_EXTERNAL_CRYSTAL is not set
-# CONFIG_ESP32_RTC_CLOCK_SOURCE_EXTERNAL_OSC is not set
-# CONFIG_ESP32_RTC_CLOCK_SOURCE_INTERNAL_8MD256 is not set
+CONFIG_RTC_CLOCK_SOURCE_INTERNAL_RC=y
+# CONFIG_RTC_CLOCK_SOURCE_EXTERNAL_CRYSTAL is not set
+# CONFIG_RTC_CLOCK_SOURCE_EXTERNAL_OSC is not set
+# CONFIG_RTC_CLOCK_SOURCE_INTERNAL_8MD256 is not set
 # CONFIG_DISABLE_BASIC_ROM_CONSOLE is not set
 # CONFIG_COMPATIBLE_PRE_V2_1_BOOTLOADERS is not set
 # CONFIG_L2_TO_L3_COPY is not set

examples/bluetooth/bluedroid/ble/ble_ibeacon/sdkconfig.defaults.esp32c3

@@ -941,15 +941,15 @@ CONFIG_ESP32C3_UNIVERSAL_MAC_ADDRESSES_TWO=y
 CONFIG_ESP32C3_UNIVERSAL_MAC_ADDRESSES=2
 CONFIG_ESP32C3_DEBUG_OCDAWARE=y
 # CONFIG_ESP32C3_DEBUG_STUBS_ENABLE is not set
-CONFIG_ESP32C3_TIME_SYSCALL_USE_RTC_SYSTIMER=y
+CONFIG_ESP32C3_TIME_SYSCALL_USE_RTC_HRT=y
 # CONFIG_ESP32C3_TIME_SYSCALL_USE_RTC is not set
-# CONFIG_ESP32C3_TIME_SYSCALL_USE_SYSTIMER is not set
+# CONFIG_ESP32C3_TIME_SYSCALL_USE_HRT is not set
 # CONFIG_ESP32C3_TIME_SYSCALL_USE_NONE is not set
-CONFIG_ESP32C3_RTC_CLK_SRC_INT_RC=y
-# CONFIG_ESP32C3_RTC_CLK_SRC_EXT_CRYS is not set
-# CONFIG_ESP32C3_RTC_CLK_SRC_EXT_OSC is not set
-# CONFIG_ESP32C3_RTC_CLK_SRC_INT_8MD256 is not set
-CONFIG_ESP32C3_RTC_CLK_CAL_CYCLES=1024
+CONFIG_RTC_CLK_SRC_INT_RC=y
+# CONFIG_RTC_CLK_SRC_EXT_CRYS is not set
+# CONFIG_RTC_CLK_SRC_EXT_OSC is not set
+# CONFIG_RTC_CLK_SRC_INT_8MD256 is not set
+CONFIG_RTC_CLK_CAL_CYCLES=1024
 # end of ESP32C3-Specific
 
 #

examples/bluetooth/bluedroid/ble/ble_ibeacon/sdkconfig.defaults.esp32s3

@@ -374,11 +374,11 @@ CONFIG_ESP32S3_TIME_SYSCALL_USE_RTC_FRC1=y
 # CONFIG_ESP32S3_TIME_SYSCALL_USE_RTC is not set
 # CONFIG_ESP32S3_TIME_SYSCALL_USE_FRC1 is not set
 # CONFIG_ESP32S3_TIME_SYSCALL_USE_NONE is not set
-CONFIG_ESP32S3_RTC_CLK_SRC_INT_RC=y
-# CONFIG_ESP32S3_RTC_CLK_SRC_EXT_CRYS is not set
-# CONFIG_ESP32S3_RTC_CLK_SRC_EXT_OSC is not set
-# CONFIG_ESP32S3_RTC_CLK_SRC_INT_8MD256 is not set
-CONFIG_ESP32S3_RTC_CLK_CAL_CYCLES=576
+CONFIG_RTC_CLK_SRC_INT_RC=y
+# CONFIG_RTC_CLK_SRC_EXT_CRYS is not set
+# CONFIG_RTC_CLK_SRC_EXT_OSC is not set
+# CONFIG_RTC_CLK_SRC_INT_8MD256 is not set
+CONFIG_RTC_CLK_CAL_CYCLES=576
 # CONFIG_ESP32S3_RTCDATA_IN_FAST_MEM is not set
 # CONFIG_ESP32S3_USE_FIXED_STATIC_RAM_SIZE is not set
 # end of ESP32S3-Specific

examples/bluetooth/bluedroid/ble/ble_spp_client/sdkconfig.defaults.esp32

@@ -1090,18 +1090,18 @@ CONFIG_ESP32_REV_MIN_0=y
 # CONFIG_ESP32_REV_MIN_3 is not set
 CONFIG_ESP32_REV_MIN=0
 CONFIG_ESP32_DPORT_WORKAROUND=y
-# CONFIG_ESP32_DEFAULT_CPU_FREQ_80 is not set
-CONFIG_ESP32_DEFAULT_CPU_FREQ_160=y
-# CONFIG_ESP32_DEFAULT_CPU_FREQ_240 is not set
-CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ=160
+# CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_80 is not set
+CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_160=y
+# CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_240 is not set
+CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ=160
 # CONFIG_ESP32_SPIRAM_SUPPORT is not set
 # CONFIG_ESP32_TRAX is not set
 CONFIG_ESP32_TRACEMEM_RESERVE_DRAM=0x0
 # CONFIG_ESP32_UNIVERSAL_MAC_ADDRESSES_TWO is not set
 CONFIG_ESP32_UNIVERSAL_MAC_ADDRESSES_FOUR=y
 CONFIG_ESP32_UNIVERSAL_MAC_ADDRESSES=4
-# CONFIG_ESP32_ULP_COPROC_ENABLED is not set
-CONFIG_ESP32_ULP_COPROC_RESERVE_MEM=0
+# CONFIG_ULP_COPROC_ENABLED is not set
+CONFIG_ULP_COPROC_RESERVE_MEM=0
 CONFIG_ESP32_DEBUG_OCDAWARE=y
 CONFIG_ESP32_BROWNOUT_DET=y
 CONFIG_ESP32_BROWNOUT_DET_LVL_SEL_0=y
@@ -1114,15 +1114,15 @@ CONFIG_ESP32_BROWNOUT_DET_LVL_SEL_0=y
 # CONFIG_ESP32_BROWNOUT_DET_LVL_SEL_7 is not set
 CONFIG_ESP32_BROWNOUT_DET_LVL=0
 CONFIG_ESP32_REDUCE_PHY_TX_POWER=y
-CONFIG_ESP32_TIME_SYSCALL_USE_RTC_FRC1=y
-# CONFIG_ESP32_TIME_SYSCALL_USE_RTC is not set
-# CONFIG_ESP32_TIME_SYSCALL_USE_FRC1 is not set
-# CONFIG_ESP32_TIME_SYSCALL_USE_NONE is not set
-CONFIG_ESP32_RTC_CLK_SRC_INT_RC=y
-# CONFIG_ESP32_RTC_CLK_SRC_EXT_CRYS is not set
-# CONFIG_ESP32_RTC_CLK_SRC_EXT_OSC is not set
-# CONFIG_ESP32_RTC_CLK_SRC_INT_8MD256 is not set
-CONFIG_ESP32_RTC_CLK_CAL_CYCLES=1024
+CONFIG_NEWLIB_TIME_SYSCALL_USE_RTC_FRC1=y
+# CONFIG_NEWLIB_TIME_SYSCALL_USE_RTC is not set
+# CONFIG_NEWLIB_TIME_SYSCALL_USE_FRC1 is not set
+# CONFIG_NEWLIB_TIME_SYSCALL_USE_NONE is not set
+CONFIG_RTC_CLK_SRC_INT_RC=y
+# CONFIG_RTC_CLK_SRC_EXT_CRYS is not set
+# CONFIG_RTC_CLK_SRC_EXT_OSC is not set
+# CONFIG_RTC_CLK_SRC_INT_8MD256 is not set
+CONFIG_RTC_CLK_CAL_CYCLES=1024
 CONFIG_ESP32_DEEP_SLEEP_WAKEUP_DELAY=2000
 CONFIG_ESP32_XTAL_FREQ_40=y
 # CONFIG_ESP32_XTAL_FREQ_26 is not set
@@ -1656,10 +1656,10 @@ CONFIG_BROWNOUT_DET_LVL_SEL_0=y
 # CONFIG_BROWNOUT_DET_LVL_SEL_7 is not set
 CONFIG_BROWNOUT_DET_LVL=0
 CONFIG_REDUCE_PHY_TX_POWER=y
-CONFIG_ESP32_RTC_CLOCK_SOURCE_INTERNAL_RC=y
-# CONFIG_ESP32_RTC_CLOCK_SOURCE_EXTERNAL_CRYSTAL is not set
-# CONFIG_ESP32_RTC_CLOCK_SOURCE_EXTERNAL_OSC is not set
-# CONFIG_ESP32_RTC_CLOCK_SOURCE_INTERNAL_8MD256 is not set
+CONFIG_RTC_CLOCK_SOURCE_INTERNAL_RC=y
+# CONFIG_RTC_CLOCK_SOURCE_EXTERNAL_CRYSTAL is not set
+# CONFIG_RTC_CLOCK_SOURCE_EXTERNAL_OSC is not set
+# CONFIG_RTC_CLOCK_SOURCE_INTERNAL_8MD256 is not set
 # CONFIG_DISABLE_BASIC_ROM_CONSOLE is not set
 # CONFIG_COMPATIBLE_PRE_V2_1_BOOTLOADERS is not set
 # CONFIG_L2_TO_L3_COPY is not set

examples/bluetooth/bluedroid/ble/ble_spp_client/sdkconfig.defaults.esp32c3

@@ -941,15 +941,15 @@ CONFIG_ESP32C3_UNIVERSAL_MAC_ADDRESSES_TWO=y
 CONFIG_ESP32C3_UNIVERSAL_MAC_ADDRESSES=2
 CONFIG_ESP32C3_DEBUG_OCDAWARE=y
 # CONFIG_ESP32C3_DEBUG_STUBS_ENABLE is not set
-CONFIG_ESP32C3_TIME_SYSCALL_USE_RTC_SYSTIMER=y
+CONFIG_ESP32C3_TIME_SYSCALL_USE_RTC_HRT=y
 # CONFIG_ESP32C3_TIME_SYSCALL_USE_RTC is not set
-# CONFIG_ESP32C3_TIME_SYSCALL_USE_SYSTIMER is not set
+# CONFIG_ESP32C3_TIME_SYSCALL_USE_HRT is not set
 # CONFIG_ESP32C3_TIME_SYSCALL_USE_NONE is not set
-CONFIG_ESP32C3_RTC_CLK_SRC_INT_RC=y
-# CONFIG_ESP32C3_RTC_CLK_SRC_EXT_CRYS is not set
-# CONFIG_ESP32C3_RTC_CLK_SRC_EXT_OSC is not set
-# CONFIG_ESP32C3_RTC_CLK_SRC_INT_8MD256 is not set
-CONFIG_ESP32C3_RTC_CLK_CAL_CYCLES=1024
+CONFIG_RTC_CLK_SRC_INT_RC=y
+# CONFIG_RTC_CLK_SRC_EXT_CRYS is not set
+# CONFIG_RTC_CLK_SRC_EXT_OSC is not set
+# CONFIG_RTC_CLK_SRC_INT_8MD256 is not set
+CONFIG_RTC_CLK_CAL_CYCLES=1024
 # end of ESP32C3-Specific
 
 #

examples/bluetooth/bluedroid/ble/ble_spp_client/sdkconfig.defaults.esp32s3

@@ -374,11 +374,11 @@ CONFIG_ESP32S3_TIME_SYSCALL_USE_RTC_FRC1=y
 # CONFIG_ESP32S3_TIME_SYSCALL_USE_RTC is not set
 # CONFIG_ESP32S3_TIME_SYSCALL_USE_FRC1 is not set
 # CONFIG_ESP32S3_TIME_SYSCALL_USE_NONE is not set
-CONFIG_ESP32S3_RTC_CLK_SRC_INT_RC=y
-# CONFIG_ESP32S3_RTC_CLK_SRC_EXT_CRYS is not set
-# CONFIG_ESP32S3_RTC_CLK_SRC_EXT_OSC is not set
-# CONFIG_ESP32S3_RTC_CLK_SRC_INT_8MD256 is not set
-CONFIG_ESP32S3_RTC_CLK_CAL_CYCLES=576
+CONFIG_RTC_CLK_SRC_INT_RC=y
+# CONFIG_RTC_CLK_SRC_EXT_CRYS is not set
+# CONFIG_RTC_CLK_SRC_EXT_OSC is not set
+# CONFIG_RTC_CLK_SRC_INT_8MD256 is not set
+CONFIG_RTC_CLK_CAL_CYCLES=576
 # CONFIG_ESP32S3_RTCDATA_IN_FAST_MEM is not set
 # CONFIG_ESP32S3_USE_FIXED_STATIC_RAM_SIZE is not set
 # end of ESP32S3-Specific

examples/bluetooth/bluedroid/ble/ble_spp_server/sdkconfig.defaults.esp32

@@ -1088,18 +1088,18 @@ CONFIG_ESP32_REV_MIN_0=y
 # CONFIG_ESP32_REV_MIN_3 is not set
 CONFIG_ESP32_REV_MIN=0
 CONFIG_ESP32_DPORT_WORKAROUND=y
-# CONFIG_ESP32_DEFAULT_CPU_FREQ_80 is not set
-CONFIG_ESP32_DEFAULT_CPU_FREQ_160=y
-# CONFIG_ESP32_DEFAULT_CPU_FREQ_240 is not set
-CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ=160
+# CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_80 is not set
+CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_160=y
+# CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_240 is not set
+CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ=160
 # CONFIG_ESP32_SPIRAM_SUPPORT is not set
 # CONFIG_ESP32_TRAX is not set
 CONFIG_ESP32_TRACEMEM_RESERVE_DRAM=0x0
 # CONFIG_ESP32_UNIVERSAL_MAC_ADDRESSES_TWO is not set
 CONFIG_ESP32_UNIVERSAL_MAC_ADDRESSES_FOUR=y
 CONFIG_ESP32_UNIVERSAL_MAC_ADDRESSES=4
-# CONFIG_ESP32_ULP_COPROC_ENABLED is not set
-CONFIG_ESP32_ULP_COPROC_RESERVE_MEM=0
+# CONFIG_ULP_COPROC_ENABLED is not set
+CONFIG_ULP_COPROC_RESERVE_MEM=0
 CONFIG_ESP32_DEBUG_OCDAWARE=y
 CONFIG_ESP32_BROWNOUT_DET=y
 CONFIG_ESP32_BROWNOUT_DET_LVL_SEL_0=y
@@ -1112,15 +1112,15 @@ CONFIG_ESP32_BROWNOUT_DET_LVL_SEL_0=y
 # CONFIG_ESP32_BROWNOUT_DET_LVL_SEL_7 is not set
 CONFIG_ESP32_BROWNOUT_DET_LVL=0
 CONFIG_ESP32_REDUCE_PHY_TX_POWER=y
-CONFIG_ESP32_TIME_SYSCALL_USE_RTC_FRC1=y
-# CONFIG_ESP32_TIME_SYSCALL_USE_RTC is not set
-# CONFIG_ESP32_TIME_SYSCALL_USE_FRC1 is not set
-# CONFIG_ESP32_TIME_SYSCALL_USE_NONE is not set
-CONFIG_ESP32_RTC_CLK_SRC_INT_RC=y
-# CONFIG_ESP32_RTC_CLK_SRC_EXT_CRYS is not set
-# CONFIG_ESP32_RTC_CLK_SRC_EXT_OSC is not set
-# CONFIG_ESP32_RTC_CLK_SRC_INT_8MD256 is not set
-CONFIG_ESP32_RTC_CLK_CAL_CYCLES=1024
+CONFIG_NEWLIB_TIME_SYSCALL_USE_RTC_FRC1=y
+# CONFIG_NEWLIB_TIME_SYSCALL_USE_RTC is not set
+# CONFIG_NEWLIB_TIME_SYSCALL_USE_FRC1 is not set
+# CONFIG_NEWLIB_TIME_SYSCALL_USE_NONE is not set
+CONFIG_RTC_CLK_SRC_INT_RC=y
+# CONFIG_RTC_CLK_SRC_EXT_CRYS is not set
+# CONFIG_RTC_CLK_SRC_EXT_OSC is not set
+# CONFIG_RTC_CLK_SRC_INT_8MD256 is not set
+CONFIG_RTC_CLK_CAL_CYCLES=1024
 CONFIG_ESP32_DEEP_SLEEP_WAKEUP_DELAY=2000
 CONFIG_ESP32_XTAL_FREQ_40=y
 # CONFIG_ESP32_XTAL_FREQ_26 is not set
@@ -1662,10 +1662,10 @@ CONFIG_BROWNOUT_DET_LVL_SEL_0=y
 # CONFIG_BROWNOUT_DET_LVL_SEL_7 is not set
 CONFIG_BROWNOUT_DET_LVL=0
 CONFIG_REDUCE_PHY_TX_POWER=y
-CONFIG_ESP32_RTC_CLOCK_SOURCE_INTERNAL_RC=y
-# CONFIG_ESP32_RTC_CLOCK_SOURCE_EXTERNAL_CRYSTAL is not set
-# CONFIG_ESP32_RTC_CLOCK_SOURCE_EXTERNAL_OSC is not set
-# CONFIG_ESP32_RTC_CLOCK_SOURCE_INTERNAL_8MD256 is not set
+CONFIG_RTC_CLOCK_SOURCE_INTERNAL_RC=y
+# CONFIG_RTC_CLOCK_SOURCE_EXTERNAL_CRYSTAL is not set
+# CONFIG_RTC_CLOCK_SOURCE_EXTERNAL_OSC is not set
+# CONFIG_RTC_CLOCK_SOURCE_INTERNAL_8MD256 is not set
 # CONFIG_DISABLE_BASIC_ROM_CONSOLE is not set
 # CONFIG_COMPATIBLE_PRE_V2_1_BOOTLOADERS is not set
 # CONFIG_L2_TO_L3_COPY is not set

examples/bluetooth/bluedroid/ble/ble_spp_server/sdkconfig.defaults.esp32c3

@@ -941,15 +941,15 @@ CONFIG_ESP32C3_UNIVERSAL_MAC_ADDRESSES_TWO=y
 CONFIG_ESP32C3_UNIVERSAL_MAC_ADDRESSES=2
 CONFIG_ESP32C3_DEBUG_OCDAWARE=y
 # CONFIG_ESP32C3_DEBUG_STUBS_ENABLE is not set
-CONFIG_ESP32C3_TIME_SYSCALL_USE_RTC_SYSTIMER=y
+CONFIG_ESP32C3_TIME_SYSCALL_USE_RTC_HRT=y
 # CONFIG_ESP32C3_TIME_SYSCALL_USE_RTC is not set
-# CONFIG_ESP32C3_TIME_SYSCALL_USE_SYSTIMER is not set
+# CONFIG_ESP32C3_TIME_SYSCALL_USE_HRT is not set
 # CONFIG_ESP32C3_TIME_SYSCALL_USE_NONE is not set
-CONFIG_ESP32C3_RTC_CLK_SRC_INT_RC=y
-# CONFIG_ESP32C3_RTC_CLK_SRC_EXT_CRYS is not set
-# CONFIG_ESP32C3_RTC_CLK_SRC_EXT_OSC is not set
-# CONFIG_ESP32C3_RTC_CLK_SRC_INT_8MD256 is not set
-CONFIG_ESP32C3_RTC_CLK_CAL_CYCLES=1024
+CONFIG_RTC_CLK_SRC_INT_RC=y
+# CONFIG_RTC_CLK_SRC_EXT_CRYS is not set
+# CONFIG_RTC_CLK_SRC_EXT_OSC is not set
+# CONFIG_RTC_CLK_SRC_INT_8MD256 is not set
+CONFIG_RTC_CLK_CAL_CYCLES=1024
 # end of ESP32C3-Specific
 
 #

examples/bluetooth/bluedroid/ble/ble_spp_server/sdkconfig.defaults.esp32s3

@@ -374,11 +374,11 @@ CONFIG_ESP32S3_TIME_SYSCALL_USE_RTC_FRC1=y
 # CONFIG_ESP32S3_TIME_SYSCALL_USE_RTC is not set
 # CONFIG_ESP32S3_TIME_SYSCALL_USE_FRC1 is not set
 # CONFIG_ESP32S3_TIME_SYSCALL_USE_NONE is not set
-CONFIG_ESP32S3_RTC_CLK_SRC_INT_RC=y
-# CONFIG_ESP32S3_RTC_CLK_SRC_EXT_CRYS is not set
-# CONFIG_ESP32S3_RTC_CLK_SRC_EXT_OSC is not set
-# CONFIG_ESP32S3_RTC_CLK_SRC_INT_8MD256 is not set
-CONFIG_ESP32S3_RTC_CLK_CAL_CYCLES=576
+CONFIG_RTC_CLK_SRC_INT_RC=y
+# CONFIG_RTC_CLK_SRC_EXT_CRYS is not set
+# CONFIG_RTC_CLK_SRC_EXT_OSC is not set
+# CONFIG_RTC_CLK_SRC_INT_8MD256 is not set
+CONFIG_RTC_CLK_CAL_CYCLES=576
 # CONFIG_ESP32S3_RTCDATA_IN_FAST_MEM is not set
 # CONFIG_ESP32S3_USE_FIXED_STATIC_RAM_SIZE is not set
 # end of ESP32S3-Specific

examples/bluetooth/bluedroid/ble/ble_throughput/throughput_client/sdkconfig.defaults.esp32

@@ -1090,18 +1090,18 @@ CONFIG_ESP32_REV_MIN_0=y
 # CONFIG_ESP32_REV_MIN_3 is not set
 CONFIG_ESP32_REV_MIN=0
 CONFIG_ESP32_DPORT_WORKAROUND=y
-# CONFIG_ESP32_DEFAULT_CPU_FREQ_80 is not set
-CONFIG_ESP32_DEFAULT_CPU_FREQ_160=y
-# CONFIG_ESP32_DEFAULT_CPU_FREQ_240 is not set
-CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ=160
+# CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_80 is not set
+CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_160=y
+# CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_240 is not set
+CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ=160
 # CONFIG_ESP32_SPIRAM_SUPPORT is not set
 # CONFIG_ESP32_TRAX is not set
 CONFIG_ESP32_TRACEMEM_RESERVE_DRAM=0x0
 # CONFIG_ESP32_UNIVERSAL_MAC_ADDRESSES_TWO is not set
 CONFIG_ESP32_UNIVERSAL_MAC_ADDRESSES_FOUR=y
 CONFIG_ESP32_UNIVERSAL_MAC_ADDRESSES=4
-# CONFIG_ESP32_ULP_COPROC_ENABLED is not set
-CONFIG_ESP32_ULP_COPROC_RESERVE_MEM=0
+# CONFIG_ULP_COPROC_ENABLED is not set
+CONFIG_ULP_COPROC_RESERVE_MEM=0
 CONFIG_ESP32_DEBUG_OCDAWARE=y
 CONFIG_ESP32_BROWNOUT_DET=y
 CONFIG_ESP32_BROWNOUT_DET_LVL_SEL_0=y
@@ -1114,15 +1114,15 @@ CONFIG_ESP32_BROWNOUT_DET_LVL_SEL_0=y
 # CONFIG_ESP32_BROWNOUT_DET_LVL_SEL_7 is not set
 CONFIG_ESP32_BROWNOUT_DET_LVL=0
 CONFIG_ESP32_REDUCE_PHY_TX_POWER=y
-CONFIG_ESP32_TIME_SYSCALL_USE_RTC_FRC1=y
-# CONFIG_ESP32_TIME_SYSCALL_USE_RTC is not set
-# CONFIG_ESP32_TIME_SYSCALL_USE_FRC1 is not set
-# CONFIG_ESP32_TIME_SYSCALL_USE_NONE is not set
-CONFIG_ESP32_RTC_CLK_SRC_INT_RC=y
-# CONFIG_ESP32_RTC_CLK_SRC_EXT_CRYS is not set
-# CONFIG_ESP32_RTC_CLK_SRC_EXT_OSC is not set
-# CONFIG_ESP32_RTC_CLK_SRC_INT_8MD256 is not set
-CONFIG_ESP32_RTC_CLK_CAL_CYCLES=1024
+CONFIG_NEWLIB_TIME_SYSCALL_USE_RTC_FRC1=y
+# CONFIG_NEWLIB_TIME_SYSCALL_USE_RTC is not set
+# CONFIG_NEWLIB_TIME_SYSCALL_USE_FRC1 is not set
+# CONFIG_NEWLIB_TIME_SYSCALL_USE_NONE is not set
+CONFIG_RTC_CLK_SRC_INT_RC=y
+# CONFIG_RTC_CLK_SRC_EXT_CRYS is not set
+# CONFIG_RTC_CLK_SRC_EXT_OSC is not set
+# CONFIG_RTC_CLK_SRC_INT_8MD256 is not set
+CONFIG_RTC_CLK_CAL_CYCLES=1024
 CONFIG_ESP32_DEEP_SLEEP_WAKEUP_DELAY=2000
 CONFIG_ESP32_XTAL_FREQ_40=y
 # CONFIG_ESP32_XTAL_FREQ_26 is not set
@@ -1656,10 +1656,10 @@ CONFIG_BROWNOUT_DET_LVL_SEL_0=y
 # CONFIG_BROWNOUT_DET_LVL_SEL_7 is not set
 CONFIG_BROWNOUT_DET_LVL=0
 CONFIG_REDUCE_PHY_TX_POWER=y
-CONFIG_ESP32_RTC_CLOCK_SOURCE_INTERNAL_RC=y
-# CONFIG_ESP32_RTC_CLOCK_SOURCE_EXTERNAL_CRYSTAL is not set
-# CONFIG_ESP32_RTC_CLOCK_SOURCE_EXTERNAL_OSC is not set
-# CONFIG_ESP32_RTC_CLOCK_SOURCE_INTERNAL_8MD256 is not set
+CONFIG_RTC_CLOCK_SOURCE_INTERNAL_RC=y
+# CONFIG_RTC_CLOCK_SOURCE_EXTERNAL_CRYSTAL is not set
+# CONFIG_RTC_CLOCK_SOURCE_EXTERNAL_OSC is not set
+# CONFIG_RTC_CLOCK_SOURCE_INTERNAL_8MD256 is not set
 # CONFIG_DISABLE_BASIC_ROM_CONSOLE is not set
 # CONFIG_COMPATIBLE_PRE_V2_1_BOOTLOADERS is not set
 # CONFIG_L2_TO_L3_COPY is not set

examples/bluetooth/bluedroid/ble/ble_throughput/throughput_client/sdkconfig.defaults.esp32c3

@@ -941,15 +941,15 @@ CONFIG_ESP32C3_UNIVERSAL_MAC_ADDRESSES_TWO=y
 CONFIG_ESP32C3_UNIVERSAL_MAC_ADDRESSES=2
 CONFIG_ESP32C3_DEBUG_OCDAWARE=y
 # CONFIG_ESP32C3_DEBUG_STUBS_ENABLE is not set
-CONFIG_ESP32C3_TIME_SYSCALL_USE_RTC_SYSTIMER=y
+CONFIG_ESP32C3_TIME_SYSCALL_USE_RTC_HRT=y
 # CONFIG_ESP32C3_TIME_SYSCALL_USE_RTC is not set
-# CONFIG_ESP32C3_TIME_SYSCALL_USE_SYSTIMER is not set
+# CONFIG_ESP32C3_TIME_SYSCALL_USE_HRT is not set
 # CONFIG_ESP32C3_TIME_SYSCALL_USE_NONE is not set
-CONFIG_ESP32C3_RTC_CLK_SRC_INT_RC=y
-# CONFIG_ESP32C3_RTC_CLK_SRC_EXT_CRYS is not set
-# CONFIG_ESP32C3_RTC_CLK_SRC_EXT_OSC is not set
-# CONFIG_ESP32C3_RTC_CLK_SRC_INT_8MD256 is not set
-CONFIG_ESP32C3_RTC_CLK_CAL_CYCLES=1024
+CONFIG_RTC_CLK_SRC_INT_RC=y
+# CONFIG_RTC_CLK_SRC_EXT_CRYS is not set
+# CONFIG_RTC_CLK_SRC_EXT_OSC is not set
+# CONFIG_RTC_CLK_SRC_INT_8MD256 is not set
+CONFIG_RTC_CLK_CAL_CYCLES=1024
 # end of ESP32C3-Specific
 
 #

examples/bluetooth/bluedroid/ble/ble_throughput/throughput_client/sdkconfig.defaults.esp32s3

@@ -374,11 +374,11 @@ CONFIG_ESP32S3_TIME_SYSCALL_USE_RTC_FRC1=y
 # CONFIG_ESP32S3_TIME_SYSCALL_USE_RTC is not set
 # CONFIG_ESP32S3_TIME_SYSCALL_USE_FRC1 is not set
 # CONFIG_ESP32S3_TIME_SYSCALL_USE_NONE is not set
-CONFIG_ESP32S3_RTC_CLK_SRC_INT_RC=y
-# CONFIG_ESP32S3_RTC_CLK_SRC_EXT_CRYS is not set
-# CONFIG_ESP32S3_RTC_CLK_SRC_EXT_OSC is not set
-# CONFIG_ESP32S3_RTC_CLK_SRC_INT_8MD256 is not set
-CONFIG_ESP32S3_RTC_CLK_CAL_CYCLES=576
+CONFIG_RTC_CLK_SRC_INT_RC=y
+# CONFIG_RTC_CLK_SRC_EXT_CRYS is not set
+# CONFIG_RTC_CLK_SRC_EXT_OSC is not set
+# CONFIG_RTC_CLK_SRC_INT_8MD256 is not set
+CONFIG_RTC_CLK_CAL_CYCLES=576
 # CONFIG_ESP32S3_RTCDATA_IN_FAST_MEM is not set
 # CONFIG_ESP32S3_USE_FIXED_STATIC_RAM_SIZE is not set
 # end of ESP32S3-Specific

examples/bluetooth/bluedroid/ble/ble_throughput/throughput_server/sdkconfig.defaults.esp32

@@ -1088,18 +1088,18 @@ CONFIG_ESP32_REV_MIN_0=y
 # CONFIG_ESP32_REV_MIN_3 is not set
 CONFIG_ESP32_REV_MIN=0
 CONFIG_ESP32_DPORT_WORKAROUND=y
-# CONFIG_ESP32_DEFAULT_CPU_FREQ_80 is not set
-CONFIG_ESP32_DEFAULT_CPU_FREQ_160=y
-# CONFIG_ESP32_DEFAULT_CPU_FREQ_240 is not set
-CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ=160
+# CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_80 is not set
+CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_160=y
+# CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_240 is not set
+CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ=160
 # CONFIG_ESP32_SPIRAM_SUPPORT is not set
 # CONFIG_ESP32_TRAX is not set
 CONFIG_ESP32_TRACEMEM_RESERVE_DRAM=0x0
 # CONFIG_ESP32_UNIVERSAL_MAC_ADDRESSES_TWO is not set
 CONFIG_ESP32_UNIVERSAL_MAC_ADDRESSES_FOUR=y
 CONFIG_ESP32_UNIVERSAL_MAC_ADDRESSES=4
-# CONFIG_ESP32_ULP_COPROC_ENABLED is not set
-CONFIG_ESP32_ULP_COPROC_RESERVE_MEM=0
+# CONFIG_ULP_COPROC_ENABLED is not set
+CONFIG_ULP_COPROC_RESERVE_MEM=0
 CONFIG_ESP32_DEBUG_OCDAWARE=y
 CONFIG_ESP32_BROWNOUT_DET=y
 CONFIG_ESP32_BROWNOUT_DET_LVL_SEL_0=y
@@ -1112,15 +1112,15 @@ CONFIG_ESP32_BROWNOUT_DET_LVL_SEL_0=y
 # CONFIG_ESP32_BROWNOUT_DET_LVL_SEL_7 is not set
 CONFIG_ESP32_BROWNOUT_DET_LVL=0
 CONFIG_ESP32_REDUCE_PHY_TX_POWER=y
-CONFIG_ESP32_TIME_SYSCALL_USE_RTC_FRC1=y
-# CONFIG_ESP32_TIME_SYSCALL_USE_RTC is not set
-# CONFIG_ESP32_TIME_SYSCALL_USE_FRC1 is not set
-# CONFIG_ESP32_TIME_SYSCALL_USE_NONE is not set
-CONFIG_ESP32_RTC_CLK_SRC_INT_RC=y
-# CONFIG_ESP32_RTC_CLK_SRC_EXT_CRYS is not set
-# CONFIG_ESP32_RTC_CLK_SRC_EXT_OSC is not set
-# CONFIG_ESP32_RTC_CLK_SRC_INT_8MD256 is not set
-CONFIG_ESP32_RTC_CLK_CAL_CYCLES=1024
+CONFIG_NEWLIB_TIME_SYSCALL_USE_RTC_FRC1=y
+# CONFIG_NEWLIB_TIME_SYSCALL_USE_RTC is not set
+# CONFIG_NEWLIB_TIME_SYSCALL_USE_FRC1 is not set
+# CONFIG_NEWLIB_TIME_SYSCALL_USE_NONE is not set
+CONFIG_RTC_CLK_SRC_INT_RC=y
+# CONFIG_RTC_CLK_SRC_EXT_CRYS is not set
+# CONFIG_RTC_CLK_SRC_EXT_OSC is not set
+# CONFIG_RTC_CLK_SRC_INT_8MD256 is not set
+CONFIG_RTC_CLK_CAL_CYCLES=1024
 CONFIG_ESP32_DEEP_SLEEP_WAKEUP_DELAY=2000
 CONFIG_ESP32_XTAL_FREQ_40=y
 # CONFIG_ESP32_XTAL_FREQ_26 is not set
@@ -1662,10 +1662,10 @@ CONFIG_BROWNOUT_DET_LVL_SEL_0=y
 # CONFIG_BROWNOUT_DET_LVL_SEL_7 is not set
 CONFIG_BROWNOUT_DET_LVL=0
 CONFIG_REDUCE_PHY_TX_POWER=y
-CONFIG_ESP32_RTC_CLOCK_SOURCE_INTERNAL_RC=y
-# CONFIG_ESP32_RTC_CLOCK_SOURCE_EXTERNAL_CRYSTAL is not set
-# CONFIG_ESP32_RTC_CLOCK_SOURCE_EXTERNAL_OSC is not set
-# CONFIG_ESP32_RTC_CLOCK_SOURCE_INTERNAL_8MD256 is not set
+CONFIG_RTC_CLOCK_SOURCE_INTERNAL_RC=y
+# CONFIG_RTC_CLOCK_SOURCE_EXTERNAL_CRYSTAL is not set
+# CONFIG_RTC_CLOCK_SOURCE_EXTERNAL_OSC is not set
+# CONFIG_RTC_CLOCK_SOURCE_INTERNAL_8MD256 is not set
 # CONFIG_DISABLE_BASIC_ROM_CONSOLE is not set
 # CONFIG_COMPATIBLE_PRE_V2_1_BOOTLOADERS is not set
 # CONFIG_L2_TO_L3_COPY is not set