adc: remove adc_hal_conf.h

Macros inside adc_hal_conf.h are moved to adc_ll.h

components/driver/deprecated/adc_i2s_deprecated.c

@@ -16,7 +16,6 @@
 #include "hal/adc_hal.h"
 #include "hal/adc_ll.h"
 #include "hal/adc_types.h"
-#include "hal/adc_hal_conf.h"
 #ifdef CONFIG_PM_ENABLE
 #include "esp_pm.h"
 #endif
@@ -235,13 +234,13 @@ esp_err_t adc_i2s_mode_init(adc_unit_t adc_unit, adc_channel_t channel)
     }
     adc_common_gpio_init(adc_unit, channel);
     ADC_ENTER_CRITICAL();
-    adc_ll_digi_set_fsm_time(ADC_HAL_FSM_RSTB_WAIT_DEFAULT, ADC_HAL_FSM_START_WAIT_DEFAULT,
-                             ADC_HAL_FSM_STANDBY_WAIT_DEFAULT);
-    adc_ll_set_sample_cycle(ADC_HAL_SAMPLE_CYCLE_DEFAULT);
-    adc_hal_pwdet_set_cct(ADC_HAL_PWDET_CCT_DEFAULT);
-    adc_ll_digi_output_invert(ADC_UNIT_1, ADC_HAL_DIGI_DATA_INVERT_DEFAULT(ADC_UNIT_1));
-    adc_ll_digi_output_invert(ADC_UNIT_2, ADC_HAL_DIGI_DATA_INVERT_DEFAULT(ADC_UNIT_2));
-    adc_ll_digi_set_clk_div(ADC_HAL_DIGI_SAR_CLK_DIV_DEFAULT);
+    adc_ll_digi_set_fsm_time(ADC_LL_FSM_RSTB_WAIT_DEFAULT, ADC_LL_FSM_START_WAIT_DEFAULT,
+                             ADC_LL_FSM_STANDBY_WAIT_DEFAULT);
+    adc_ll_set_sample_cycle(ADC_LL_SAMPLE_CYCLE_DEFAULT);
+    adc_hal_pwdet_set_cct(ADC_LL_PWDET_CCT_DEFAULT);
+    adc_ll_digi_output_invert(ADC_UNIT_1, ADC_LL_DIGI_DATA_INVERT_DEFAULT(ADC_UNIT_1));
+    adc_ll_digi_output_invert(ADC_UNIT_2, ADC_LL_DIGI_DATA_INVERT_DEFAULT(ADC_UNIT_2));
+    adc_ll_digi_set_clk_div(ADC_LL_DIGI_SAR_CLK_DIV_DEFAULT);
     adc_digi_controller_reg_set(&dig_cfg);
     ADC_EXIT_CRITICAL();
 

components/driver/deprecated/adc_legacy.c

@@ -25,7 +25,6 @@
 #include "hal/adc_types.h"
 #include "hal/adc_hal.h"
 #include "hal/adc_hal_common.h"
-#include "hal/adc_hal_conf.h"
 #include "esp_private/periph_ctrl.h"
 #include "driver/adc_types_legacy.h"
 #include "clk_tree.h"
@@ -157,17 +156,17 @@ static void adc_rtc_chan_init(adc_unit_t adc_unit)
 #if SOC_DAC_SUPPORTED
         dac_ll_rtc_sync_by_adc(false);
 #endif
-        adc_oneshot_ll_output_invert(ADC_UNIT_1, ADC_HAL_DATA_INVERT_DEFAULT(ADC_UNIT_1));
-        adc_ll_set_sar_clk_div(ADC_UNIT_1, ADC_HAL_SAR_CLK_DIV_DEFAULT(ADC_UNIT_1));
+        adc_oneshot_ll_output_invert(ADC_UNIT_1, ADC_LL_DATA_INVERT_DEFAULT(ADC_UNIT_1));
+        adc_ll_set_sar_clk_div(ADC_UNIT_1, ADC_LL_SAR_CLK_DIV_DEFAULT(ADC_UNIT_1));
 #ifdef CONFIG_IDF_TARGET_ESP32
         adc_ll_hall_disable(); //Disable other peripherals.
         adc_ll_amp_disable();  //Currently the LNA is not open, close it by default.
 #endif
     }
     if (adc_unit == ADC_UNIT_2) {
-        adc_hal_pwdet_set_cct(ADC_HAL_PWDET_CCT_DEFAULT);
-        adc_oneshot_ll_output_invert(ADC_UNIT_2, ADC_HAL_DATA_INVERT_DEFAULT(ADC_UNIT_2));
-        adc_ll_set_sar_clk_div(ADC_UNIT_2, ADC_HAL_SAR_CLK_DIV_DEFAULT(ADC_UNIT_2));
+        adc_hal_pwdet_set_cct(ADC_LL_PWDET_CCT_DEFAULT);
+        adc_oneshot_ll_output_invert(ADC_UNIT_2, ADC_LL_DATA_INVERT_DEFAULT(ADC_UNIT_2));
+        adc_ll_set_sar_clk_div(ADC_UNIT_2, ADC_LL_SAR_CLK_DIV_DEFAULT(ADC_UNIT_2));
     }
 }
 

components/esp_adc/adc_common.c

@@ -15,7 +15,6 @@
 #include "driver/gpio.h"
 #include "hal/adc_hal.h"
 #include "hal/adc_hal_common.h"
-#include "hal/adc_hal_conf.h"
 #include "soc/adc_periph.h"
 
 

components/esp_adc/adc_oneshot.c

@@ -22,7 +22,6 @@
 #include "hal/adc_types.h"
 #include "hal/adc_oneshot_hal.h"
 #include "hal/adc_ll.h"
-#include "hal/adc_hal_conf.h"
 #include "soc/adc_periph.h"
 
 

components/esp_hw_support/adc_share_hw_ctrl.c

@@ -26,7 +26,6 @@
 #include "hal/adc_types.h"
 #include "hal/adc_hal.h"
 #include "hal/adc_hal_common.h"
-#include "hal/adc_hal_conf.h"
 #include "esp_private/adc_share_hw_ctrl.h"
 #include "esp_private/sar_periph_ctrl.h"
 //For calibration
@@ -77,7 +76,7 @@ void adc_calc_hw_calibration_code(adc_unit_t adc_n, adc_atten_t atten)
         ESP_EARLY_LOGD(TAG, "Calibration eFuse is not configured, use self-calibration for ICode");
         sar_periph_ctrl_adc_oneshot_power_acquire();
         portENTER_CRITICAL(&rtc_spinlock);
-        adc_ll_pwdet_set_cct(ADC_HAL_PWDET_CCT_DEFAULT);
+        adc_ll_pwdet_set_cct(ADC_LL_PWDET_CCT_DEFAULT);
         const bool internal_gnd = true;
         init_code = adc_hal_self_calibration(adc_n, atten, internal_gnd);
         portEXIT_CRITICAL(&rtc_spinlock);

components/hal/adc_hal.c

@@ -7,7 +7,6 @@
 #include <sys/param.h>
 #include "sdkconfig.h"
 #include "hal/adc_hal.h"
-#include "hal/adc_hal_conf.h"
 #include "hal/assert.h"
 #include "soc/lldesc.h"
 #include "soc/soc_caps.h"
@@ -105,13 +104,13 @@ void adc_hal_dma_ctx_config(adc_hal_dma_ctx_t *hal, const adc_hal_dma_config_t *
 void adc_hal_digi_init(adc_hal_dma_ctx_t *hal)
 {
     // Set internal FSM wait time, fixed value.
-    adc_ll_digi_set_fsm_time(ADC_HAL_FSM_RSTB_WAIT_DEFAULT, ADC_HAL_FSM_START_WAIT_DEFAULT,
-                             ADC_HAL_FSM_STANDBY_WAIT_DEFAULT);
-    adc_ll_set_sample_cycle(ADC_HAL_SAMPLE_CYCLE_DEFAULT);
-    adc_hal_pwdet_set_cct(ADC_HAL_PWDET_CCT_DEFAULT);
-    adc_ll_digi_output_invert(ADC_UNIT_1, ADC_HAL_DIGI_DATA_INVERT_DEFAULT(ADC_UNIT_1));
-    adc_ll_digi_output_invert(ADC_UNIT_2, ADC_HAL_DIGI_DATA_INVERT_DEFAULT(ADC_UNIT_2));
-    adc_ll_digi_set_clk_div(ADC_HAL_DIGI_SAR_CLK_DIV_DEFAULT);
+    adc_ll_digi_set_fsm_time(ADC_LL_FSM_RSTB_WAIT_DEFAULT, ADC_LL_FSM_START_WAIT_DEFAULT,
+                             ADC_LL_FSM_STANDBY_WAIT_DEFAULT);
+    adc_ll_set_sample_cycle(ADC_LL_SAMPLE_CYCLE_DEFAULT);
+    adc_hal_pwdet_set_cct(ADC_LL_PWDET_CCT_DEFAULT);
+    adc_ll_digi_output_invert(ADC_UNIT_1, ADC_LL_DIGI_DATA_INVERT_DEFAULT(ADC_UNIT_1));
+    adc_ll_digi_output_invert(ADC_UNIT_2, ADC_LL_DIGI_DATA_INVERT_DEFAULT(ADC_UNIT_2));
+    adc_ll_digi_set_clk_div(ADC_LL_DIGI_SAR_CLK_DIV_DEFAULT);
 
     adc_dma_ll_rx_clear_intr(hal->dev, hal->dma_chan, ADC_HAL_DMA_INTR_MASK);
     adc_dma_ll_rx_enable_intr(hal->dev, hal->dma_chan, ADC_HAL_DMA_INTR_MASK);

components/hal/adc_oneshot_hal.c

@@ -9,7 +9,6 @@
 #include "soc/soc_caps.h"
 #include "hal/adc_oneshot_hal.h"
 #include "hal/adc_hal_common.h"
-#include "hal/adc_hal_conf.h"
 #include "hal/adc_ll.h"
 #include "hal/assert.h"
 #include "hal/log.h"
@@ -62,13 +61,13 @@ void adc_oneshot_hal_setup(adc_oneshot_hal_ctx_t *hal, adc_channel_t chan)
 #if SOC_ADC_DIG_CTRL_SUPPORTED && !SOC_ADC_RTC_CTRL_SUPPORTED
     adc_ll_digi_clk_sel(hal->clk_src);
 #else
-    adc_ll_set_sar_clk_div(unit, ADC_HAL_SAR_CLK_DIV_DEFAULT(unit));
+    adc_ll_set_sar_clk_div(unit, ADC_LL_SAR_CLK_DIV_DEFAULT(unit));
     if (unit == ADC_UNIT_2) {
-        adc_ll_pwdet_set_cct(ADC_HAL_PWDET_CCT_DEFAULT);
+        adc_ll_pwdet_set_cct(ADC_LL_PWDET_CCT_DEFAULT);
     }
 #endif
 
-    adc_oneshot_ll_output_invert(unit, ADC_HAL_DATA_INVERT_DEFAULT(unit));
+    adc_oneshot_ll_output_invert(unit, ADC_LL_DATA_INVERT_DEFAULT(unit));
     adc_oneshot_ll_set_atten(unit, chan, hal->chan_configs[chan].atten);
     adc_oneshot_ll_set_output_bits(unit, hal->chan_configs[chan].bitwidth);
     adc_oneshot_ll_set_channel(unit, chan);

components/hal/esp32/include/hal/adc_hal_conf.h

@@ -1,28 +0,0 @@
-/*
- * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-
-#pragma once
-
-/*---------------------------------------------------------------
-                    Single Read
----------------------------------------------------------------*/
-#define ADC_HAL_DATA_INVERT_DEFAULT(PERIPH_NUM)         (1)
-#define ADC_HAL_SAR_CLK_DIV_DEFAULT(PERIPH_NUM)         (2)
-
-/*---------------------------------------------------------------
-                    DMA Read
----------------------------------------------------------------*/
-#define ADC_HAL_DIGI_DATA_INVERT_DEFAULT(PERIPH_NUM)    (1)
-#define ADC_HAL_FSM_RSTB_WAIT_DEFAULT                   (8)
-#define ADC_HAL_FSM_START_WAIT_DEFAULT                  (ADC_HAL_DIGI_SAR_CLK_DIV_DEFAULT)
-#define ADC_HAL_FSM_STANDBY_WAIT_DEFAULT                (100)
-#define ADC_HAL_SAMPLE_CYCLE_DEFAULT                    (2)
-#define ADC_HAL_DIGI_SAR_CLK_DIV_DEFAULT                (16)
-
-/*---------------------------------------------------------------
-                    PWDET (Power Detect)
----------------------------------------------------------------*/
-#define ADC_HAL_PWDET_CCT_DEFAULT                       (4)

components/hal/esp32/include/hal/adc_ll.h

@@ -25,10 +25,31 @@ extern "C" {
 #define ADC_LL_EVENT_ADC1_ONESHOT_DONE    (1 << 0)
 #define ADC_LL_EVENT_ADC2_ONESHOT_DONE    (1 << 1)
 
+/*---------------------------------------------------------------
+                    Oneshot
+---------------------------------------------------------------*/
+#define ADC_LL_DATA_INVERT_DEFAULT(PERIPH_NUM)         (1)
+#define ADC_LL_SAR_CLK_DIV_DEFAULT(PERIPH_NUM)         (2)
+
+/*---------------------------------------------------------------
+                    DMA
+---------------------------------------------------------------*/
+#define ADC_LL_DIGI_DATA_INVERT_DEFAULT(PERIPH_NUM)    (1)
+#define ADC_LL_FSM_RSTB_WAIT_DEFAULT                   (8)
+#define ADC_LL_FSM_START_WAIT_DEFAULT                  (ADC_LL_DIGI_SAR_CLK_DIV_DEFAULT)
+#define ADC_LL_FSM_STANDBY_WAIT_DEFAULT                (100)
+#define ADC_LL_SAMPLE_CYCLE_DEFAULT                    (2)
+#define ADC_LL_DIGI_SAR_CLK_DIV_DEFAULT                (16)
+
 //On esp32, ADC can only be continuously triggered when `ADC_LL_DEFAULT_CONV_LIMIT_EN == 1`, `ADC_LL_DEFAULT_CONV_LIMIT_NUM != 0`
 #define ADC_LL_DEFAULT_CONV_LIMIT_EN      1
 #define ADC_LL_DEFAULT_CONV_LIMIT_NUM     10
 
+/*---------------------------------------------------------------
+                    PWDET (Power Detect)
+---------------------------------------------------------------*/
+#define ADC_LL_PWDET_CCT_DEFAULT                       (4)
+
 typedef enum {
     ADC_LL_CTRL_RTC   = 0,    ///< For ADC1 and ADC2. Select RTC controller.
     ADC_LL_CTRL_ULP   = 1,    ///< For ADC1 and ADC2. Select ULP controller.

components/hal/esp32c2/include/hal/adc_hal_conf.h

@@ -1,28 +0,0 @@
-/*
- * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-
-#pragma once
-
-/*---------------------------------------------------------------
-                    Single Read
----------------------------------------------------------------*/
-#define ADC_HAL_DATA_INVERT_DEFAULT(PERIPH_NUM)         (0)
-#define ADC_HAL_SAR_CLK_DIV_DEFAULT(PERIPH_NUM)         ((PERIPH_NUM==0)? 2 : 1)
-
-/*---------------------------------------------------------------
-                    DMA Read
----------------------------------------------------------------*/
-#define ADC_HAL_DIGI_DATA_INVERT_DEFAULT(PERIPH_NUM)    (0)
-#define ADC_HAL_FSM_RSTB_WAIT_DEFAULT                   (8)
-#define ADC_HAL_FSM_START_WAIT_DEFAULT                  (5)
-#define ADC_HAL_FSM_STANDBY_WAIT_DEFAULT                (100)
-#define ADC_HAL_SAMPLE_CYCLE_DEFAULT                    (2)
-#define ADC_HAL_DIGI_SAR_CLK_DIV_DEFAULT                (1)
-
-/*---------------------------------------------------------------
-                    PWDET (Power Detect)
----------------------------------------------------------------*/
-#define ADC_HAL_PWDET_CCT_DEFAULT                       (4)

components/hal/esp32c2/include/hal/adc_ll.h

@@ -26,12 +26,33 @@
 extern "C" {
 #endif
 
+#define ADC_LL_EVENT_ADC1_ONESHOT_DONE    BIT(31)
+#define ADC_LL_EVENT_ADC2_ONESHOT_DONE    BIT(30)
+
+/*---------------------------------------------------------------
+                    Oneshot
+---------------------------------------------------------------*/
+#define ADC_LL_DATA_INVERT_DEFAULT(PERIPH_NUM)         (0)
+#define ADC_LL_SAR_CLK_DIV_DEFAULT(PERIPH_NUM)         ((PERIPH_NUM==0)? 2 : 1)
+
+/*---------------------------------------------------------------
+                    DMA
+---------------------------------------------------------------*/
+#define ADC_LL_DIGI_DATA_INVERT_DEFAULT(PERIPH_NUM)    (0)
+#define ADC_LL_FSM_RSTB_WAIT_DEFAULT                   (8)
+#define ADC_LL_FSM_START_WAIT_DEFAULT                  (5)
+#define ADC_LL_FSM_STANDBY_WAIT_DEFAULT                (100)
+#define ADC_LL_SAMPLE_CYCLE_DEFAULT                    (2)
+#define ADC_LL_DIGI_SAR_CLK_DIV_DEFAULT                (1)
+
 #define ADC_LL_CLKM_DIV_NUM_DEFAULT       15
 #define ADC_LL_CLKM_DIV_B_DEFAULT         1
 #define ADC_LL_CLKM_DIV_A_DEFAULT         0
 
-#define ADC_LL_EVENT_ADC1_ONESHOT_DONE    BIT(31)
-#define ADC_LL_EVENT_ADC2_ONESHOT_DONE    BIT(30)
+/*---------------------------------------------------------------
+                    PWDET (Power Detect)
+---------------------------------------------------------------*/
+#define ADC_LL_PWDET_CCT_DEFAULT                       (4)
 
 typedef enum {
     ADC_LL_POWER_BY_FSM,   /*!< ADC XPD controlled by FSM. Used for polling mode */

components/hal/esp32c3/include/hal/adc_hal_conf.h

@@ -1,28 +0,0 @@
-/*
- * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-
-#pragma once
-
-/*---------------------------------------------------------------
-                    Single Read
----------------------------------------------------------------*/
-#define ADC_HAL_DATA_INVERT_DEFAULT(PERIPH_NUM)         (0)
-#define ADC_HAL_SAR_CLK_DIV_DEFAULT(PERIPH_NUM)         ((PERIPH_NUM==0)? 2 : 1)
-
-/*---------------------------------------------------------------
-                    DMA Read
----------------------------------------------------------------*/
-#define ADC_HAL_DIGI_DATA_INVERT_DEFAULT(PERIPH_NUM)    (0)
-#define ADC_HAL_FSM_RSTB_WAIT_DEFAULT                   (8)
-#define ADC_HAL_FSM_START_WAIT_DEFAULT                  (5)
-#define ADC_HAL_FSM_STANDBY_WAIT_DEFAULT                (100)
-#define ADC_HAL_SAMPLE_CYCLE_DEFAULT                    (2)
-#define ADC_HAL_DIGI_SAR_CLK_DIV_DEFAULT                (1)
-
-/*---------------------------------------------------------------
-                    PWDET (Power Detect)
----------------------------------------------------------------*/
-#define ADC_HAL_PWDET_CCT_DEFAULT                       (4)

components/hal/esp32c3/include/hal/adc_ll.h

@@ -27,12 +27,6 @@
 extern "C" {
 #endif
 
-#define ADC_LL_CLKM_DIV_NUM_DEFAULT       15
-#define ADC_LL_CLKM_DIV_B_DEFAULT         1
-#define ADC_LL_CLKM_DIV_A_DEFAULT         0
-#define ADC_LL_DEFAULT_CONV_LIMIT_EN      0
-#define ADC_LL_DEFAULT_CONV_LIMIT_NUM     10
-
 #define ADC_LL_EVENT_ADC1_ONESHOT_DONE    BIT(31)
 #define ADC_LL_EVENT_ADC2_ONESHOT_DONE    BIT(30)
 #define ADC_LL_EVENT_THRES0_HIGH          BIT(29)
@@ -40,6 +34,33 @@ extern "C" {
 #define ADC_LL_EVENT_THRES0_LOW           BIT(27)
 #define ADC_LL_EVENT_THRES1_LOW           BIT(26)
 
+/*---------------------------------------------------------------
+                    Oneshot
+---------------------------------------------------------------*/
+#define ADC_LL_DATA_INVERT_DEFAULT(PERIPH_NUM)         (0)
+#define ADC_LL_SAR_CLK_DIV_DEFAULT(PERIPH_NUM)         ((PERIPH_NUM==0)? 2 : 1)
+
+/*---------------------------------------------------------------
+                    DMA
+---------------------------------------------------------------*/
+#define ADC_LL_DIGI_DATA_INVERT_DEFAULT(PERIPH_NUM)    (0)
+#define ADC_LL_FSM_RSTB_WAIT_DEFAULT                   (8)
+#define ADC_LL_FSM_START_WAIT_DEFAULT                  (5)
+#define ADC_LL_FSM_STANDBY_WAIT_DEFAULT                (100)
+#define ADC_LL_SAMPLE_CYCLE_DEFAULT                    (2)
+#define ADC_LL_DIGI_SAR_CLK_DIV_DEFAULT                (1)
+
+#define ADC_LL_CLKM_DIV_NUM_DEFAULT       15
+#define ADC_LL_CLKM_DIV_B_DEFAULT         1
+#define ADC_LL_CLKM_DIV_A_DEFAULT         0
+#define ADC_LL_DEFAULT_CONV_LIMIT_EN      0
+#define ADC_LL_DEFAULT_CONV_LIMIT_NUM     10
+
+/*---------------------------------------------------------------
+                    PWDET (Power Detect)
+---------------------------------------------------------------*/
+#define ADC_LL_PWDET_CCT_DEFAULT                       (4)
+
 typedef enum {
     ADC_LL_POWER_BY_FSM,   /*!< ADC XPD controlled by FSM. Used for polling mode */
     ADC_LL_POWER_SW_ON,    /*!< ADC XPD controlled by SW. power on. Used for DMA mode */

components/hal/esp32c6/include/hal/adc_hal_conf.h

@@ -1,28 +0,0 @@
-/*
- * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-
-#pragma once
-
-/*---------------------------------------------------------------
-                    Single Read
----------------------------------------------------------------*/
-#define ADC_HAL_DATA_INVERT_DEFAULT(PERIPH_NUM)         (0)
-#define ADC_HAL_SAR_CLK_DIV_DEFAULT(PERIPH_NUM)         (2)
-
-/*---------------------------------------------------------------
-                    DMA Read
----------------------------------------------------------------*/
-#define ADC_HAL_DIGI_DATA_INVERT_DEFAULT(PERIPH_NUM)    (0)
-#define ADC_HAL_FSM_RSTB_WAIT_DEFAULT                   (8)
-#define ADC_HAL_FSM_START_WAIT_DEFAULT                  (5)
-#define ADC_HAL_FSM_STANDBY_WAIT_DEFAULT                (100)
-#define ADC_HAL_SAMPLE_CYCLE_DEFAULT                    (2)
-#define ADC_HAL_DIGI_SAR_CLK_DIV_DEFAULT                (1)
-
-/*---------------------------------------------------------------
-                    PWDET (Power Detect)
----------------------------------------------------------------*/
-#define ADC_HAL_PWDET_CCT_DEFAULT                       (4)

components/hal/esp32c6/include/hal/adc_ll.h

@@ -28,12 +28,6 @@
 extern "C" {
 #endif
 
-#define ADC_LL_CLKM_DIV_NUM_DEFAULT       15
-#define ADC_LL_CLKM_DIV_B_DEFAULT         1
-#define ADC_LL_CLKM_DIV_A_DEFAULT         0
-#define ADC_LL_DEFAULT_CONV_LIMIT_EN      0
-#define ADC_LL_DEFAULT_CONV_LIMIT_NUM     10
-
 #define ADC_LL_EVENT_ADC1_ONESHOT_DONE    BIT(31)
 #define ADC_LL_EVENT_ADC2_ONESHOT_DONE    BIT(30)
 #define ADC_LL_EVENT_THRES0_HIGH          BIT(29)
@@ -41,6 +35,33 @@ extern "C" {
 #define ADC_LL_EVENT_THRES0_LOW           BIT(27)
 #define ADC_LL_EVENT_THRES1_LOW           BIT(26)
 
+/*---------------------------------------------------------------
+                    Oneshot
+---------------------------------------------------------------*/
+#define ADC_LL_DATA_INVERT_DEFAULT(PERIPH_NUM)         (0)
+#define ADC_LL_SAR_CLK_DIV_DEFAULT(PERIPH_NUM)         (2)
+
+/*---------------------------------------------------------------
+                    DMA
+---------------------------------------------------------------*/
+#define ADC_LL_DIGI_DATA_INVERT_DEFAULT(PERIPH_NUM)    (0)
+#define ADC_LL_FSM_RSTB_WAIT_DEFAULT                   (8)
+#define ADC_LL_FSM_START_WAIT_DEFAULT                  (5)
+#define ADC_LL_FSM_STANDBY_WAIT_DEFAULT                (100)
+#define ADC_LL_SAMPLE_CYCLE_DEFAULT                    (2)
+#define ADC_LL_DIGI_SAR_CLK_DIV_DEFAULT                (1)
+
+#define ADC_LL_CLKM_DIV_NUM_DEFAULT       15
+#define ADC_LL_CLKM_DIV_B_DEFAULT         1
+#define ADC_LL_CLKM_DIV_A_DEFAULT         0
+#define ADC_LL_DEFAULT_CONV_LIMIT_EN      0
+#define ADC_LL_DEFAULT_CONV_LIMIT_NUM     10
+
+/*---------------------------------------------------------------
+                    PWDET (Power Detect)
+---------------------------------------------------------------*/
+#define ADC_LL_PWDET_CCT_DEFAULT                       (4)
+
 typedef enum {
     ADC_LL_POWER_BY_FSM = SAR_CTRL_LL_POWER_FSM,   /*!< ADC XPD controlled by FSM. Used for polling mode */
     ADC_LL_POWER_SW_ON = SAR_CTRL_LL_POWER_ON,    /*!< ADC XPD controlled by SW. power on. Used for DMA mode */

components/hal/esp32h2/include/hal/adc_hal_conf.h

@@ -1,28 +0,0 @@
-/*
- * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-
-#pragma once
-
-/*---------------------------------------------------------------
-                    Single Read
----------------------------------------------------------------*/
-#define ADC_HAL_DATA_INVERT_DEFAULT(PERIPH_NUM)         (0)
-#define ADC_HAL_SAR_CLK_DIV_DEFAULT(PERIPH_NUM)         (2)
-
-/*---------------------------------------------------------------
-                    DMA Read
----------------------------------------------------------------*/
-#define ADC_HAL_DIGI_DATA_INVERT_DEFAULT(PERIPH_NUM)    (0)
-#define ADC_HAL_FSM_RSTB_WAIT_DEFAULT                   (8)
-#define ADC_HAL_FSM_START_WAIT_DEFAULT                  (5)
-#define ADC_HAL_FSM_STANDBY_WAIT_DEFAULT                (100)
-#define ADC_HAL_SAMPLE_CYCLE_DEFAULT                    (2)
-#define ADC_HAL_DIGI_SAR_CLK_DIV_DEFAULT                (2)
-
-/*---------------------------------------------------------------
-                    PWDET (Power Detect)
----------------------------------------------------------------*/
-#define ADC_HAL_PWDET_CCT_DEFAULT                       (4)

components/hal/esp32h2/include/hal/adc_ll.h

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -28,12 +28,6 @@
 extern "C" {
 #endif
 
-#define ADC_LL_CLKM_DIV_NUM_DEFAULT       19
-#define ADC_LL_CLKM_DIV_B_DEFAULT         1
-#define ADC_LL_CLKM_DIV_A_DEFAULT         0
-#define ADC_LL_DEFAULT_CONV_LIMIT_EN      0
-#define ADC_LL_DEFAULT_CONV_LIMIT_NUM     10
-
 #define ADC_LL_EVENT_ADC1_ONESHOT_DONE    BIT(31)
 #define ADC_LL_EVENT_ADC2_ONESHOT_DONE    BIT(30)
 #define ADC_LL_EVENT_THRES0_HIGH          BIT(29)
@@ -41,6 +35,33 @@ extern "C" {
 #define ADC_LL_EVENT_THRES0_LOW           BIT(27)
 #define ADC_LL_EVENT_THRES1_LOW           BIT(26)
 
+/*---------------------------------------------------------------
+                    Oneshot
+---------------------------------------------------------------*/
+#define ADC_LL_DATA_INVERT_DEFAULT(PERIPH_NUM)         (0)
+#define ADC_LL_SAR_CLK_DIV_DEFAULT(PERIPH_NUM)         (2)
+
+/*---------------------------------------------------------------
+                    DMA
+---------------------------------------------------------------*/
+#define ADC_LL_DIGI_DATA_INVERT_DEFAULT(PERIPH_NUM)    (0)
+#define ADC_LL_FSM_RSTB_WAIT_DEFAULT                   (8)
+#define ADC_LL_FSM_START_WAIT_DEFAULT                  (5)
+#define ADC_LL_FSM_STANDBY_WAIT_DEFAULT                (100)
+#define ADC_LL_SAMPLE_CYCLE_DEFAULT                    (2)
+#define ADC_LL_DIGI_SAR_CLK_DIV_DEFAULT                (2)
+
+#define ADC_LL_CLKM_DIV_NUM_DEFAULT       19
+#define ADC_LL_CLKM_DIV_B_DEFAULT         1
+#define ADC_LL_CLKM_DIV_A_DEFAULT         0
+#define ADC_LL_DEFAULT_CONV_LIMIT_EN      0
+#define ADC_LL_DEFAULT_CONV_LIMIT_NUM     10
+
+/*---------------------------------------------------------------
+                    PWDET (Power Detect)
+---------------------------------------------------------------*/
+#define ADC_LL_PWDET_CCT_DEFAULT                       (4)
+
 typedef enum {
     ADC_LL_POWER_BY_FSM = SAR_CTRL_LL_POWER_FSM,   /*!< ADC XPD controlled by FSM. Used for polling mode */
     ADC_LL_POWER_SW_ON = SAR_CTRL_LL_POWER_ON,    /*!< ADC XPD controlled by SW. power on. Used for DMA mode */

components/hal/esp32h4/include/hal/adc_hal_conf.h

@@ -1,28 +0,0 @@
-/*
- * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-
-#pragma once
-
-/*---------------------------------------------------------------
-                    Single Read
----------------------------------------------------------------*/
-#define ADC_HAL_DATA_INVERT_DEFAULT(PERIPH_NUM)         (0)
-#define ADC_HAL_SAR_CLK_DIV_DEFAULT(PERIPH_NUM)         ((PERIPH_NUM==0)? 2 : 1)
-
-/*---------------------------------------------------------------
-                    DMA Read
----------------------------------------------------------------*/
-#define ADC_HAL_DIGI_DATA_INVERT_DEFAULT(PERIPH_NUM)    (0)
-#define ADC_HAL_FSM_RSTB_WAIT_DEFAULT                   (8)
-#define ADC_HAL_FSM_START_WAIT_DEFAULT                  (5)
-#define ADC_HAL_FSM_STANDBY_WAIT_DEFAULT                (100)
-#define ADC_HAL_SAMPLE_CYCLE_DEFAULT                    (2)
-#define ADC_HAL_DIGI_SAR_CLK_DIV_DEFAULT                (1)
-
-/*---------------------------------------------------------------
-                    PWDET (Power Detect)
----------------------------------------------------------------*/
-#define ADC_HAL_PWDET_CCT_DEFAULT                       (4)

components/hal/esp32h4/include/hal/adc_ll.h

@@ -27,14 +27,35 @@
 extern "C" {
 #endif
 
+#define ADC_LL_EVENT_ADC1_ONESHOT_DONE    BIT(31)
+#define ADC_LL_EVENT_ADC2_ONESHOT_DONE    BIT(30)
+
+/*---------------------------------------------------------------
+                    Oneshot
+---------------------------------------------------------------*/
+#define ADC_LL_DATA_INVERT_DEFAULT(PERIPH_NUM)         (0)
+#define ADC_LL_SAR_CLK_DIV_DEFAULT(PERIPH_NUM)         ((PERIPH_NUM==0)? 2 : 1)
+
+/*---------------------------------------------------------------
+                    DMA
+---------------------------------------------------------------*/
+#define ADC_LL_DIGI_DATA_INVERT_DEFAULT(PERIPH_NUM)    (0)
+#define ADC_LL_FSM_RSTB_WAIT_DEFAULT                   (8)
+#define ADC_LL_FSM_START_WAIT_DEFAULT                  (5)
+#define ADC_LL_FSM_STANDBY_WAIT_DEFAULT                (100)
+#define ADC_LL_SAMPLE_CYCLE_DEFAULT                    (2)
+#define ADC_LL_DIGI_SAR_CLK_DIV_DEFAULT                (1)
+
 #define ADC_LL_CLKM_DIV_NUM_DEFAULT       15
 #define ADC_LL_CLKM_DIV_B_DEFAULT         1
 #define ADC_LL_CLKM_DIV_A_DEFAULT         0
 #define ADC_LL_DEFAULT_CONV_LIMIT_EN      0
 #define ADC_LL_DEFAULT_CONV_LIMIT_NUM     10
 
-#define ADC_LL_EVENT_ADC1_ONESHOT_DONE    BIT(31)
-#define ADC_LL_EVENT_ADC2_ONESHOT_DONE    BIT(30)
+/*---------------------------------------------------------------
+                    PWDET (Power Detect)
+---------------------------------------------------------------*/
+#define ADC_LL_PWDET_CCT_DEFAULT                       (4)
 
 typedef enum {
     ADC_LL_POWER_BY_FSM,   /*!< ADC XPD controlled by FSM. Used for polling mode */

components/hal/esp32s2/include/hal/adc_hal_conf.h

@@ -1,28 +0,0 @@
-/*
- * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-
-#pragma once
-
-/*---------------------------------------------------------------
-                    Single Read
----------------------------------------------------------------*/
-#define ADC_HAL_DATA_INVERT_DEFAULT(PERIPH_NUM)         (0)
-#define ADC_HAL_SAR_CLK_DIV_DEFAULT(PERIPH_NUM)         ((PERIPH_NUM==0)? 2 : 1)
-
-/*---------------------------------------------------------------
-                    DMA Read
----------------------------------------------------------------*/
-#define ADC_HAL_DIGI_DATA_INVERT_DEFAULT(PERIPH_NUM)    (0)
-#define ADC_HAL_FSM_RSTB_WAIT_DEFAULT                   (8)
-#define ADC_HAL_FSM_START_WAIT_DEFAULT                  (5)
-#define ADC_HAL_FSM_STANDBY_WAIT_DEFAULT                (100)
-#define ADC_HAL_SAMPLE_CYCLE_DEFAULT                    (3)
-#define ADC_HAL_DIGI_SAR_CLK_DIV_DEFAULT                (2)
-
-/*---------------------------------------------------------------
-                    PWDET (Power Detect)
----------------------------------------------------------------*/
-#define ADC_HAL_PWDET_CCT_DEFAULT                       (4)

components/hal/esp32s2/include/hal/adc_ll.h

@@ -27,14 +27,35 @@
 extern "C" {
 #endif
 
+#define ADC_LL_EVENT_ADC1_ONESHOT_DONE    (1 << 0)
+#define ADC_LL_EVENT_ADC2_ONESHOT_DONE    (1 << 1)
+
+/*---------------------------------------------------------------
+                    Oneshot
+---------------------------------------------------------------*/
+#define ADC_LL_DATA_INVERT_DEFAULT(PERIPH_NUM)         (0)
+#define ADC_LL_SAR_CLK_DIV_DEFAULT(PERIPH_NUM)         ((PERIPH_NUM==0)? 2 : 1)
+
+/*---------------------------------------------------------------
+                    DMA
+---------------------------------------------------------------*/
+#define ADC_LL_DIGI_DATA_INVERT_DEFAULT(PERIPH_NUM)    (0)
+#define ADC_LL_FSM_RSTB_WAIT_DEFAULT                   (8)
+#define ADC_LL_FSM_START_WAIT_DEFAULT                  (5)
+#define ADC_LL_FSM_STANDBY_WAIT_DEFAULT                (100)
+#define ADC_LL_SAMPLE_CYCLE_DEFAULT                    (3)
+#define ADC_LL_DIGI_SAR_CLK_DIV_DEFAULT                (2)
+
 #define ADC_LL_CLKM_DIV_NUM_DEFAULT       15
 #define ADC_LL_CLKM_DIV_B_DEFAULT         1
 #define ADC_LL_CLKM_DIV_A_DEFAULT         0
 #define ADC_LL_DEFAULT_CONV_LIMIT_EN      0
 #define ADC_LL_DEFAULT_CONV_LIMIT_NUM     10
 
-#define ADC_LL_EVENT_ADC1_ONESHOT_DONE    (1 << 0)
-#define ADC_LL_EVENT_ADC2_ONESHOT_DONE    (1 << 1)
+/*---------------------------------------------------------------
+                    PWDET (Power Detect)
+---------------------------------------------------------------*/
+#define ADC_LL_PWDET_CCT_DEFAULT                       (4)
 
 typedef enum {
     ADC_LL_POWER_BY_FSM,   /*!< ADC XPD controlled by FSM. Used for polling mode */

components/hal/esp32s3/include/hal/adc_hal_conf.h

@@ -1,28 +0,0 @@
-/*
- * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-
-#pragma once
-
-/*---------------------------------------------------------------
-                    Single Read
----------------------------------------------------------------*/
-#define ADC_HAL_DATA_INVERT_DEFAULT(PERIPH_NUM)         (0)
-#define ADC_HAL_SAR_CLK_DIV_DEFAULT(PERIPH_NUM)         ((PERIPH_NUM==0)? 2 : 1)
-
-/*---------------------------------------------------------------
-                    DMA Read
----------------------------------------------------------------*/
-#define ADC_HAL_DIGI_DATA_INVERT_DEFAULT(PERIPH_NUM)    (0)
-#define ADC_HAL_FSM_RSTB_WAIT_DEFAULT                   (8)
-#define ADC_HAL_FSM_START_WAIT_DEFAULT                  (5)
-#define ADC_HAL_FSM_STANDBY_WAIT_DEFAULT                (100)
-#define ADC_HAL_SAMPLE_CYCLE_DEFAULT                    (2)
-#define ADC_HAL_DIGI_SAR_CLK_DIV_DEFAULT                (1)
-
-/*---------------------------------------------------------------
-                    PWDET (Power Detect)
----------------------------------------------------------------*/
-#define ADC_HAL_PWDET_CCT_DEFAULT                       (4)

components/hal/esp32s3/include/hal/adc_ll.h

@@ -27,14 +27,35 @@
 extern "C" {
 #endif
 
+#define ADC_LL_EVENT_ADC1_ONESHOT_DONE    (1 << 0)
+#define ADC_LL_EVENT_ADC2_ONESHOT_DONE    (1 << 1)
+
+/*---------------------------------------------------------------
+                    Oneshot
+---------------------------------------------------------------*/
+#define ADC_LL_DATA_INVERT_DEFAULT(PERIPH_NUM)         (0)
+#define ADC_LL_SAR_CLK_DIV_DEFAULT(PERIPH_NUM)         ((PERIPH_NUM==0)? 2 : 1)
+
+/*---------------------------------------------------------------
+                    DMA
+---------------------------------------------------------------*/
+#define ADC_LL_DIGI_DATA_INVERT_DEFAULT(PERIPH_NUM)    (0)
+#define ADC_LL_FSM_RSTB_WAIT_DEFAULT                   (8)
+#define ADC_LL_FSM_START_WAIT_DEFAULT                  (5)
+#define ADC_LL_FSM_STANDBY_WAIT_DEFAULT                (100)
+#define ADC_LL_SAMPLE_CYCLE_DEFAULT                    (2)
+#define ADC_LL_DIGI_SAR_CLK_DIV_DEFAULT                (1)
+
 #define ADC_LL_CLKM_DIV_NUM_DEFAULT       15
 #define ADC_LL_CLKM_DIV_B_DEFAULT         1
 #define ADC_LL_CLKM_DIV_A_DEFAULT         0
 #define ADC_LL_DEFAULT_CONV_LIMIT_EN      0
 #define ADC_LL_DEFAULT_CONV_LIMIT_NUM     10
 
-#define ADC_LL_EVENT_ADC1_ONESHOT_DONE    (1 << 0)
-#define ADC_LL_EVENT_ADC2_ONESHOT_DONE    (1 << 1)
+/*---------------------------------------------------------------
+                    PWDET (Power Detect)
+---------------------------------------------------------------*/
+#define ADC_LL_PWDET_CCT_DEFAULT                       (4)
 
 typedef enum {
     ADC_LL_POWER_BY_FSM,   /*!< ADC XPD controlled by FSM. Used for polling mode */